(define_conditions [
  (-1 "!TARGET_SOFT_MUL && TARGET_MULTIPLY_HIGH")
  (-1 "reload_completed
   && GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0]))
   && GET_CODE (operands[1]) == REG && GP_REG_P (REGNO (operands[1]))
   && (REGNO (operands[0]) == (REGNO (operands[1]) + 1))
   && !TARGET_MB_64")
  (-1 "reload_completed
   && GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0]))
   && GET_CODE (operands[1]) == REG && GP_REG_P (REGNO (operands[1]))
   && (REGNO (operands[0]) != (REGNO (operands[1]) + 1))
   && !TARGET_MB_64")
  (-1 "(INTVAL (operands[2]) > 17 && !optimize_size)")
  (-1 "TARGET_HAS_BITFIELD && UINTVAL (operands[1]) > 0
   && UINTVAL (operands[1]) + UINTVAL (operands[2]) <= 32")
  (-1 "(register_operand (operands[0], SImode) && 
           (GET_CODE (operands[1]) == CONST_INT && 
                 (INTVAL (operands[1]) <= 32767 && INTVAL (operands[1]) >= -32768)))")
  (-1 "!TARGET_SOFT_MUL")
  (-1 "TARGET_HAS_BITFIELD")
  (-1 "flag_pic && TARGET_MB_64")
  (-1 "!TARGET_SOFT_DIV")
  (-1 "!TARGET_SOFT_MUL && TARGET_MULTIPLY_HIGH && !TARGET_MB_64")
  (-1 "TARGET_HARD_FLOAT")
  (-1 "TARGET_HAS_BITFIELD && (UINTVAL (operands[2]) > 0)
   && ((UINTVAL (operands[2]) + UINTVAL (operands[3])) <= 32)")
  (-1 "TARGET_MB_64 && (register_operand (operands[0], Pmode) && 
           PLT_ADDR_P (operands[1]))")
  (-1 "TARGET_MB_64 && TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT")
  (-1 "TARGET_HARD_FLOAT && TARGET_FLOAT_SQRT")
  (-1 "TARGET_MB_64 && TARGET_PATTERN_COMPARE")
  (-1 "(register_operand (operands[0], Pmode) && 
           PLT_ADDR_P (operands[1]))")
  (-1 "TARGET_MB_64 && ((long long)INTVAL(operands[2]) > (long long)-32768) && ((long long) INTVAL(operands[2]) < (long long)32767)")
  (-1 "TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT")
  (-1 "TARGET_BARREL_SHIFT")
  (-1 "TARGET_REORDER")
  (-1 "(INTVAL (operands[2]) > 5 && optimize_size)")
  (-1 "microblaze_is_interrupt_variant () && TARGET_MB_64")
  (-1 "!TARGET_SOFT_MUL 
   && ((1 << INTVAL (operands[2])) <= 32767 && (1 << INTVAL (operands[2])) >= -32768)")
  (-1 "TARGET_PREFETCH && !TARGET_MB_64")
  (-1 "TARGET_MB_64 && TARGET_BARREL_SHIFT")
  (-1 "!TARGET_MB_64")
  (-1 "reload_completed 
   && GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0]))
   && GET_CODE (operands[1]) == REG && GP_REG_P (REGNO (operands[1])) 
   && (REGNO(operands[0]) == (REGNO(operands[1]) + 1))
   && !(TARGET_MB_64)")
  (-1 "(!TARGET_SOFT_DIV) || (TARGET_BARREL_SHIFT && TARGET_SMALL_DIVIDES)")
  (-1 "microblaze_can_use_return_insn ()")
  (-1 "TARGET_MB_64")
  (-1 "TARGET_HAS_CLZ")
  (-1 "TARGET_PATTERN_COMPARE")
  (-1 "TARGET_MB_64 && ((long long)INTVAL(operands[2]) > (long long)-32768) && ((long long) INTVAL(operands[2]) < (long long)32767) && (REGNO (operands[0]) == REGNO (operands[1]))")
  (-1 "microblaze_is_interrupt_variant ()")
  (-1 "(operands[2] == const1_rtx)")
  (-1 "reload_completed 
   && GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0]))
   && GET_CODE (operands[1]) == REG && GP_REG_P (REGNO (operands[1]))
   && !TARGET_MB_64")
  (-1 "reload_completed 
   && GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0]))
   && GET_CODE (operands[1]) == REG && GP_REG_P (REGNO (operands[1])) 
   && (REGNO (operands[0]) != (REGNO (operands[1]) + 1))
   && !(TARGET_MB_64)")
  (-1 "TARGET_MB_64 && NEXT_INSN (as_a <rtx_insn *> (operands[1])) != 0
  && GET_CODE (PATTERN (NEXT_INSN (as_a <rtx_insn *> (operands[1])))) == ADDR_DIFF_VEC
  && flag_pic")
  (-1 "flag_pic")
  (-1 "NEXT_INSN (as_a <rtx_insn *> (operands[1])) != 0
  && GET_CODE (PATTERN (NEXT_INSN (as_a <rtx_insn *> (operands[1])))) == ADDR_DIFF_VEC
  && flag_pic")
  (-1 "TARGET_MB_64 && (register_operand (operands[0], DImode) && 
           (GET_CODE (operands[1]) == CONST_INT))")
  (-1 "(register_operand (operands[0], SFmode)
       || register_operand (operands[1], SFmode)
       || operands[1] == CONST0_RTX (SFmode))")
])
