/dts-v1/;
/plugin/;
&fpga {
	firmware-name = "vek385_revb_base_pld.pdi";
	misc_clk_1: misc_clk_1 {
		compatible = "fixed-clock";
		clock-frequency = <99999000>;
		#clock-cells = <0>;
	};
	misc_clk_0: misc_clk_0 {
		compatible = "fixed-clock";
		clock-frequency = <99999001>;
		#clock-cells = <0>;
	};
};

&amba {
	pl_mmi_clk_wiz: clkx5_wiz@b2010000 {
		xlnx,reset-type = "ACTIVE_HIGH";
		xlnx,clk-out1-port = "clk_out1";
		xlnx,clkout1-actual-duty-cycle = <50>;
		xlnx,clkout2-phase = <0>;
		xlnx,clkout1-dyn-ps = <00>;
		xlnx,use-locked-deskew1 = <0>;
		xlnx,use-locked-deskew2 = <0>;
		xlnx,clkout3-drives = "BUFG";
		xlnx,deskew-delay1 = <0>;
		reg = <0x0 0xb2010000 0x0 0x10000>;
		xlnx,deskew-delay2 = <0>;
		xlnx,clkin2-deskew-port = "clkin2_deskew";
		xlnx,clkout4-grouping = "Auto";
		xlnx,d-max = <107>;
		xlnx,divide6-auto = <0>;
		xlnx,clkout1-phase = <0>;
		xlnx,clkout2-requested-out-freq = <100>;
		xlnx,clkout7-divide = <12>;
		xlnx,use-locked = <1>;
		xlnx,clkin1-ibufds = <0>;
		xlnx,input-clk-stopped-port = "input_clk_stopped";
		xlnx,clkout1-drives = "MBUFGCE";
		xlnx,divide3-auto = <0>;
		xlnx,clkout4-duty-cycle = <0x7a120>;
		xlnx,clkout4-mbufgce-mode = "PERFORMANCE";
		xlnx,use-dyn-reconfig = <1>;
		xlnx,clkout6-actual-duty-cycle = <50>;
		xlnx,clkout6-requested-duty-cycle = <50>;
		xlnx,deskew2-in = <0>;
		xlnx,deskew1-fb = <1>;
		xlnx,clkin2-jitter-ps = <100>;
		xlnx,feedback-source = "FDBK_AUTO";
		xlnx,clkout5-requested-out-freq = <100>;
		xlnx,bufgce-div-ce-type = "SYNC";
		xlnx,name = "pl_mmi_clk_wiz";
		xlnx,clkout5-divide = <12>;
		xlnx,current-path = "clkx5_wiz_v1_0";
		xlnx,prim-in-freq = <0x5f5dd18>;
		xlnx,clkout-matched-routing = "false,false,false,false,false,false,false";
		xlnx,deskew2-lock-circuit-en;
		xlnx,clk-in2-board-interface = "Custom";
		xlnx,clkin1-deskew-port = "clkin1_deskew";
		xlnx,clkin1-ui-jitter = <0x2710>;
		xlnx,clkout3-mbufgce-mode = "PERFORMANCE";
		xlnx,use-inclk-switchover = <0>;
		clock-names = "clk_in1" , "s_axi_aclk";
		xlnx,clkout3-divide = <12>;
		xlnx,clkout5-duty-cycle = <0x7a120>;
		xlnx,clkout1-grouping = "Auto";
		xlnx,use-dyn-phase-shift = <0>;
		xlnx,o-min = <3>;
		xlnx,daddr-port = "daddr";
		xlnx,clkout-grouping = "Auto,Auto,Auto,Auto,Auto,Auto,Auto";
		xlnx,clkin1-bufg = <0>;
		xlnx,precision = <1>;
		clock-output-names = "0xb2010000-clk_out1 0xb2010000-clk_out2";
		xlnx,clkout1-divide = <26>;
		xlnx,use-phase-alignment = <0>;
		xlnx,ref-clk-freq = <100>;
		xlnx,pllbufgcediv = <0>;
		xlnx,deskew1-in = <0>;
		xlnx,inclk-sum-row0 = "Input , Clock , Freq , (MHz) , Input , Jitter , (UI)";
		xlnx,clkout7-requested-duty-cycle = <50>;
		xlnx,inclk-sum-row1 = "primary , 100.000 , 0.010";
		xlnx,inclk-sum-row2 = "secondary , 100.000 , 0.010";
		xlnx,clkout2-mbufgce-mode = "PERFORMANCE";
		xlnx,din-port = "din";
		xlnx,reset-board-interface = "Custom";
		xlnx,clkout5-actual-duty-cycle = <50>;
		xlnx,clkout-requested-phase = "0.000,0.000,0.000,0.000,0.000,0.000,0.000";
		xlnx,clkout6-duty-cycle = <0x7a120>;
		xlnx,clkout1-requested-duty-cycle = <50>;
		xlnx,vco-max = <4320>;
		xlnx,use-freq-synth = <1>;
		xlnx,clkout5-used = <0>;
		xlnx,d-min = <1>;
		xlnx,clk-out6-port = "clk_out6";
		xlnx,clk-tree1 = <0>;
		xlnx,clkout2-sequence-number = <1>;
		xlnx,clkout-used = "true,true,false,false,false,false,false";
		xlnx,clk-tree2 = <0>;
		xlnx,clk-tree3 = <0>;
		xlnx,clkin1-period = <0x9896e4>;
		xlnx,clkout2-used = <1>;
		xlnx,clkout4-sequence-number = <1>;
		xlnx,psincdec-port = "psincdec";
		xlnx,clk-tree4 = <0>;
		xlnx,clkfbin-ibuf = <0>;
		xlnx,clk-tree5 = <0>;
		xlnx,clk-out3-port = "clk_out3";
		xlnx,clkout6-sequence-number = <1>;
		xlnx,clkout-port = "clk_out1,clk_out2,clk_out3,clk_out4,clk_out5,clk_out6,clk_out7";
		xlnx,locked-deskew1-port = "locked_deskew1";
		xlnx,clk-tree6 = <0>;
		xlnx,clk-tree7 = <0>;
		xlnx,clkin2-ibuf = <0>;
		xlnx,clkfbout-fract = <32>;
		xlnx,clkout5-grouping = "Auto";
		xlnx,pllbufgcediv1 = <0>;
		xlnx,nr-outputs = <2>;
		xlnx,pllbufgcediv2 = <0>;
		xlnx,pllbufgcediv3 = <0>;
		xlnx,pllbufgcediv4 = <0>;
		xlnx,clkout1-mbufgce-mode = "PERFORMANCE";
		xlnx,clkfb-deskew-port = "clkfb_deskew";
		xlnx,clkout2-matched-routing = <0>;
		xlnx,safeclock-startup-mode = "DESKEW_MODE";
		xlnx,ref-jitter1 = <0x2710>;
		xlnx,ref-jitter2 = <0x2710>;
		xlnx,clkout4-matched-routing = <0>;
		xlnx,clkout6-dyn-ps = <00>;
		xlnx,clkout6-matched-routing = <0>;
		xlnx,clkout7-duty-cycle = <0x7a120>;
		xlnx,outclk-sum-row1 = "no , clk_out1 , output";
		xlnx,outclk-sum-row2 = "no , clk_out2 , output";
		xlnx,jitter-sel = "No_Jitter";
		xlnx,outclk-sum-row3 = "no , clk_out3 , output";
		xlnx,outclk-sum-row4 = "no , clk_out4 , output";
		xlnx,outclk-sum-row5 = "no , clk_out5 , output";
		xlnx,clkout7-actual-phase = <0>;
		xlnx,outclk-sum-row6 = "no , clk_out6 , output";
		xlnx,outclk-sum-row7 = "no , clk_out7 , output";
		xlnx,divide5-auto = <0>;
		xlnx,deskew-fb1 = <1>;
		xlnx,deskew-fb2 = <1>;
		xlnx,clkfbin-obuf = <0>;
		xlnx,psdone-port = "psdone";
		xlnx,edk-iptype = "PERIPHERAL";
		xlnx,clkout3-requested-out-freq = <100>;
		xlnx,divide2-auto = <0>;
		xlnx,clkout4-dyn-ps = <00>;
		xlnx,ss-mode = "CENTER_HIGH";
		xlnx,clkfbout-mult = <1>;
		xlnx,clkout-requested-duty-cycle = "50.000,50.000,50.000,50.000,50.000,50.000,50.000";
		xlnx,clkout6-drives = "BUFG";
		xlnx,ss-mod-period = <4000>;
		xlnx,clkout2-actual-out-freq = <0x15888aa>;
		xlnx,clkout2-requested-duty-cycle = <50>;
		xlnx,numbufgce = <0>;
		xlnx,clkout4-actual-duty-cycle = <50>;
		xlnx,clkout4-actual-out-freq = <0x7abd7d3>;
		xlnx,primary-port = "clk_in1";
		xlnx,clkout6-actual-out-freq = <0x7abd7d3>;
		xlnx,clkout6-requested-out-freq = <100>;
		xlnx,clkfbout-oddr = <0>;
		xlnx,use-locked-fb = <0>;
		xlnx,locked-fb-port = "locked_fb";
		xlnx,clkout2-requested-phase = <0>;
		xlnx,relative-inclk = "REL_PRIMARY";
		xlnx,clkout4-requested-phase = <0>;
		xlnx,enable-user-clock0 = <0>;
		xlnx,clkout2-dyn-ps = <00>;
		xlnx,clkout2-grouping = "Auto";
		xlnx,enable-user-clock1 = <0>;
		xlnx,clkout6-actual-phase = <0>;
		xlnx,clkout6-requested-phase = <0>;
		xlnx,clkout-requested-out-frequency = "148.5,22.579200,100.000,100.000,100.000,100.000,100.000";
		xlnx,ss-mod-freq = <250>;
		xlnx,enable-user-clock2 = <0>;
		xlnx,enable-user-clock3 = <0>;
		xlnx,primitive-type = "MMCM";
		xlnx,ce-sync-ext = <0>;
		xlnx,clkout4-drives = "BUFG";
		xlnx,den-port = "den";
		xlnx,use-safe-clock-startup = <0>;
		xlnx,dwe-port = "dwe";
		xlnx,drdy-port = "drdy";
		xlnx,vco-min = <2160>;
		xlnx,clk-in-sel-port = "clk_in_sel";
		xlnx,clkin1-jitter-ps = <100>;
		xlnx,deskew-delay-path1;
		xlnx,deskew-delay-path2;
		xlnx,enable-pll0 = <0>;
		xlnx,enable-pll1 = <0>;
		xlnx,clkin2-ibufds = <0>;
		xlnx,clkfb2-deskew-port = "clkfb2_deskew";
		xlnx,clkout2-drives = "BUFG";
		xlnx,use-inclk-stopped = <0>;
		compatible = "xlnx,clkx5-wiz-1.0" , "xlnx,versal-clk-wizard";
		xlnx,clkout5-actual-phase = <0>;
		xlnx,reset-port = "reset";
		xlnx,sim-device = "VERSAL_AI_EDGE_2";
		xlnx,speed-grade = <2>;
		xlnx,clkout6-divide = <12>;
		xlnx,clkout3-requested-duty-cycle = <50>;
		xlnx,prim-source = "No_buffer";
		xlnx,clkout7-used = <0>;
		xlnx,deskew1-delay-en;
		xlnx,use-clkfb-stopped = <0>;
		xlnx,clkout6-grouping = "Auto";
		xlnx,compensation = "AUTO";
		xlnx,mmcmbufgcediv = <0>;
		xlnx,clkin-deskew-port = "clkin_deskew";
		xlnx,clkout3-actual-duty-cycle = <50>;
		xlnx,clkout4-used = <0>;
		xlnx,clk-out5-port = "clk_out5";
		xlnx,psclk-port = "psclk";
		xlnx,ce-type = "HARDSYNC";
		xlnx,clkfbout-phase = <0>;
		xlnx,clkout4-divide = <12>;
		xlnx,primitive = "MMCM";
		xlnx,clkout1-used = <1>;
		xlnx,deskew1-lock-circuit-en;
		xlnx,clk-in1-board-interface = "Custom";
		xlnx,clk-out2-port = "clk_out2";
		xlnx,clkout4-actual-phase = <0>;
		xlnx,power-down-port = "power_down";
		xlnx,clkfb1-deskew-port = "clkfb1_deskew";
		xlnx,bandwidth = "LOW";
		xlnx,clkin1-ibuf = <0>;
		xlnx,user-clk-freq0 = <100>;
		xlnx,deskew1-delay-path = "ClkFb_Path";
		xlnx,user-clk-freq1 = <100>;
		xlnx,clkoutfb-phase-ctrl = <00>;
		xlnx,user-clk-freq2 = <100>;
		xlnx,user-clk-freq3 = <100>;
		xlnx,use-clock-sequencing = <0>;
		xlnx,secondary-source = "Single_ended_clock_capable_pin";
		xlnx,cddcdone-port = "cddcdone";
		xlnx,clkout2-divide = <171>;
		xlnx,actual-vco = <4320>;
		xlnx,clkout7-phase = <0>;
		xlnx,psen-port = "psen";
		xlnx,m-max = <432>;
		xlnx,deskew-delay-en1;
		xlnx,dclk-port = "dclk";
		xlnx,deskew-delay-en2;
		xlnx,outclk-sum-row0a = "Output , Output , Phase , Duty , Pk-to-Pk , Phase";
		xlnx,divide7-auto = <0>;
		xlnx,clkout1-requested-out-freq = <100>;
		xlnx,outclk-sum-row0b = "Clock , Freq , (MHz) , (degrees) , Cycle , () , Jitter , (ps) , Error , (ps)";
		xlnx,locked-port = "locked";
		xlnx,enable-clock-monitor = <0>;
		xlnx,clkin2-ui-jitter = <0x2710>;
		xlnx,ss-mod-time = <0xfa0>;
		xlnx,divide4-auto = <0>;
		xlnx,auto-primitive = "MMCM";
		xlnx,drp-addr-set1 = "00000328 , 0000032c , 00000330 , 00000334 , 00000338 , 0000033c , 00000340 , 00000344 , 00000348 , 0000034c , 00000350 , 00000354 , 00000358 , 0000035c , 00000360 , 00000364 , 00000368 , 0000036c , 00000370 , 00000374 , 00000378 , 0000037c , 00000380 , 00000384 , 00000388 , 0000038c , 00000390 , 00000394 , 00000398 , 0000039c , 000003a0 , 000003a4 , 000003a8 , 000003ac , 000003b0 , 000003b4 , 000003b8 , 000003bc , 000003c0 , 000003c4 , 000003c8 , 000003cc , 000003d0 , 000003d4 , 000003d8 , 000003dc , 000003e0 , 000003e4 , 000003e8 , 000003ec , 000003f0 , 000003f4 , 000003f8 , 000003fc";
		xlnx,drp-addr-set2 = "00000328 , 0000032c , 00000330 , 00000334 , 00000338 , 0000033c , 00000340 , 00000344 , 00000348 , 0000034c , 00000350 , 00000354 , 00000358 , 0000035c , 00000360 , 00000364 , 00000368 , 0000036c , 00000370 , 00000374 , 00000378 , 0000037c , 00000380 , 00000384 , 00000388 , 0000038c , 00000390 , 00000394 , 00000398 , 0000039c , 000003a0 , 000003a4 , 000003a8 , 000003ac , 000003b0 , 000003b4 , 000003b8 , 000003bc , 000003c0 , 000003c4 , 000003c8 , 000003cc , 000003d0 , 000003d4 , 000003d8 , 000003dc , 000003e0 , 000003e4 , 000003e8 , 000003ec , 000003f0 , 000003f4 , 000003f8 , 000003fc";
		xlnx,drp-addr-set3 = "00000328 , 0000032c , 00000330 , 00000334 , 00000338 , 0000033c , 00000340 , 00000344 , 00000348 , 0000034c , 00000350 , 00000354 , 00000358 , 0000035c , 00000360 , 00000364 , 00000368 , 0000036c , 00000370 , 00000374 , 00000378 , 0000037c , 00000380 , 00000384 , 00000388 , 0000038c , 00000390 , 00000394 , 00000398 , 0000039c , 000003a0 , 000003a4 , 000003a8 , 000003ac , 000003b0 , 000003b4 , 000003b8 , 000003bc , 000003c0 , 000003c4 , 000003c8 , 000003cc , 000003d0 , 000003d4 , 000003d8 , 000003dc , 000003e0 , 000003e4 , 000003e8 , 000003ec , 000003f0 , 000003f4 , 000003f8 , 000003fc";
		xlnx,clkout3-actual-phase = <0>;
		xlnx,clkout-mbufgce-mode = "PERFORMANCE,PERFORMANCE,PERFORMANCE,PERFORMANCE,PERFORMANCE,PERFORMANCE,PERFORMANCE";
		xlnx,use-power-down = <0>;
		xlnx,divide1-auto = <0>;
		xlnx,clkout3-grouping = "Auto";
		xlnx,clkout4-requested-duty-cycle = <50>;
		xlnx,clkout4-requested-out-freq = <100>;
		xlnx,clkout6-phase = <0>;
		xlnx,num-out-clks = <1>;
		xlnx,ip-name = "clkx5_wiz";
		xlnx,auto-nummbufgce = <0>;
		xlnx,deskew-in1 = <0>;
		xlnx,deskew2-delay = <0>;
		xlnx,deskew-in2 = <0>;
		xlnx,mmcmbufgcediv1 = <0>;
		xlnx,deskew2-delay-path = "ClkFb_Path";
		xlnx,mmcmbufgcediv2 = <0>;
		xlnx,clkin2-period = <0x9896e4>;
		xlnx,clkout1-duty-cycle = <0x7a120>;
		xlnx,mmcmbufgcediv3 = <0>;
		xlnx,mmcmbufgcediv4 = <0>;
		xlnx,mmcmbufgcediv5 = <0>;
		xlnx,dout-port = "dout";
		xlnx,mmcmbufgcediv6 = <0>;
		xlnx,clkout1-sequence-number = <1>;
		xlnx,mmcmbufgcediv7 = <0>;
		xlnx,cddcreq-port = "cddcreq";
		xlnx,clkout7-requested-out-freq = <100>;
		xlnx,use-spread-spectrum;
		xlnx,clkout3-sequence-number = <1>;
		xlnx,clkout7-mbufgce-mode = "PERFORMANCE";
		xlnx,clkout2-actual-duty-cycle = <50>;
		xlnx,clkout5-sequence-number = <1>;
		xlnx,clkout5-phase = <0>;
		xlnx,clkout7-sequence-number = <1>;
		xlnx,deskew1-delay = <0>;
		xlnx,clkfb-in-port = "clkfb_in";
		xlnx,zhold;
		xlnx,clkout2-actual-phase = <0>;
		xlnx,clkout7-dyn-ps = <00>;
		xlnx,deskew-lock-circuit-en1 = <0>;
		xlnx,clkout-dyn-ps = "None,None,None,None,None,None,None";
		xlnx,deskew-lock-circuit-en2 = <0>;
		xlnx,clkfbout-bufg = <0>;
		xlnx,clkout1-matched-routing = <0>;
		xlnx,interface-selection = <1>;
		xlnx,clkout3-matched-routing = <0>;
		xlnx,override-primitive = <0>;
		xlnx,calc-done = "empty";
		xlnx,clkout5-matched-routing = <0>;
		xlnx,clkfbin-obufds = <0>;
		xlnx,actual-pfd = <0xa98a58>;
		xlnx,clkout7-matched-routing = <0>;
		xlnx,clkin2-bufg = <0>;
		xlnx,clkout2-duty-cycle = <0x7a120>;
		xlnx,clkout4-phase = <0>;
		xlnx,clkout5-dyn-ps = <00>;
		xlnx,clkout6-mbufgce-mode = "PERFORMANCE";
		xlnx,clkout7-actual-duty-cycle = <50>;
		clocks = <&misc_clk_0>, <&misc_clk_1>;
		xlnx,deskew2-delay-en;
		xlnx,clkout7-grouping = "Auto";
		xlnx,clkfbin-ibufds = <0>;
		xlnx,clkfb-bufg = <0>;
		xlnx,clkout7-drives = "BUFG";
		xlnx,clkout-drives = "MBUFGCE,BUFG,BUFG,BUFG,BUFG,BUFG,BUFG";
		xlnx,clkout5-requested-duty-cycle = <50>;
		xlnx,drp-data-set1 = "4b06 , 0001 , 1700 , adad , 1b00 , 0606 , bb00 , 2a2a , 0a00 , 0303 , 0a00 , 0303 , f37c , 7c4d , d042 , ebd8 , ec5f , edfb , aacd , 4428 , 0023 , 0000 , 0400 , 0404 , 000f , 0006 , 0000 , 0000 , 0e80 , 7d2c , 7fe9 , 1188 , 0010 , 0001 , 0000 , 00c0 , 0dfd , 0961 , 0001 , 0000 , 068b , 0a00 , 0303 , 0a00 , 0303 , 0a00 , 0303 , 0000 , 0000 , 0000 , 0020 , 0000 , 0f00 , 0003";
		xlnx,divclk-divide = <9>;
		xlnx,clkfb-in-signaling = "SINGLE";
		xlnx,drp-data-set2 = "4b06 , 0001 , 1700 , adad , 1a00 , 0202 , 1b00 , 0101 , 0a00 , 0000 , 0a00 , 0101 , f37c , 7c4d , d042 , ebd8 , ec5f , edfb , aacd , 4428 , 0023 , 0000 , 0400 , 0404 , 000f , 0006 , 0000 , 0000 , 0e80 , 7d2c , 7fe9 , 1188 , 0010 , 0001 , 0000 , 00c0 , 0dfd , 0961 , 0001 , 0000 , 068b , 0a00 , 0303 , 0b00 , 0101 , 0a00 , 0202 , 0000 , 0000 , 0000 , 0020 , 0000 , 0f00 , 0003";
		xlnx,clkout1-actual-phase = <0>;
		xlnx,drp-data-set3 = "4b06 , 0001 , 1700 , adad , 1b00 , 0606 , bb00 , 2a2a , 0a00 , 0303 , 0a00 , 0303 , f37c , 7c4d , d042 , ebd8 , ec5f , edfb , aacd , 4428 , 0023 , 0000 , 0400 , 0404 , 000f , 0006 , 0000 , 0000 , 0e80 , 7d2c , 7fe9 , 1188 , 0010 , 0001 , 0000 , 00c0 , 0dfd , 0961 , 0001 , 0000 , 068b , 0a00 , 0303 , 0a00 , 0303 , 0a00 , 0303 , 0000 , 0000 , 0000 , 0020 , 0000 , 0f00 , 0003";
		xlnx,deskew2-fb = <1>;
		xlnx,secondary-port = "clk_in2";
		xlnx,clkout1-actual-out-freq = <0x8d9f906>;
		xlnx,clkout3-phase = <0>;
		xlnx,numbufg = <1>;
		xlnx,clkout3-actual-out-freq = <0x7abd7d3>;
		xlnx,use-reset = <1>;
		xlnx,clkout3-dyn-ps = <00>;
		xlnx,m-min = <5>;
		xlnx,clkout5-actual-out-freq = <0x7abd7d3>;
		xlnx,clkout6-used = <0>;
		xlnx,clkfb-stopped-port = "clkfb_stopped";
		xlnx,clk-out7-port = "clk_out7";
		xlnx,clkout1-requested-phase = <0>;
		xlnx,clkout7-actual-out-freq = <0x7abd7d3>;
		xlnx,phaseshift-mode = "LATENCY";
		xlnx,clkfb-out-port = "clkfb_out";
		xlnx,clkout5-drives = "BUFG";
		xlnx,o-max = <432>;
		xlnx,clkout3-requested-phase = <0>;
		xlnx,jitter-options = "UI";
		xlnx,clkout3-used = <0>;
		xlnx,clkout5-requested-phase = <0>;
		xlnx,clk-out4-port = "clk_out4";
		xlnx,clkout3-duty-cycle = <0x7a120>;
		xlnx,locked-deskew2-port = "locked_deskew2";
		xlnx,clkout7-requested-phase = <0>;
		xlnx,secondary-in-freq = <0x5f5dd18>;
		xlnx,clkout5-mbufgce-mode = "PERFORMANCE";
		xlnx,use-min-power = <0>;
		#clock-cells = <1>;
		xlnx,nummbufgce = <1>;
	};
	ai_engine_0: ai_engine@20000000000 {
		xlnx,num-mi-axi = <0>;
		compatible = "xlnx,ai-engine-2.0" , "xlnx,ai-engine-v2.0";
		xlnx,aie-ref-clk-freqmhz = <0x1fc9f08>;
		xlnx,aie-col-dict = "col00 0x20000000000 col01 0x20002000000 col02 0x20004000000 col03 0x20006000000 col04 0x20008000000 col05 0x2000A000000 col06 0x2000C000000 col07 0x2000E000000 col08 0x20010000000 col09 0x20012000000 col10 0x20014000000 col11 0x20016000000 col12 0x20018000000 col13 0x2001A000000 col14 0x2001C000000 col15 0x2001E000000 col16 0x20020000000 col17 0x20022000000 col18 0x20024000000 col19 0x20026000000 col20 0x20028000000 col21 0x2002A000000 col22 0x2002C000000 col23 0x2002E000000 col24 0x20030000000 col25 0x20032000000 col26 0x20034000000 col27 0x20036000000 col28 0x20038000000 col29 0x2003A000000 col30 0x2003C000000 col31 0x2003E000000 col32 0x20040000000 col33 0x20042000000 col34 0x20044000000 col35 0x20046000000";
		xlnx,num-mi-axis = <0>;
		xlnx,en-addr-virtualization = <0>;
		xlnx,aie-max-freq = <1250>;
		xlnx,aie-gen = /bits/ 8 <0x5>;
		xlnx,name-mi-axis = "M00_AXIS";
		xlnx,mem-rows = /bits/ 8 <1 2>;
		xlnx,mi-destid-pins;
		xlnx,ip-name = "ai_engine";
		#size-cells = <2>;
		xlnx,num-si-axi = <1>;
		xlnx,fast-pm-write;
		reg = <0x00000200 0x00000000 0x00000001 0x00000000>;
		clocks = <&aie_core_ref_clk_0>;
		xlnx,num-noc-axis-clks = <0>;
		ranges;
		xlnx,num-clks = <0>;
		xlnx,partition-enabled = <0>;
		#address-cells = <2>;
		xlnx,num-si-axis = <0>;
		xlnx,name-mi-axi = "M00_AXI";
		xlnx,num-column = <1>;
		xlnx,aie-core-ref-ctrl-freqmhz = <1250>;
		xlnx,clk-names = "aclk0";
		xlnx,name-si-axis = "S00_AXIS";
		xlnx,fast-dm-write;
		xlnx,edk-iptype = "PERIPHERAL";
		xlnx,selected-nsu = <0>;
		xlnx,available-nsu = "NOC2_NSU128_X0Y6 0x20006000000 NOC2_NSU128_X2Y6 0x2000e000000 NOC2_NSU128_X3Y6 0x20016000000 NOC2_NSU128_X8Y7 0x2001e000000 NOC2_NSU128_X9Y6 0x20026000000 NOC2_NSU128_X10Y7 0x2002e000000 NOC2_NSU128_X11Y6 0x20036000000 NOC2_NSU128_X12Y6 0x2003e000000 NOC2_NSU128_X13Y6 0x20046000000";
		clock-names = "aclk0";
		power-domains = <&versal2_firmware 0x18800000>;
		xlnx,num-trig-in = <0>;
		xlnx,nsu-dict = "NOC2_NSU128_X0Y6 0x20006000000 NOC2_NSU128_X2Y6 0x2000e000000 NOC2_NSU128_X3Y6 0x20016000000 NOC2_NSU128_X8Y7 0x2001e000000 NOC2_NSU128_X9Y6 0x20026000000 NOC2_NSU128_X10Y7 0x2002e000000 NOC2_NSU128_X11Y6 0x20036000000 NOC2_NSU128_X12Y6 0x2003e000000 NOC2_NSU128_X13Y6 0x20046000000";
		xlnx,en-ext-rst = <0>;
		xlnx,num-trig-out = <0>;
		xlnx,core-rows = /bits/ 8 <3 4>;
		xlnx,shim-rows = /bits/ 8 <0 1>;
		xlnx,name-si-axi = "S00_AXI";
		xlnx,start-column = <0>;
		xlnx,name = "ai_engine_0";
		xlnx,aie-site = "AIE2PS";
		aie_aperture_0: aie_aperture@20000000000 {
			xlnx,device-name = <0>;
			interrupt-parent = <&gic>;
			interrupts = <0x0 0xce 0x4>, <0x0 0xcf 0x4>, <0x0 0xd0 0x4>;
			#address-cells = <2>;
			power-domains = <&versal2_firmware 0x18800000>;
			xlnx,node-id = <0x18800000>;
			#size-cells = <2>;
			interrupt-names = "interrupt1" , "interrupt2" , "interrupt3";
			reg = <0x00000200 0x00000000 0x00000001 0x00000000>;
			xlnx,columns = < 0 36 >;
		};
	};
	axi_bram_ctrl_0: axi_bram_ctrl_0@b0000000 {
		xlnx,protocol = "AXI4";
		xlnx,edk-special = "BRAM_CTRL";
		compatible = "xlnx,axi-bram-ctrl-4.1" , "xlnx,axi-bram-ctrl";
		xlnx,ecc-onoff-reset-value = <0>;
		xlnx,ecc-type = <0>;
		xlnx,rd-cmd-optimization = <0>;
		xlnx,memory-depth = <2048>;
		xlnx,use-ecc = <0>;
		xlnx,fault-inject = <0>;
		xlnx,ip-name = "axi_bram_ctrl";
		reg = <0x0 0xb0000000 0x0 0x2000>;
		xlnx,bmg-instance = "EXTERNAL";
		clocks = <&misc_clk_1>;
		xlnx,s-axi-ctrl-addr-width = <32>;
		xlnx,read-latency = <1>;
		xlnx,id-width = <0>;
		xlnx,s-axi-supports-narrow-burst = <0>;
		xlnx,supports-narrow-burst = <0>;
		xlnx,single-port-bram = <0>;
		xlnx,ecc = <0>;
		xlnx,edk-iptype = "PERIPHERAL";
		clock-names = "s_axi_aclk";
		xlnx,data-width = <32>;
		xlnx,bram-addr-width = <11>;
		xlnx,bram-inst-mode = "EXTERNAL";
		xlnx,s-axi-ctrl-data-width = <32>;
		xlnx,mem-depth = <2048>;
		xlnx,s-axi-id-width = <1>;
		xlnx,name = "axi_bram_ctrl_0";
	};
	axi_gpio_0: gpio@b2020000 {
		xlnx,gpio-board-interface = "gpio_led";
		compatible = "xlnx,axi-gpio-2.0" , "xlnx,xps-gpio-1.00.a";
		xlnx,all-outputs = <1>;
		#gpio-cells = <2>;
		xlnx,gpio-width = <4>;
		xlnx,dout-default = <0x0>;
		xlnx,is-dual = <0>;
		xlnx,ip-name = "axi_gpio";
		xlnx,tri-default-2 = <0xffffffff>;
		reg = <0x0 0xb2020000 0x0 0x10000>;
		xlnx,all-inputs-2 = <0>;
		clocks = <&misc_clk_1>;
		xlnx,all-outputs-2 = <0>;
		gpio-controller;
		xlnx,interrupt-present = <0>;
		xlnx,gpio2-board-interface = "Custom";
		xlnx,edk-iptype = "PERIPHERAL";
		xlnx,dout-default-2 = <0x0>;
		xlnx,gpio2-width = <32>;
		clock-names = "s_axi_aclk";
		xlnx,use-board-flow;
		xlnx,tri-default = <0xffffffff>;
		xlnx,name = "axi_gpio_0";
		xlnx,all-inputs = <0>;
	};
	axi_gpio_1: gpio@b2030000 {
		#interrupt-cells = <2>;
		interrupts = < 0 104 4 >;
		xlnx,gpio-board-interface = "gpio_pb";
		compatible = "xlnx,axi-gpio-2.0" , "xlnx,xps-gpio-1.00.a";
		xlnx,all-outputs = <0>;
		#gpio-cells = <2>;
		xlnx,gpio-width = <2>;
		interrupt-parent = <&gic>;
		xlnx,dout-default = <0x0>;
		xlnx,is-dual = <0>;
		xlnx,ip-name = "axi_gpio";
		xlnx,tri-default-2 = <0xffffffff>;
		reg = <0x0 0xb2030000 0x0 0x10000>;
		xlnx,all-inputs-2 = <0>;
		clocks = <&misc_clk_1>;
		xlnx,all-outputs-2 = <0>;
		gpio-controller;
		xlnx,interrupt-present = <1>;
		xlnx,gpio2-board-interface = "Custom";
		xlnx,edk-iptype = "PERIPHERAL";
		xlnx,dout-default-2 = <0x0>;
		xlnx,gpio2-width = <32>;
		clock-names = "s_axi_aclk";
		xlnx,use-board-flow;
		interrupt-controller;
		interrupt-names = "ip2intc_irpt";
		xlnx,tri-default = <0xffffffff>;
		xlnx,name = "axi_gpio_1";
		xlnx,all-inputs = <1>;
	};
	axi_gpio_2: gpio@b2040000 {
		#interrupt-cells = <2>;
		interrupts = < 0 105 4 >;
		xlnx,gpio-board-interface = "gpio_dp";
		compatible = "xlnx,axi-gpio-2.0" , "xlnx,xps-gpio-1.00.a";
		xlnx,all-outputs = <0>;
		#gpio-cells = <2>;
		xlnx,gpio-width = <4>;
		interrupt-parent = <&gic>;
		xlnx,dout-default = <0x0>;
		xlnx,is-dual = <0>;
		xlnx,ip-name = "axi_gpio";
		xlnx,tri-default-2 = <0xffffffff>;
		reg = <0x0 0xb2040000 0x0 0x10000>;
		xlnx,all-inputs-2 = <0>;
		clocks = <&misc_clk_1>;
		xlnx,all-outputs-2 = <0>;
		gpio-controller;
		xlnx,interrupt-present = <1>;
		xlnx,gpio2-board-interface = "Custom";
		xlnx,edk-iptype = "PERIPHERAL";
		xlnx,dout-default-2 = <0x0>;
		xlnx,gpio2-width = <32>;
		clock-names = "s_axi_aclk";
		xlnx,use-board-flow;
		interrupt-controller;
		interrupt-names = "ip2intc_irpt";
		xlnx,tri-default = <0xffffffff>;
		xlnx,name = "axi_gpio_2";
		xlnx,all-inputs = <1>;
	};
	axi_uart16550_0: serial@b2000000 {
		compatible = "xlnx,axi-uart16550-2.0" , "xlnx,axi-uart16550";
		xlnx,external-xin-clk-hz = <25000000>;
		xlnx,has-external-rclk = <0>;
		xlnx,s-axi-aclk-freq-hz-d = <99>;
		xlnx,use-user-ports = <1>;
		xlnx,sim-device = "VERSAL_AI_EDGE_2";
		xlnx,uart-board-interface = "pl_uart_bank705";
		xlnx,ip-name = "axi_uart16550";
		reg = <0x0 0xb2000000 0x0 0x10000>;
		xlnx,has-external-xin = <0>;
		clocks = <&misc_clk_1>;
		xlnx,use-modem-ports = <1>;
		xlnx,edk-iptype = "PERIPHERAL";
		xlnx,external-xin-clk-hz-d = <25>;
		xlnx,clock-freq = <99999000>;
		clock-names = "s_axi_aclk";
		xlnx,use-board-flow;
		xlnx,base-user = <1>;
		xlnx,is-a-16550 = <1>;
		xlnx,name = "axi_uart16550_0";
	};
	aie_core_ref_clk_0: aie_core_ref_clk_0 {
		compatible = "fixed-clock";
		clock-frequency = <1250000000>;
		#clock-cells = <0>;
	};
	zyxclmm_drm {
		interrupts = <0x0 0x89 0x4>, <0x0 0x90 0x4>, <0x0 0x91 0x4>, <0x0 0x92 0x4>, <0x0 0x93 0x4>, <0x0 0x94 0x4>, <0x0 0x95 0x4>, <0x0 0x96 0x4>;
		interrupt-parent = <&gic>;
		compatible = "xlnx,zocl-versal";
	};
};
