/dts-v1/;
/plugin/;
&fpga {
	firmware-name = "vck190_base_pld.pdi";
	misc_clk_0: misc_clk_0 {
		compatible = "fixed-clock";
		clock-frequency = <100000000>;
		#clock-cells = <0>;
	};
};

&amba {
	ai_engine_0: ai_engine@20000000000 {
		xlnx,num-mi-axi = <0>;
		compatible = "xlnx,ai-engine-2.0" , "xlnx,ai-engine-v2.0";
		xlnx,aie-ref-clk-freqmhz = <0x1fc9f08>;
		xlnx,aie-col-dict = "col00 0x20000000000 col01 0x20000800000 col02 0x20001000000 col03 0x20001800000 col04 0x20002000000 col05 0x20002800000 col06 0x20003000000 col07 0x20003800000 col08 0x20004000000 col09 0x20004800000 col10 0x20005000000 col11 0x20005800000 col12 0x20006000000 col13 0x20006800000 col14 0x20007000000 col15 0x20007800000 col16 0x20008000000 col17 0x20008800000 col18 0x20009000000 col19 0x20009800000 col20 0x2000A000000 col21 0x2000A800000 col22 0x2000B000000 col23 0x2000B800000 col24 0x2000C000000 col25 0x2000C800000 col26 0x2000D000000 col27 0x2000D800000 col28 0x2000E000000 col29 0x2000E800000 col30 0x2000F000000 col31 0x2000F800000 col32 0x20010000000 col33 0x20010800000 col34 0x20011000000 col35 0x20011800000 col36 0x20012000000 col37 0x20012800000 col38 0x20013000000 col39 0x20013800000 col40 0x20014000000 col41 0x20014800000 col42 0x20015000000 col43 0x20015800000 col44 0x20016000000 col45 0x20016800000 col46 0x20017000000 col47 0x20017800000 col48 0x20018000000 col49 0x20018800000";
		xlnx,num-mi-axis = <0>;
		xlnx,en-addr-virtualization = <0>;
		xlnx,aie-max-freq = <1250>;
		xlnx,aie-gen = /bits/ 8 <0x1>;
		xlnx,name-mi-axis = "M00_AXIS";
		xlnx,mem-rows = /bits/ 8 <0 0>;
		xlnx,mi-destid-pins;
		xlnx,ip-name = "ai_engine";
		#size-cells = <2>;
		xlnx,num-si-axi = <1>;
		xlnx,fast-pm-write;
		reg = <0x00000200 0x00000000 0x00000001 0x00000000>;
		clocks = <&aie_core_ref_clk_0>;
		xlnx,num-noc-axis-clks = <0>;
		ranges;
		xlnx,num-clks = <0>;
		xlnx,partition-enabled = <0>;
		#address-cells = <2>;
		xlnx,num-si-axis = <0>;
		xlnx,name-mi-axi = "M00_AXI";
		xlnx,num-column = <1>;
		xlnx,aie-core-ref-ctrl-freqmhz = <1250>;
		xlnx,clk-names = "aclk0";
		xlnx,name-si-axis = "S00_AXIS";
		xlnx,fast-dm-write;
		xlnx,edk-iptype = "PERIPHERAL";
		xlnx,selected-nsu = <0>;
		xlnx,available-nsu = "NOC_NSU128_X1Y6 0x20000000000 NOC_NSU128_X2Y6 0x20001000000 NOC_NSU128_X3Y6 0x20001800000 NOC_NSU128_X4Y6 0x20002800000 NOC_NSU128_X5Y6 0x20003800000 NOC_NSU128_X6Y6 0x20005000000 NOC_NSU128_X7Y6 0x20008800000 NOC_NSU128_X8Y6 0x20009800000 NOC_NSU128_X9Y6 0x2000D800000 NOC_NSU128_X10Y6 0x2000E800000 NOC_NSU128_X11Y6 0x20012800000 NOC_NSU128_X12Y6 0x20013800000 NOC_NSU128_X13Y6 0x20017000000 NOC_NSU128_X14Y6 0x20017800000 NOC_NSU128_X15Y6 0x20018000000 NOC_NSU128_X16Y6 0x20018800000";
		clock-names = "aclk0";
		power-domains = <&versal_firmware 0x18800000>;
		xlnx,num-trig-in = <0>;
		xlnx,nsu-dict = "NOC_NSU128_X1Y6 0x20000000000 NOC_NSU128_X2Y6 0x20001000000 NOC_NSU128_X3Y6 0x20001800000 NOC_NSU128_X4Y6 0x20002800000 NOC_NSU128_X5Y6 0x20003800000 NOC_NSU128_X6Y6 0x20005000000 NOC_NSU128_X7Y6 0x20008800000 NOC_NSU128_X8Y6 0x20009800000 NOC_NSU128_X9Y6 0x2000D800000 NOC_NSU128_X10Y6 0x2000E800000 NOC_NSU128_X11Y6 0x20012800000 NOC_NSU128_X12Y6 0x20013800000 NOC_NSU128_X13Y6 0x20017000000 NOC_NSU128_X14Y6 0x20017800000 NOC_NSU128_X15Y6 0x20018000000 NOC_NSU128_X16Y6 0x20018800000";
		xlnx,en-ext-rst = <0>;
		xlnx,num-trig-out = <0>;
		xlnx,core-rows = /bits/ 8 <1 8>;
		xlnx,shim-rows = /bits/ 8 <0 1>;
		xlnx,name-si-axi = "S00_AXI";
		xlnx,start-column = <0>;
		xlnx,name = "ai_engine_0";
		xlnx,aie-site = "AIE";
		aie_aperture_0: aie_aperture@20000000000 {
			xlnx,device-name = <0>;
			interrupt-parent = <&gic>;
			interrupts = <0x0 0x94 0x4>, <0x0 0x95 0x4>, <0x0 0x96 0x4>;
			#address-cells = <2>;
			power-domains = <&versal_firmware 0x18800000>;
			xlnx,node-id = <0x18800000>;
			#size-cells = <2>;
			interrupt-names = "interrupt1" , "interrupt2" , "interrupt3";
			reg = <0x00000200 0x00000000 0x00000001 0x00000000>;
			xlnx,columns = < 0 50 >;
		};
	};
	axi_bram_ctrl_0: axi_bram_ctrl_0@a4020000 {
		xlnx,protocol = "AXI4";
		xlnx,edk-special = "BRAM_CTRL";
		compatible = "xlnx,axi-bram-ctrl-4.1" , "xlnx,axi-bram-ctrl";
		xlnx,ecc-onoff-reset-value = <0>;
		xlnx,ecc-type = <0>;
		xlnx,rd-cmd-optimization = <0>;
		xlnx,memory-depth = <2048>;
		xlnx,use-ecc = <0>;
		xlnx,fault-inject = <0>;
		xlnx,ip-name = "axi_bram_ctrl";
		reg = <0x0 0xa4020000 0x0 0x2000>;
		xlnx,bmg-instance = "EXTERNAL";
		clocks = <&misc_clk_0>;
		xlnx,s-axi-ctrl-addr-width = <32>;
		xlnx,read-latency = <1>;
		xlnx,id-width = <0>;
		xlnx,s-axi-supports-narrow-burst = <0>;
		xlnx,supports-narrow-burst = <0>;
		xlnx,single-port-bram = <0>;
		xlnx,ecc = <0>;
		xlnx,edk-iptype = "PERIPHERAL";
		clock-names = "s_axi_aclk";
		xlnx,data-width = <32>;
		xlnx,bram-addr-width = <11>;
		xlnx,bram-inst-mode = "EXTERNAL";
		xlnx,s-axi-ctrl-data-width = <32>;
		xlnx,mem-depth = <2048>;
		xlnx,s-axi-id-width = <1>;
		xlnx,name = "axi_bram_ctrl_0";
	};
	axi_gpio_0: gpio@a6020000 {
		xlnx,gpio-board-interface = "gpio_led";
		compatible = "xlnx,axi-gpio-2.0" , "xlnx,xps-gpio-1.00.a";
		xlnx,all-outputs = <1>;
		#gpio-cells = <2>;
		xlnx,gpio-width = <4>;
		xlnx,dout-default = <0x0>;
		xlnx,is-dual = <0>;
		xlnx,ip-name = "axi_gpio";
		xlnx,tri-default-2 = <0xffffffff>;
		reg = <0x0 0xa6020000 0x0 0x10000>;
		xlnx,all-inputs-2 = <0>;
		clocks = <&misc_clk_0>;
		xlnx,all-outputs-2 = <0>;
		gpio-controller;
		xlnx,interrupt-present = <0>;
		xlnx,gpio2-board-interface = "Custom";
		xlnx,edk-iptype = "PERIPHERAL";
		xlnx,dout-default-2 = <0x0>;
		xlnx,gpio2-width = <32>;
		clock-names = "s_axi_aclk";
		xlnx,use-board-flow;
		xlnx,tri-default = <0xffffffff>;
		xlnx,name = "axi_gpio_0";
		xlnx,all-inputs = <0>;
	};
	axi_gpio_1: gpio@a6030000 {
		xlnx,gpio-board-interface = "gpio_pb";
		compatible = "xlnx,axi-gpio-2.0" , "xlnx,xps-gpio-1.00.a";
		xlnx,all-outputs = <0>;
		#gpio-cells = <2>;
		xlnx,gpio-width = <2>;
		xlnx,dout-default = <0x0>;
		xlnx,is-dual = <0>;
		xlnx,ip-name = "axi_gpio";
		xlnx,tri-default-2 = <0xffffffff>;
		reg = <0x0 0xa6030000 0x0 0x10000>;
		xlnx,all-inputs-2 = <0>;
		clocks = <&misc_clk_0>;
		xlnx,all-outputs-2 = <0>;
		gpio-controller;
		xlnx,interrupt-present = <0>;
		xlnx,gpio2-board-interface = "Custom";
		xlnx,edk-iptype = "PERIPHERAL";
		xlnx,dout-default-2 = <0x0>;
		xlnx,gpio2-width = <32>;
		clock-names = "s_axi_aclk";
		xlnx,use-board-flow;
		xlnx,tri-default = <0xffffffff>;
		xlnx,name = "axi_gpio_1";
		xlnx,all-inputs = <1>;
	};
	axi_gpio_2: gpio@a4000000 {
		xlnx,gpio-board-interface = "gpio_dp";
		compatible = "xlnx,axi-gpio-2.0" , "xlnx,xps-gpio-1.00.a";
		xlnx,all-outputs = <0>;
		#gpio-cells = <2>;
		xlnx,gpio-width = <4>;
		xlnx,dout-default = <0x0>;
		xlnx,is-dual = <0>;
		xlnx,ip-name = "axi_gpio";
		xlnx,tri-default-2 = <0xffffffff>;
		reg = <0x0 0xa4000000 0x0 0x10000>;
		xlnx,all-inputs-2 = <0>;
		clocks = <&misc_clk_0>;
		xlnx,all-outputs-2 = <0>;
		gpio-controller;
		xlnx,interrupt-present = <0>;
		xlnx,gpio2-board-interface = "Custom";
		xlnx,edk-iptype = "PERIPHERAL";
		xlnx,dout-default-2 = <0x0>;
		xlnx,gpio2-width = <32>;
		clock-names = "s_axi_aclk";
		xlnx,use-board-flow;
		xlnx,tri-default = <0xffffffff>;
		xlnx,name = "axi_gpio_2";
		xlnx,all-inputs = <1>;
	};
	axi_uart16550_0: serial@a4010000 {
		compatible = "xlnx,axi-uart16550-2.0" , "xlnx,axi-uart16550";
		xlnx,external-xin-clk-hz = <25000000>;
		xlnx,has-external-rclk = <0>;
		xlnx,s-axi-aclk-freq-hz-d = <100>;
		xlnx,use-user-ports = <1>;
		xlnx,sim-device = "VERSAL_AI_CORE";
		xlnx,uart-board-interface = "uart2_bank306";
		xlnx,ip-name = "axi_uart16550";
		reg = <0x0 0xa4010000 0x0 0x10000>;
		xlnx,has-external-xin = <0>;
		clocks = <&misc_clk_0>;
		xlnx,use-modem-ports = <1>;
		xlnx,edk-iptype = "PERIPHERAL";
		xlnx,external-xin-clk-hz-d = <25>;
		xlnx,clock-freq = <100000000>;
		clock-names = "s_axi_aclk";
		xlnx,use-board-flow;
		xlnx,base-user = <1>;
		xlnx,is-a-16550 = <1>;
		xlnx,name = "axi_uart16550_0";
	};
	aie_core_ref_clk_0: aie_core_ref_clk_0 {
		compatible = "fixed-clock";
		clock-frequency = <1250000000>;
		#clock-cells = <0>;
	};
	zyxclmm_drm {
		interrupts = <0x0 0x89 0x4>, <0x0 0x90 0x4>, <0x0 0x91 0x4>, <0x0 0x92 0x4>, <0x0 0x93 0x4>, <0x0 0x94 0x4>, <0x0 0x95 0x4>, <0x0 0x96 0x4>;
		interrupt-parent = <&gic>;
		compatible = "xlnx,zocl-versal";
	};
};
