/ {
	amba_pl: amba_pl {
		ranges;
		compatible = "simple-bus";
		#address-cells = <2>;
		#size-cells = <2>;
		firmware-name = "project_1.bit.bin";
		clocking3: clocking3 {
			compatible = "xlnx,fclk";
			status = "okay";
			assigned-clocks = <&zynqmp_clk 74>;
			assigned-clock-rates = <374996246>;
			#clock-cells = <0>;
			clock-output-names = "fabric_clk";
			clocks = <&zynqmp_clk 74>;
		};
		clocking2: clocking2 {
			compatible = "xlnx,fclk";
			status = "okay";
			assigned-clocks = <&zynqmp_clk 73>;
			assigned-clock-rates = <299997009>;
			#clock-cells = <0>;
			clock-output-names = "fabric_clk";
			clocks = <&zynqmp_clk 73>;
		};
		clocking1: clocking1 {
			compatible = "xlnx,fclk";
			status = "okay";
			assigned-clocks = <&zynqmp_clk 72>;
			assigned-clock-rates = <24999750>;
			#clock-cells = <0>;
			clock-output-names = "fabric_clk";
			clocks = <&zynqmp_clk 72>;
		};
		clocking0: clocking0 {
			compatible = "xlnx,fclk";
			status = "okay";
			assigned-clocks = <&zynqmp_clk 71>;
			assigned-clock-rates = <99999001>;
			#clock-cells = <0>;
			clock-output-names = "fabric_clk";
			clocks = <&zynqmp_clk 71>;
		};
		afi0: afi0 {
			status = "okay";
			compatible = "xlnx,afi-fpga";
			resets = <&zynqmp_reset 116>, <&zynqmp_reset 117>, <&zynqmp_reset 118>, <&zynqmp_reset 119>;
			config-afi = < 0 0>, <1 0>, <2 0>, <3 0>, <4 0>, <5 0>, <6 0>, <7 0>, <8 0>, <9 0>, <10 0>, <11 0>, <12 0>, <13 0>, <14 0xa00>, <15 0x000>;
		};
		SYSCTLR_SI5332: i2c@80000000 {
			interrupts = < 0 89 4 >;
			xlnx,iic-freq-khz = <100>;
			compatible = "xlnx,axi-iic-2.1" , "xlnx,xps-iic-2.00.a";
			xlnx,scl-inertial-delay = <0>;
			interrupt-parent = <&imux>;
			xlnx,rable = <0>;
			xlnx,ip-name = "axi_iic";
			xlnx,disable-setup-violation-check = <0>;
			reg = <0x0 0x80000000 0x0 0x1000>;
			clocks = <&zynqmp_clk 71>;
			xlnx,gpo-width = <1>;
			xlnx,edk-iptype = "PERIPHERAL";
			xlnx,static-timing-reg-width = <0>;
			xlnx,sda-level = <1>;
			status = "okay";
			clock-names = "s_axi_aclk";
			xlnx,ten-bit-adr = <0>;
			xlnx,default-value = <0x0>;
			interrupt-names = "iic2intc_irpt";
			xlnx,iic-board-interface = "Custom";
			xlnx,timing-reg-width = <32>;
			xlnx,iic-freq = <100000>;
			xlnx,smbus-pmbus-host = <0>;
			xlnx,name = "SYSCTLR_SI5332";
			xlnx,axi-aclk-freq-mhz = <0x5f5dd19>;
			xlnx,sda-inertial-delay = <0>;
		};
		debug_bridge_0: debug_bridge@80010000 {
			xlnx,xvc-sw-id = <0x1>;
			xlnx,fifo-style = "SUBCORE";
			compatible = "xlnx,debug-bridge-3.0" , "generic-uio";
			xlnx,pcie-ext-cfg-next-ptr = <0x0>;
			xlnx,num-bs-master = <0>;
			xlnx,pcie-ext-cfg-vsec-id = <0x8>;
			xlnx,major-version = <14>;
			xlnx,rable = <0>;
			xlnx,bscan-mux = <1>;
			xlnx,xvc-hw-id = <0x1>;
			xlnx,device-family = <0>;
			xlnx,dclk-has-reset = <0>;
			xlnx,ip-name = "debug_bridge";
			xlnx,ir-width = <0>;
			reg = <0x0 0x80010000 0x0 0x10000>;
			xlnx,core-minor-alpha-ver = <97>;
			clocks = <&zynqmp_clk 71>;
			xlnx,xsdb-num-slaves = <0>;
			xlnx,en-int-sim = <1>;
			xlnx,clk-input-freq-hz = <300000000>;
			xlnx,ir-id-instr = <0>;
			xlnx,edk-iptype = "PERIPHERAL";
			xlnx,pcie-ext-cfg-base-addr = <0x400>;
			xlnx,build-revision = <0>;
			xlnx,use-softbscan = <1>;
			xlnx,ir-user1-instr = <0>;
			xlnx,core-minor-ver = <0>;
			xlnx,pcie-ext-cfg-vsec-rev-id = <0x0>;
			status = "okay";
			xlnx,chip-id = <0>;
			clock-names = "s_axi_aclk";
			xlnx,use-ext-bscan;
			xlnx,tck-clock-ratio = <8>;
			xlnx,minor-version = <1>;
			xlnx,en-passthrough = <0>;
			xlnx,core-type = <1>;
			xlnx,user-scan-chain = <1>;
			xlnx,use-bufr = <0>;
			xlnx,pcie-ext-cfg-vsec-length = <0x20>;
			xlnx,master-intf-type = <1>;
			xlnx,design-type = <0>;
			xlnx,debug-mode = <3>;
			xlnx,name = "debug_bridge_0";
			xlnx,core-major-ver = <1>;
		};
	};
};
