/* Generated automatically by the program `genemit'
from the machine description file `md'.  */

#define IN_TARGET_CODE 1
#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "backend.h"
#include "predict.h"
#include "tree.h"
#include "rtl.h"
#include "alias.h"
#include "varasm.h"
#include "stor-layout.h"
#include "calls.h"
#include "memmodel.h"
#include "tm_p.h"
#include "flags.h"
#include "insn-config.h"
#include "expmed.h"
#include "dojump.h"
#include "explow.h"
#include "emit-rtl.h"
#include "stmt.h"
#include "expr.h"
#include "insn-codes.h"
#include "optabs.h"
#include "dfp.h"
#include "output.h"
#include "recog.h"
#include "df.h"
#include "resource.h"
#include "reload.h"
#include "diagnostic-core.h"
#include "regs.h"
#include "tm-constrs.h"
#include "ggc.h"
#include "target.h"

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:969 */
rtx
gen_addsi3_compareV_reg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	100),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_PLUS (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1),
	gen_rtx_SIGN_EXTEND (DImode,
	operand2)),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2))))),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1001 */
rtx
gen_subvsi3_intmin (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	100),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_PLUS (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1),
	GEN_INT (2147483648L)),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	GEN_INT (-2147483648L))))),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	GEN_INT (-2147483648L)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1017 */
rtx
gen_addsi3_compareV_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	100),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_PLUS (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1),
	operand2),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2))))),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1042 */
rtx
gen_addsi3_compareV_imm_nosum (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	100),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_PLUS (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand0),
	operand1),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_PLUS (SImode,
	operand0,
	operand1))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1105 */
rtx
gen_addsi3_compare0 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	100),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_PLUS (SImode,
	operand1,
	operand2),
	const0_rtx)),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1155 */
rtx
gen_cmpsi2_addneg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand2)),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	operand3))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1223 */
rtx
gen_addsi3_compare_op1 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Cmode,
	100),
	gen_rtx_COMPARE (CC_Cmode,
	gen_rtx_PLUS (SImode,
	operand1,
	operand2),
	copy_rtx (operand1))),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1319 */
rtx
gen_addsi3_carryin (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_PLUS (SImode,
	operand1,
	operand2),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1338 */
rtx
gen_add0si3_carryin (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	operand2,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1633 */
rtx
gen_subsi3_compare1 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand2)),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1646 */
rtx
gen_subvsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	100),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_MINUS (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1),
	gen_rtx_SIGN_EXTEND (DImode,
	operand2)),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2))))),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1663 */
rtx
gen_subvsi3_imm1 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	100),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_MINUS (DImode,
	operand1,
	gen_rtx_SIGN_EXTEND (DImode,
	operand2)),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2))))),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1678 */
rtx
gen_subsi3_carryin (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	gen_rtx_MINUS (SImode,
	operand1,
	operand2),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1696 */
rtx
gen_rsbsi_carryin_reg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1727 */
rtx
gen_add_not_shift_cin (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_PLUS (SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), SImode,
		operand1,
		operand2),
	gen_rtx_NOT (SImode,
	operand4)),
	operand5));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1742 */
rtx
gen_cmpsi3_carryin_CC_NVout (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NVmode,
	100),
	gen_rtx_COMPARE (CC_NVmode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1),
	gen_rtx_PLUS (DImode,
	operand3,
	gen_rtx_SIGN_EXTEND (DImode,
	operand2)))),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1742 */
rtx
gen_cmpsi3_carryin_CC_Bout (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Bmode,
	100),
	gen_rtx_COMPARE (CC_Bmode,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1),
	gen_rtx_PLUS (DImode,
	operand3,
	gen_rtx_ZERO_EXTEND (DImode,
	operand2)))),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1759 */
rtx
gen_cmpsi3_imm_carryin_CC_NVout (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NVmode,
	100),
	gen_rtx_COMPARE (CC_NVmode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1),
	gen_rtx_PLUS (DImode,
	operand3,
	operand2))),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1759 */
rtx
gen_cmpsi3_imm_carryin_CC_Bout (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Bmode,
	100),
	gen_rtx_COMPARE (CC_Bmode,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1),
	gen_rtx_PLUS (DImode,
	operand3,
	operand2))),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1775 */
rtx
gen_cmpsi3_0_carryin_CC_NVout (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NVmode,
	100),
	gen_rtx_COMPARE (CC_NVmode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1),
	operand2)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1775 */
rtx
gen_cmpsi3_0_carryin_CC_Bout (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Bmode,
	100),
	gen_rtx_COMPARE (CC_Bmode,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1),
	operand2)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2045 */
rtx
gen_subsi3_compare0 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	100),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_MINUS (SImode,
	operand1,
	operand2),
	const0_rtx)),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2062 */
rtx
gen_subsi3_compare (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand2)),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2080 */
rtx
gen_rsb_imm_compare (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_RSBmode,
	100),
	gen_rtx_COMPARE (CC_RSBmode,
	gen_rtx_NOT (SImode,
	operand2),
	operand3)),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	operand1,
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2094 */
rtx
gen_rsb_imm_compare_scratch (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_RSBmode,
	100),
	gen_rtx_COMPARE (CC_RSBmode,
	gen_rtx_NOT (SImode,
	operand2),
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2107 */
rtx
gen_rscsi3_CC_NVout_scratch (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_SWPmode,
	100),
	gen_rtx_COMPARE (CC_SWPmode,
	gen_rtx_PLUS (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand2),
	operand3),
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2107 */
rtx
gen_rscsi3_CC_Bout_scratch (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_SWPmode,
	100),
	gen_rtx_COMPARE (CC_SWPmode,
	gen_rtx_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	operand2),
	operand3),
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2120 */
rtx
gen_usubvsi3_borrow (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Bmode,
	100),
	gen_rtx_COMPARE (CC_Bmode,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1),
	gen_rtx_PLUS (DImode,
	operand4,
	gen_rtx_ZERO_EXTEND (DImode,
	operand2)))),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand1),
	gen_rtx_PLUS (SImode,
	operand3,
	copy_rtx (operand2))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2138 */
rtx
gen_usubvsi3_borrow_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Bmode,
	100),
	gen_rtx_COMPARE (CC_Bmode,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1),
	gen_rtx_PLUS (DImode,
	operand5,
	operand3))),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand1),
	gen_rtx_PLUS (SImode,
	operand4,
	operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2157 */
rtx
gen_subvsi3_borrow (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	100),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_MINUS (DImode,
	gen_rtx_MINUS (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1),
	gen_rtx_SIGN_EXTEND (DImode,
	operand2)),
	operand4),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_MINUS (SImode,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2)),
	operand3)))),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2)),
	copy_rtx (operand3)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2178 */
rtx
gen_subvsi3_borrow_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	100),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_MINUS (DImode,
	gen_rtx_MINUS (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1),
	operand2),
	operand4),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_MINUS (SImode,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2)),
	operand3)))),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2)),
	copy_rtx (operand3)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2420 */
rtx
gen_smull (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_MULT (SImode,
	operand2,
	operand3)),
		gen_rtx_SET (operand1,
	gen_rtx_TRUNCATE (SImode,
	gen_rtx_LSHIFTRT (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	copy_rtx (operand2)),
	gen_rtx_SIGN_EXTEND (DImode,
	copy_rtx (operand3))),
	const_int_rtx[MAX_SAVED_CONST_INT + (32)])))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2420 */
rtx
gen_umull (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_MULT (SImode,
	operand2,
	operand3)),
		gen_rtx_SET (operand1,
	gen_rtx_TRUNCATE (SImode,
	gen_rtx_LSHIFTRT (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	copy_rtx (operand2)),
	gen_rtx_ZERO_EXTEND (DImode,
	copy_rtx (operand3))),
	const_int_rtx[MAX_SAVED_CONST_INT + (32)])))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2455 */
rtx
gen_smlal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_MULT (SImode,
	operand4,
	operand5),
	operand1)),
		gen_rtx_SET (operand2,
	gen_rtx_PLUS (SImode,
	gen_rtx_TRUNCATE (SImode,
	gen_rtx_LSHIFTRT (DImode,
	gen_rtx_PLUS (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	copy_rtx (operand4)),
	gen_rtx_SIGN_EXTEND (DImode,
	copy_rtx (operand5))),
	gen_rtx_ZERO_EXTEND (DImode,
	copy_rtx (operand1))),
	const_int_rtx[MAX_SAVED_CONST_INT + (32)])),
	operand3))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2455 */
rtx
gen_umlal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_MULT (SImode,
	operand4,
	operand5),
	operand1)),
		gen_rtx_SET (operand2,
	gen_rtx_PLUS (SImode,
	gen_rtx_TRUNCATE (SImode,
	gen_rtx_LSHIFTRT (DImode,
	gen_rtx_PLUS (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	copy_rtx (operand4)),
	gen_rtx_ZERO_EXTEND (DImode,
	copy_rtx (operand5))),
	gen_rtx_ZERO_EXTEND (DImode,
	copy_rtx (operand1))),
	const_int_rtx[MAX_SAVED_CONST_INT + (32)])),
	operand3))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2508 */
rtx
gen_mulhisi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand1),
	gen_rtx_SIGN_EXTEND (SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2595 */
rtx
gen_arm_smlabb_setq (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_MULT (SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand1),
	gen_rtx_SIGN_EXTEND (SImode,
	operand2)),
	operand3)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	104),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	104)),
	28))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2628 */
rtx
gen_maddhisi4tb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_MULT (SImode,
	gen_rtx_ASHIFTRT (SImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)]),
	gen_rtx_SIGN_EXTEND (SImode,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2642 */
rtx
gen_arm_smlatb_setq (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_MULT (SImode,
	gen_rtx_ASHIFTRT (SImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)]),
	gen_rtx_SIGN_EXTEND (SImode,
	operand2)),
	operand3)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	104),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	104)),
	28))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2676 */
rtx
gen_maddhisi4tt (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_MULT (SImode,
	gen_rtx_ASHIFTRT (SImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)]),
	gen_rtx_ASHIFTRT (SImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)])),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2691 */
rtx
gen_arm_smlatt_setq (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_MULT (SImode,
	gen_rtx_ASHIFTRT (SImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)]),
	gen_rtx_ASHIFTRT (SImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)])),
	operand3)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	104),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	104)),
	28))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2725 */
rtx
gen_maddhidi4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1),
	gen_rtx_SIGN_EXTEND (DImode,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2771 */
rtx
gen_arm_smlawb_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	79));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2771 */
rtx
gen_arm_smlawb_setq_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	79)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	104),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	104)),
	28))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2771 */
rtx
gen_arm_smlawt_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	80));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2771 */
rtx
gen_arm_smlawt_setq_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	80)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	104),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	104)),
	28))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3481 */
rtx
gen_insv_zero (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_ZERO_EXTRACT (SImode,
	operand0,
	operand1,
	operand2),
	const0_rtx);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3505 */
rtx
gen_insv_t2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_ZERO_EXTRACT (SImode,
	operand0,
	operand1,
	operand2),
	operand3);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3587 */
rtx
gen_andsi_notsi_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (SImode,
	gen_rtx_NOT (SImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3597 */
rtx
gen_andsi_not_shiftsi_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (SImode,
	gen_rtx_NOT (SImode,
	gen_rtx_fmt_ee (GET_CODE (operand4), SImode,
		operand2,
		operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3614 */
rtx
gen_andsi_not_shiftsi_si_scc_no_reuse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	100),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_AND (SImode,
	gen_rtx_NOT (SImode,
	gen_rtx_fmt_ee (GET_CODE (operand0), SImode,
		operand1,
		operand2)),
	operand3),
	const0_rtx)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3634 */
rtx
gen_andsi_not_shiftsi_si_scc (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	100),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_AND (SImode,
	gen_rtx_NOT (SImode,
	gen_rtx_fmt_ee (GET_CODE (operand0), SImode,
		operand1,
		operand2)),
	operand3),
	const0_rtx)),
		gen_rtx_SET (operand4,
	gen_rtx_AND (SImode,
	gen_rtx_NOT (SImode,
	gen_rtx_fmt_ee (GET_CODE (operand0), GET_MODE (operand0),
		operand1,
		operand2)),
	operand3))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4342 */
rtx
gen_arm_qadd_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4342 */
rtx
gen_arm_qadd_setq_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (SImode,
	operand1,
	operand2)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	104),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	104)),
	28))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4342 */
rtx
gen_arm_qsub_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4342 */
rtx
gen_arm_qsub_setq_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (SImode,
	operand1,
	operand2)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	104),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	104)),
	28))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4402 */
rtx
gen_arm_get_apsr (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	104)),
	30));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4411 */
rtx
gen_arm_set_apsr (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_REG (CCmode,
	104),
	gen_rtx_UNSPEC_VOLATILE (CCmode,
	gen_rtvec (1,
		operand0),
	50));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4458 */
rtx
gen_satsi_smin (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (SImode,
	gen_rtx_SMAX (SImode,
	operand3,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4458 */
rtx
gen_satsi_smin_setq (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_SMIN (SImode,
	gen_rtx_SMAX (SImode,
	operand3,
	operand1),
	operand2)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	104),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	104)),
	28))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4458 */
rtx
gen_satsi_smax (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (SImode,
	gen_rtx_SMIN (SImode,
	operand3,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4458 */
rtx
gen_satsi_smax_setq (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_SMAX (SImode,
	gen_rtx_SMIN (SImode,
	operand3,
	operand1),
	operand2)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	104),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	104)),
	28))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4509 */
rtx
gen_arm_cx1si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	102));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4509 */
rtx
gen_arm_cx1di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	102));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4519 */
rtx
gen_arm_cx1asi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	103));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4519 */
rtx
gen_arm_cx1adi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	103));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4530 */
rtx
gen_arm_cx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	102));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4530 */
rtx
gen_arm_cx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	102));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4541 */
rtx
gen_arm_cx2asi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	103));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4541 */
rtx
gen_arm_cx2adi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	103));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4553 */
rtx
gen_arm_cx3si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	102));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4553 */
rtx
gen_arm_cx3di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	102));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4565 */
rtx
gen_arm_cx3asi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (5,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5),
	103));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4565 */
rtx
gen_arm_cx3adi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (5,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5),
	103));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4987 */
rtx
gen_unaligned_loaddi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	25));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4998 */
rtx
gen_unaligned_loadsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	25));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5017 */
rtx
gen_unaligned_loadhis (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (1,
		operand1),
	25)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5027 */
rtx
gen_unaligned_loadhiu (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (1,
		operand1),
	25)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5043 */
rtx
gen_unaligned_storedi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	26));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5054 */
rtx
gen_unaligned_storesi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	26));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5069 */
rtx
gen_unaligned_storehi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (1,
		operand1),
	26));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5099 */
rtx
gen_extzv_t2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTRACT (SImode,
	operand1,
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5115 */
rtx
gen_divsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_DIV (SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5128 */
rtx
gen_udivsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UDIV (SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5177 */
rtx
gen_negsi2_0compare (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_RSBmode,
	100),
	gen_rtx_COMPARE (CC_RSBmode,
	gen_rtx_NOT (SImode,
	operand1),
	constm1_rtx)),
		gen_rtx_SET (operand0,
	gen_rtx_NEG (SImode,
	copy_rtx (operand1)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5193 */
rtx
gen_negsi2_carryin (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	gen_rtx_NEG (SImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6038 */
rtx
gen_arm_sxtb16 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	45));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6038 */
rtx
gen_arm_uxtb16 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	46));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_qadd8 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	47));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_qsub8 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	48));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_shadd8 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	49));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_shsub8 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	50));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_uhadd8 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	51));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_uhsub8 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	52));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_uqadd8 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	53));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_uqsub8 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	54));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_qadd16 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	55));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_qasx (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	56));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_qsax (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	57));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_qsub16 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	58));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_shadd16 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	59));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_shasx (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	60));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_shsax (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	61));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_shsub16 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	62));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_uhadd16 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	63));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_uhasx (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	64));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_uhsax (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	65));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_uhsub16 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	66));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_uqadd16 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	67));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_uqasx (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	68));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_uqsax (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	69));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_uqsub16 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	70));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_smusd (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	71));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_smusdx (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	72));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_sxtab16 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	43));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_uxtab16 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	44));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6047 */
rtx
gen_arm_usad8 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	73));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6057 */
rtx
gen_arm_usada8 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	74));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6068 */
rtx
gen_arm_smlald (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	75));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6068 */
rtx
gen_arm_smlaldx (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	76));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6068 */
rtx
gen_arm_smlsld (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	77));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6068 */
rtx
gen_arm_smlsldx (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	78));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6079 */
rtx
gen_arm_sadd8 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	82)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	105),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	105)),
	29))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6079 */
rtx
gen_arm_ssub8 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	83)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	105),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	105)),
	29))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6079 */
rtx
gen_arm_uadd8 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	84)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	105),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	105)),
	29))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6079 */
rtx
gen_arm_usub8 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	85)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	105),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	105)),
	29))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6079 */
rtx
gen_arm_sadd16 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	86)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	105),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	105)),
	29))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6079 */
rtx
gen_arm_sasx (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	87)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	105),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	105)),
	29))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6079 */
rtx
gen_arm_ssax (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	88)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	105),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	105)),
	29))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6079 */
rtx
gen_arm_ssub16 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	89)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	105),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	105)),
	29))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6079 */
rtx
gen_arm_uadd16 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	90)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	105),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	105)),
	29))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6079 */
rtx
gen_arm_uasx (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	91)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	105),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	105)),
	29))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6079 */
rtx
gen_arm_usax (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	92)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	105),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	105)),
	29))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6079 */
rtx
gen_arm_usub16 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	93)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	105),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	105)),
	29))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6091 */
rtx
gen_arm_smlad_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	94));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6091 */
rtx
gen_arm_smlad_setq_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	94)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	104),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	104)),
	28))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6091 */
rtx
gen_arm_smladx_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	95));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6091 */
rtx
gen_arm_smladx_setq_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	95)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	104),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	104)),
	28))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6091 */
rtx
gen_arm_smlsd_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	96));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6091 */
rtx
gen_arm_smlsd_setq_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	96)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	104),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	104)),
	28))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6091 */
rtx
gen_arm_smlsdx_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	97));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6091 */
rtx
gen_arm_smlsdx_setq_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	97)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	104),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	104)),
	28))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6120 */
rtx
gen_arm_smuad_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	98));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6120 */
rtx
gen_arm_smuad_setq_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	98)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	104),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	104)),
	28))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6120 */
rtx
gen_arm_smuadx_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	99));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6120 */
rtx
gen_arm_smuadx_setq_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	99)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	104),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	104)),
	28))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6147 */
rtx
gen_arm_ssat16_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	100));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6147 */
rtx
gen_arm_ssat16_setq_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	100)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	104),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	104)),
	28))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6147 */
rtx
gen_arm_usat16_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	101));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6147 */
rtx
gen_arm_usat16_setq_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	101)),
		gen_rtx_SET (gen_rtx_REG (CCmode,
	104),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (CCmode,
	104)),
	28))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6174 */
rtx
gen_arm_sel (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_REG (CCmode,
	105)),
	81));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6671 */
rtx
gen_pic_load_addr_unified (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	27));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6694 */
rtx
gen_pic_load_addr_32bit (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6710 */
rtx
gen_pic_load_addr_thumb1 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6719 */
rtx
gen_pic_add_dot_plus_four (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		operand2),
	2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6735 */
rtx
gen_pic_add_dot_plus_eight (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		const_int_rtx[MAX_SAVED_CONST_INT + (8)],
		operand2),
	2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6751 */
rtx
gen_tls_load_dot_plus_eight (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MEM (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		const_int_rtx[MAX_SAVED_CONST_INT + (8)],
		operand2),
	2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7954 */
rtx
gen_arm_cond_branch (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		const0_rtx),
	gen_rtx_LABEL_REF (VOIDmode,
	operand0),
	pc_rtx));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8655 */
rtx
gen_restore_pic_register_after_call (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand0,
		operand1),
	42));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9234 */
rtx
gen_blockage (void)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		const0_rtx),
	0);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9245 */
rtx
gen_probe_stack (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		const0_rtx),
	38));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9254 */
rtx
gen_probe_stack_range (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	30));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9437 */
rtx
gen_arm_stack_protect_test_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (gen_rtx_REG (CC_Zmode,
	100),
	gen_rtx_COMPARE (CC_Zmode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MEM (SImode,
	operand2)),
	41),
	const0_rtx)),
		gen_rtx_CLOBBER (VOIDmode,
	operand0),
		gen_rtx_CLOBBER (VOIDmode,
	copy_rtx (operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9467 */
rtx
gen_stack_protect_set_tls (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	40)),
		gen_rtx_SET (gen_rtx_SCRATCH (SImode),
	const0_rtx)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9496 */
rtx
gen_stack_protect_test_tls (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (gen_rtx_REG (CC_Zmode,
	100),
	gen_rtx_COMPARE (CC_Zmode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand0,
		operand1),
	41),
	const0_rtx)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9632 */
rtx
gen_nop (void)
{
  return const0_rtx;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9643 */
rtx
gen_trap (void)
{
  return gen_rtx_TRAP_IF (VOIDmode,
	const1_rtx,
	const0_rtx);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:10740 */
rtx
gen_movcond_addsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	gen_rtx_fmt_ee (GET_CODE (operand5), VOIDmode,
		gen_rtx_PLUS (SImode,
	operand3,
	operand4),
		const0_rtx),
	operand1,
	operand2)),
		gen_hard_reg_clobber (CCmode, 100)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:10781 */
rtx
gen_movcond (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	gen_rtx_fmt_ee (GET_CODE (operand5), VOIDmode,
		operand3,
		operand4),
	operand1,
	operand2)),
		gen_hard_reg_clobber (CCmode, 100)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:11902 */
rtx
gen_stack_tie (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand0,
		operand1),
	3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12043 */
rtx
gen_align_4 (void)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		const0_rtx),
	3);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12053 */
rtx
gen_align_8 (void)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		const0_rtx),
	12);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12063 */
rtx
gen_consttable_end (void)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		const0_rtx),
	4);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12073 */
rtx
gen_consttable_1 (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		operand0),
	5);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12086 */
rtx
gen_consttable_2 (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		operand0),
	6);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12109 */
rtx
gen_consttable_4 (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		operand0),
	7);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12137 */
rtx
gen_consttable_8 (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		operand0),
	8);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12155 */
rtx
gen_consttable_16 (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		operand0),
	9);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12175 */
rtx
gen_clzsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12183 */
rtx
gen_rbitsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	22));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12195 */
rtx
gen_ctzsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CTZ (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12210 */
rtx
gen_prefetch (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PREFETCH (VOIDmode,
	operand0,
	operand1,
	operand2);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12231 */
rtx
gen_force_register_use (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand0),
	4);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12256 */
rtx
gen_arm_eh_return (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		operand0),
	16),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12274 */
rtx
gen_load_tp_hard (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		const0_rtx),
	17));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12284 */
rtx
gen_reload_tp_hard (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		const0_rtx),
	43));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12293 */
rtx
gen_load_tp_soft_fdpic (void)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (gen_rtx_REG (SImode,
	0),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		const0_rtx),
	17)),
		gen_hard_reg_clobber (SImode, 9),
		gen_hard_reg_clobber (SImode, 14),
		gen_hard_reg_clobber (SImode, 12),
		gen_hard_reg_clobber (CCmode, 100)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12306 */
rtx
gen_load_tp_soft (void)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (gen_rtx_REG (SImode,
	0),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		const0_rtx),
	17)),
		gen_hard_reg_clobber (SImode, 14),
		gen_hard_reg_clobber (SImode, 12),
		gen_hard_reg_clobber (CCmode, 100)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12318 */
rtx
gen_tlscall (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (gen_rtx_REG (SImode,
	0),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		gen_rtx_REG (SImode,
	0),
		operand0,
		operand1),
	17)),
		gen_hard_reg_clobber (SImode, 1),
		gen_hard_reg_clobber (SImode, 14),
		gen_hard_reg_clobber (SImode, 100)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12567 */
rtx
gen_arm_rev16si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (SImode,
	gen_rtx_AND (SImode,
	gen_rtx_ASHIFT (SImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (8)]),
	operand3),
	gen_rtx_AND (SImode,
	gen_rtx_LSHIFTRT (SImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (8)]),
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12584 */
rtx
gen_arm_rev16si2_alt (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (SImode,
	gen_rtx_AND (SImode,
	gen_rtx_LSHIFTRT (SImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (8)]),
	operand2),
	gen_rtx_AND (SImode,
	gen_rtx_ASHIFT (SImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (8)]),
	operand3)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12695 */
rtx
gen_arm_crc32b (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	123));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12695 */
rtx
gen_arm_crc32h (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	124));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12695 */
rtx
gen_arm_crc32w (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	125));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12695 */
rtx
gen_arm_crc32cb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	126));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12695 */
rtx
gen_arm_crc32ch (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12695 */
rtx
gen_arm_crc32cw (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12835 */
rtx
gen_arm_cdp (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (6,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5),
	31);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12835 */
rtx
gen_arm_cdp2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (6,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5),
	32);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12893 */
rtx
gen_arm_mcr (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (6,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5),
	41),
		gen_rtx_USE (VOIDmode,
	copy_rtx (operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12893 */
rtx
gen_arm_mcr2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (6,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5),
	42),
		gen_rtx_USE (VOIDmode,
	copy_rtx (operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12913 */
rtx
gen_arm_mrc (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (5,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5),
	43));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12913 */
rtx
gen_arm_mrc2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (5,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5),
	44));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12932 */
rtx
gen_arm_mcrr (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	45),
		gen_rtx_USE (VOIDmode,
	copy_rtx (operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12932 */
rtx
gen_arm_mcrr2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	46),
		gen_rtx_USE (VOIDmode,
	copy_rtx (operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12948 */
rtx
gen_arm_mrrc (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	47));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12948 */
rtx
gen_arm_mrrc2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	48));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12990 */
rtx
gen_pac_nop (void)
{
  return gen_rtx_SET (gen_rtx_REG (SImode,
	12),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		gen_rtx_REG (SImode,
	13),
		gen_rtx_REG (SImode,
	14)),
	107));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12998 */
rtx
gen_pacbti_nop (void)
{
  return gen_rtx_SET (gen_rtx_REG (SImode,
	12),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_REG (SImode,
	13),
		gen_rtx_REG (SImode,
	14)),
	56));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:13006 */
rtx
gen_aut_nop (void)
{
  return gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (3,
		gen_rtx_REG (SImode,
	12),
		gen_rtx_REG (SImode,
	13),
		gen_rtx_REG (SImode,
	14)),
	57);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:13013 */
rtx
gen_bti_nop (void)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		const0_rtx),
	58);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:360 */
rtx
gen_mve_vshlq_sv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	450));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:360 */
rtx
gen_mve_vshlq_uv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	451));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:360 */
rtx
gen_mve_vshlq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	450));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:360 */
rtx
gen_mve_vshlq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	451));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:360 */
rtx
gen_mve_vshlq_sv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	450));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:360 */
rtx
gen_mve_vshlq_uv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	451));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:360 */
rtx
gen_mve_vshlq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	450));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:360 */
rtx
gen_mve_vshlq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	451));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:360 */
rtx
gen_mve_vshlq_sv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	450));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:360 */
rtx
gen_mve_vshlq_uv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	451));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:360 */
rtx
gen_mve_vshlq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	450));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:360 */
rtx
gen_mve_vshlq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	451));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:30 */
rtx
gen_tbcstv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:39 */
rtx
gen_tbcstv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:48 */
rtx
gen_tbcstv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:57 */
rtx
gen_iwmmxt_iordi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:68 */
rtx
gen_iwmmxt_xordi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:79 */
rtx
gen_iwmmxt_anddi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:90 */
rtx
gen_iwmmxt_nanddi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (DImode,
	operand1,
	gen_rtx_NOT (DImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:226 */
rtx
gen_movv2si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	operand1);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:226 */
rtx
gen_movv4hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	operand1);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:226 */
rtx
gen_movv8qi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	operand1);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:347 */
rtx
gen_ssaddv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:357 */
rtx
gen_ssaddv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:367 */
rtx
gen_ssaddv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:377 */
rtx
gen_usaddv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:387 */
rtx
gen_usaddv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:397 */
rtx
gen_usaddv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:417 */
rtx
gen_sssubv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:427 */
rtx
gen_sssubv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:437 */
rtx
gen_sssubv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:447 */
rtx
gen_ussubv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:457 */
rtx
gen_ussubv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:467 */
rtx
gen_ussubv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:487 */
rtx
gen_smulv4hi3_highpart (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V4HImode,
	gen_rtx_LSHIFTRT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2)),
	const_int_rtx[MAX_SAVED_CONST_INT + (16)])));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:500 */
rtx
gen_umulv4hi3_highpart (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V4HImode,
	gen_rtx_LSHIFTRT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2)),
	const_int_rtx[MAX_SAVED_CONST_INT + (16)])));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:513 */
rtx
gen_iwmmxt_wmacs (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	11));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:524 */
rtx
gen_iwmmxt_wmacsz (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	13));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:534 */
rtx
gen_iwmmxt_wmacu (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	12));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:545 */
rtx
gen_iwmmxt_wmacuz (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	14));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:557 */
rtx
gen_iwmmxt_clrdi (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		const0_rtx),
	15));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:568 */
rtx
gen_iwmmxt_clrv8qi (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CONST_VECTOR (V8QImode,
	gen_rtvec (8,
		const0_rtx,
		const0_rtx,
		const0_rtx,
		const0_rtx,
		const0_rtx,
		const0_rtx,
		const0_rtx,
		const0_rtx)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:580 */
rtx
gen_iwmmxt_clrv4hi (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CONST_VECTOR (V4HImode,
	gen_rtvec (4,
		const0_rtx,
		const0_rtx,
		const0_rtx,
		const0_rtx)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:590 */
rtx
gen_iwmmxt_clrv2si (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CONST_VECTOR (V2SImode,
	gen_rtvec (2,
		const0_rtx,
		const0_rtx)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:601 */
rtx
gen_iwmmxt_uavgrndv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V8QImode,
	gen_rtx_LSHIFTRT (V8HImode,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand2)),
	gen_rtx_CONST_VECTOR (V8HImode,
	gen_rtvec (8,
		const1_rtx,
		const1_rtx,
		const1_rtx,
		const1_rtx,
		const1_rtx,
		const1_rtx,
		const1_rtx,
		const1_rtx))),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:623 */
rtx
gen_iwmmxt_uavgrndv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V4HImode,
	gen_rtx_LSHIFTRT (V4SImode,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2)),
	gen_rtx_CONST_VECTOR (V4SImode,
	gen_rtvec (4,
		const1_rtx,
		const1_rtx,
		const1_rtx,
		const1_rtx))),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:641 */
rtx
gen_iwmmxt_uavgv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V8QImode,
	gen_rtx_LSHIFTRT (V8HImode,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand2)),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:654 */
rtx
gen_iwmmxt_uavgv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V4HImode,
	gen_rtx_LSHIFTRT (V4SImode,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2)),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:669 */
rtx
gen_iwmmxt_tinsrb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V8QImode,
	gen_rtx_VEC_DUPLICATE (V8QImode,
	gen_rtx_TRUNCATE (QImode,
	operand2)),
	operand1,
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:686 */
rtx
gen_iwmmxt_tinsrh (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V4HImode,
	gen_rtx_VEC_DUPLICATE (V4HImode,
	gen_rtx_TRUNCATE (HImode,
	operand2)),
	operand1,
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:703 */
rtx
gen_iwmmxt_tinsrw (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V2SImode,
	gen_rtx_VEC_DUPLICATE (V2SImode,
	operand2),
	operand1,
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:720 */
rtx
gen_iwmmxt_textrmub (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:731 */
rtx
gen_iwmmxt_textrmsb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:742 */
rtx
gen_iwmmxt_textrmuh (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:753 */
rtx
gen_iwmmxt_textrmsh (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:766 */
rtx
gen_iwmmxt_textrmw (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:776 */
rtx
gen_iwmmxt_wshufh (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	6));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:797 */
rtx
gen_eqv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	13));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:808 */
rtx
gen_eqv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	13));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:819 */
rtx
gen_eqv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	13));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:831 */
rtx
gen_gtuv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	14));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:842 */
rtx
gen_gtuv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	14));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:853 */
rtx
gen_gtuv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	14));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:864 */
rtx
gen_gtv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	15));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:875 */
rtx
gen_gtv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	15));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:886 */
rtx
gen_gtv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	15));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:941 */
rtx
gen_iwmmxt_wpackhss (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8QImode,
	gen_rtx_SS_TRUNCATE (V4QImode,
	operand1),
	gen_rtx_SS_TRUNCATE (V4QImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:952 */
rtx
gen_iwmmxt_wpackwss (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4HImode,
	gen_rtx_SS_TRUNCATE (V2HImode,
	operand1),
	gen_rtx_SS_TRUNCATE (V2HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:963 */
rtx
gen_iwmmxt_wpackdss (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V2SImode,
	gen_rtx_SS_TRUNCATE (SImode,
	operand1),
	gen_rtx_SS_TRUNCATE (SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:974 */
rtx
gen_iwmmxt_wpackhus (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8QImode,
	gen_rtx_US_TRUNCATE (V4QImode,
	operand1),
	gen_rtx_US_TRUNCATE (V4QImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:985 */
rtx
gen_iwmmxt_wpackwus (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4HImode,
	gen_rtx_US_TRUNCATE (V2HImode,
	operand1),
	gen_rtx_US_TRUNCATE (V2HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:996 */
rtx
gen_iwmmxt_wpackdus (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V2SImode,
	gen_rtx_US_TRUNCATE (SImode,
	operand1),
	gen_rtx_US_TRUNCATE (SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1007 */
rtx
gen_iwmmxt_wunpckihb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V8QImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (8,
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (6)],
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (7)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))),
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (8,
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (6)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)],
		const_int_rtx[MAX_SAVED_CONST_INT + (7)]))),
	GEN_INT (85L)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1035 */
rtx
gen_iwmmxt_wunpckihh (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V4HImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)],
		const1_rtx))),
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))),
	const_int_rtx[MAX_SAVED_CONST_INT + (5)]));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1055 */
rtx
gen_iwmmxt_wunpckihw (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V2SImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const1_rtx,
		const0_rtx))),
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const1_rtx))),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1071 */
rtx
gen_iwmmxt_wunpckilb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V8QImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (8,
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (6)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)],
		const_int_rtx[MAX_SAVED_CONST_INT + (7)]))),
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (8,
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (6)],
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (7)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))),
	GEN_INT (85L)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1099 */
rtx
gen_iwmmxt_wunpckilh (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V4HImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))),
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)],
		const1_rtx))),
	const_int_rtx[MAX_SAVED_CONST_INT + (5)]));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1119 */
rtx
gen_iwmmxt_wunpckilw (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V2SImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const1_rtx))),
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const1_rtx,
		const0_rtx))),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1135 */
rtx
gen_iwmmxt_wunpckehub (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V4HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const_int_rtx[MAX_SAVED_CONST_INT + (6)],
		const_int_rtx[MAX_SAVED_CONST_INT + (7)]))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1147 */
rtx
gen_iwmmxt_wunpckehuh (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1158 */
rtx
gen_iwmmxt_wunpckehuw (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const1_rtx))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1169 */
rtx
gen_iwmmxt_wunpckehsb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V4HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const_int_rtx[MAX_SAVED_CONST_INT + (6)],
		const_int_rtx[MAX_SAVED_CONST_INT + (7)]))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1181 */
rtx
gen_iwmmxt_wunpckehsh (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1192 */
rtx
gen_iwmmxt_wunpckehsw (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const1_rtx))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1203 */
rtx
gen_iwmmxt_wunpckelub (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V4HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const0_rtx,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1215 */
rtx
gen_iwmmxt_wunpckeluh (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const1_rtx))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1226 */
rtx
gen_iwmmxt_wunpckeluw (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const0_rtx))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1237 */
rtx
gen_iwmmxt_wunpckelsb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V4HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const0_rtx,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1249 */
rtx
gen_iwmmxt_wunpckelsh (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const1_rtx))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1260 */
rtx
gen_iwmmxt_wunpckelsw (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const0_rtx))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1273 */
rtx
gen_rorv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ROTATERT (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1273 */
rtx
gen_rorv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ROTATERT (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1273 */
rtx
gen_rordi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ROTATERT (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1294 */
rtx
gen_ashrv4hi3_iwmmxt (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1294 */
rtx
gen_ashrv2si3_iwmmxt (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1294 */
rtx
gen_ashrdi3_iwmmxt (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1315 */
rtx
gen_lshrv4hi3_iwmmxt (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1315 */
rtx
gen_lshrv2si3_iwmmxt (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1315 */
rtx
gen_lshrdi3_iwmmxt (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1336 */
rtx
gen_ashlv4hi3_iwmmxt (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1336 */
rtx
gen_ashlv2si3_iwmmxt (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1336 */
rtx
gen_ashldi3_iwmmxt (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1357 */
rtx
gen_rorv4hi3_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ROTATERT (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1357 */
rtx
gen_rorv2si3_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ROTATERT (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1357 */
rtx
gen_rordi3_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ROTATERT (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1378 */
rtx
gen_ashrv4hi3_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1378 */
rtx
gen_ashrv2si3_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1378 */
rtx
gen_ashrdi3_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1399 */
rtx
gen_lshrv4hi3_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1399 */
rtx
gen_lshrv2si3_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1399 */
rtx
gen_lshrdi3_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1420 */
rtx
gen_ashlv4hi3_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1420 */
rtx
gen_ashlv2si3_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1420 */
rtx
gen_ashldi3_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1441 */
rtx
gen_iwmmxt_wmadds (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_MULT (V2SImode,
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))),
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)])))),
	gen_rtx_MULT (V2SImode,
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)]))),
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)]))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1460 */
rtx
gen_iwmmxt_wmaddu (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_MULT (V2SImode,
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))),
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)])))),
	gen_rtx_MULT (V2SImode,
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)]))),
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)]))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1479 */
rtx
gen_iwmmxt_tmia (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand2),
	gen_rtx_SIGN_EXTEND (DImode,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1492 */
rtx
gen_iwmmxt_tmiaph (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	gen_rtx_PLUS (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_TRUNCATE (HImode,
	operand2)),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_TRUNCATE (HImode,
	operand3))),
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_TRUNCATE (HImode,
	gen_rtx_ASHIFTRT (SImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)]))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_TRUNCATE (HImode,
	gen_rtx_ASHIFTRT (SImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)])))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1510 */
rtx
gen_iwmmxt_tmiabb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_TRUNCATE (HImode,
	operand2)),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_TRUNCATE (HImode,
	operand3)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1523 */
rtx
gen_iwmmxt_tmiatb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_TRUNCATE (HImode,
	gen_rtx_ASHIFTRT (SImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)]))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_TRUNCATE (HImode,
	operand3)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1540 */
rtx
gen_iwmmxt_tmiabt (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_TRUNCATE (HImode,
	operand2)),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_TRUNCATE (HImode,
	gen_rtx_ASHIFTRT (SImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)]))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1557 */
rtx
gen_iwmmxt_tmiatt (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_TRUNCATE (HImode,
	gen_rtx_ASHIFTRT (SImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)]))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_TRUNCATE (HImode,
	gen_rtx_ASHIFTRT (SImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)]))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1576 */
rtx
gen_iwmmxt_tmovmskb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	8));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1585 */
rtx
gen_iwmmxt_tmovmskh (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	8));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1594 */
rtx
gen_iwmmxt_tmovmskw (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	8));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1603 */
rtx
gen_iwmmxt_waccb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	7));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1612 */
rtx
gen_iwmmxt_wacch (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	7));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1621 */
rtx
gen_iwmmxt_waccw (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	7));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1631 */
rtx
gen_iwmmxt_waligni (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		gen_rtx_SUBREG (V8QImode,
	gen_rtx_ASHIFTRT (TImode,
	gen_rtx_SUBREG (TImode,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	operand2),
	0),
	gen_rtx_MULT (SImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (8)])),
	0)),
	16));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1647 */
rtx
gen_iwmmxt_walignr (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SUBREG (V8QImode,
	gen_rtx_ASHIFTRT (TImode,
	gen_rtx_SUBREG (TImode,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	operand2),
	0),
	gen_rtx_MULT (SImode,
	gen_rtx_ZERO_EXTRACT (SImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (3)],
	const0_rtx),
	const_int_rtx[MAX_SAVED_CONST_INT + (8)])),
	0));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1662 */
rtx
gen_iwmmxt_walignr0 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SUBREG (V8QImode,
	gen_rtx_ASHIFTRT (TImode,
	gen_rtx_SUBREG (TImode,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	operand2),
	0),
	gen_rtx_MULT (SImode,
	gen_rtx_ZERO_EXTRACT (SImode,
	gen_rtx_REG (SImode,
	96),
	const_int_rtx[MAX_SAVED_CONST_INT + (3)],
	const0_rtx),
	const_int_rtx[MAX_SAVED_CONST_INT + (8)])),
	0));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1677 */
rtx
gen_iwmmxt_walignr1 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SUBREG (V8QImode,
	gen_rtx_ASHIFTRT (TImode,
	gen_rtx_SUBREG (TImode,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	operand2),
	0),
	gen_rtx_MULT (SImode,
	gen_rtx_ZERO_EXTRACT (SImode,
	gen_rtx_REG (SImode,
	97),
	const_int_rtx[MAX_SAVED_CONST_INT + (3)],
	const0_rtx),
	const_int_rtx[MAX_SAVED_CONST_INT + (8)])),
	0));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1692 */
rtx
gen_iwmmxt_walignr2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SUBREG (V8QImode,
	gen_rtx_ASHIFTRT (TImode,
	gen_rtx_SUBREG (TImode,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	operand2),
	0),
	gen_rtx_MULT (SImode,
	gen_rtx_ZERO_EXTRACT (SImode,
	gen_rtx_REG (SImode,
	98),
	const_int_rtx[MAX_SAVED_CONST_INT + (3)],
	const0_rtx),
	const_int_rtx[MAX_SAVED_CONST_INT + (8)])),
	0));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1707 */
rtx
gen_iwmmxt_walignr3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SUBREG (V8QImode,
	gen_rtx_ASHIFTRT (TImode,
	gen_rtx_SUBREG (TImode,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	operand2),
	0),
	gen_rtx_MULT (SImode,
	gen_rtx_ZERO_EXTRACT (SImode,
	gen_rtx_REG (SImode,
	99),
	const_int_rtx[MAX_SAVED_CONST_INT + (3)],
	const0_rtx),
	const_int_rtx[MAX_SAVED_CONST_INT + (8)])),
	0));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1722 */
rtx
gen_iwmmxt_wsadb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	9));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1734 */
rtx
gen_iwmmxt_wsadh (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	9));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1746 */
rtx
gen_iwmmxt_wsadbz (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	10));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:1756 */
rtx
gen_iwmmxt_wsadhz (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	10));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:21 */
rtx
gen_iwmmxt_wabsv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	109));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:21 */
rtx
gen_iwmmxt_wabsv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	109));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:21 */
rtx
gen_iwmmxt_wabsv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	109));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:30 */
rtx
gen_iwmmxt_wabsdiffb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V8QImode,
	gen_rtx_ABS (V8HImode,
	gen_rtx_MINUS (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:43 */
rtx
gen_iwmmxt_wabsdiffh (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V4HImode,
	gen_rtx_ABS (V4SImode,
	gen_rtx_MINUS (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:56 */
rtx
gen_iwmmxt_wabsdiffw (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V2SImode,
	gen_rtx_ABS (V2DImode,
	gen_rtx_MINUS (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:69 */
rtx
gen_iwmmxt_waddsubhx (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V4HImode,
	gen_rtx_SS_MINUS (V4HImode,
	operand1,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const1_rtx,
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)],
		const_int_rtx[MAX_SAVED_CONST_INT + (2)])))),
	gen_rtx_SS_PLUS (V4HImode,
	operand1,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const1_rtx,
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)],
		const_int_rtx[MAX_SAVED_CONST_INT + (2)])))),
	const_int_rtx[MAX_SAVED_CONST_INT + (10)]));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:87 */
rtx
gen_iwmmxt_wsubaddhx (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V4HImode,
	gen_rtx_SS_PLUS (V4HImode,
	operand1,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const1_rtx,
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)],
		const_int_rtx[MAX_SAVED_CONST_INT + (2)])))),
	gen_rtx_SS_MINUS (V4HImode,
	operand1,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const1_rtx,
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)],
		const_int_rtx[MAX_SAVED_CONST_INT + (2)])))),
	const_int_rtx[MAX_SAVED_CONST_INT + (10)]));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:105 */
rtx
gen_addcv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		gen_rtx_PLUS (V4HImode,
	operand1,
	operand2)),
	108));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:105 */
rtx
gen_addcv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		gen_rtx_PLUS (V2SImode,
	operand1,
	operand2)),
	108));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:117 */
rtx
gen_iwmmxt_avg4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V8QImode,
	gen_rtx_VEC_SELECT (V8HImode,
	gen_rtx_VEC_MERGE (V8HImode,
	gen_rtx_LSHIFTRT (V8HImode,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand2)),
	gen_rtx_VEC_SELECT (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (8,
		const_int_rtx[MAX_SAVED_CONST_INT + (7)],
		const0_rtx,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)],
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const_int_rtx[MAX_SAVED_CONST_INT + (6)])))),
	gen_rtx_VEC_SELECT (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand2),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (8,
		const_int_rtx[MAX_SAVED_CONST_INT + (7)],
		const0_rtx,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)],
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const_int_rtx[MAX_SAVED_CONST_INT + (6)])))),
	gen_rtx_CONST_VECTOR (V8HImode,
	gen_rtvec (8,
		const1_rtx,
		const1_rtx,
		const1_rtx,
		const1_rtx,
		const1_rtx,
		const1_rtx,
		const1_rtx,
		const1_rtx))),
	const_int_rtx[MAX_SAVED_CONST_INT + (2)]),
	gen_rtx_CONST_VECTOR (V8HImode,
	gen_rtvec (8,
		const0_rtx,
		const0_rtx,
		const0_rtx,
		const0_rtx,
		const0_rtx,
		const0_rtx,
		const0_rtx,
		const0_rtx)),
	GEN_INT (254L)),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (8,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)],
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const_int_rtx[MAX_SAVED_CONST_INT + (6)],
		const_int_rtx[MAX_SAVED_CONST_INT + (7)],
		const0_rtx)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:149 */
rtx
gen_iwmmxt_avg4r (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V8QImode,
	gen_rtx_VEC_SELECT (V8HImode,
	gen_rtx_VEC_MERGE (V8HImode,
	gen_rtx_LSHIFTRT (V8HImode,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand2)),
	gen_rtx_VEC_SELECT (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (8,
		const_int_rtx[MAX_SAVED_CONST_INT + (7)],
		const0_rtx,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)],
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const_int_rtx[MAX_SAVED_CONST_INT + (6)])))),
	gen_rtx_VEC_SELECT (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand2),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (8,
		const_int_rtx[MAX_SAVED_CONST_INT + (7)],
		const0_rtx,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)],
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const_int_rtx[MAX_SAVED_CONST_INT + (6)])))),
	gen_rtx_CONST_VECTOR (V8HImode,
	gen_rtvec (8,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (2)]))),
	const_int_rtx[MAX_SAVED_CONST_INT + (2)]),
	gen_rtx_CONST_VECTOR (V8HImode,
	gen_rtvec (8,
		const0_rtx,
		const0_rtx,
		const0_rtx,
		const0_rtx,
		const0_rtx,
		const0_rtx,
		const0_rtx,
		const0_rtx)),
	GEN_INT (254L)),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (8,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)],
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const_int_rtx[MAX_SAVED_CONST_INT + (6)],
		const_int_rtx[MAX_SAVED_CONST_INT + (7)],
		const0_rtx)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:181 */
rtx
gen_iwmmxt_wmaddsx (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_MULT (V2SImode,
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))),
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)])))),
	gen_rtx_MULT (V2SImode,
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)]))),
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:200 */
rtx
gen_iwmmxt_wmaddux (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_MULT (V2SImode,
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))),
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)])))),
	gen_rtx_MULT (V2SImode,
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)]))),
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:219 */
rtx
gen_iwmmxt_wmaddsn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2SImode,
	gen_rtx_MULT (V2SImode,
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)]))),
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)])))),
	gen_rtx_MULT (V2SImode,
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))),
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:238 */
rtx
gen_iwmmxt_wmaddun (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2SImode,
	gen_rtx_MULT (V2SImode,
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)]))),
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)])))),
	gen_rtx_MULT (V2SImode,
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))),
	gen_rtx_VEC_SELECT (V2SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2),
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:257 */
rtx
gen_iwmmxt_wmulwsm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V2SImode,
	gen_rtx_ASHIFTRT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand1),
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2)),
	const_int_rtx[MAX_SAVED_CONST_INT + (32)])));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:271 */
rtx
gen_iwmmxt_wmulwum (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V2SImode,
	gen_rtx_LSHIFTRT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand2)),
	const_int_rtx[MAX_SAVED_CONST_INT + (32)])));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:285 */
rtx
gen_iwmmxt_wmulsmr (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V4HImode,
	gen_rtx_ASHIFTRT (V4SImode,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2)),
	gen_rtx_CONST_VECTOR (V4SImode,
	gen_rtvec (3,
		GEN_INT (32768L),
		GEN_INT (32768L),
		GEN_INT (32768L)))),
	const_int_rtx[MAX_SAVED_CONST_INT + (16)])));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:303 */
rtx
gen_iwmmxt_wmulumr (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V4HImode,
	gen_rtx_LSHIFTRT (V4SImode,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2)),
	gen_rtx_CONST_VECTOR (V4SImode,
	gen_rtvec (4,
		GEN_INT (32768L),
		GEN_INT (32768L),
		GEN_INT (32768L),
		GEN_INT (32768L)))),
	const_int_rtx[MAX_SAVED_CONST_INT + (16)])));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:322 */
rtx
gen_iwmmxt_wmulwsmr (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V2SImode,
	gen_rtx_ASHIFTRT (V2DImode,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand1),
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2)),
	gen_rtx_CONST_VECTOR (V2DImode,
	gen_rtvec (2,
		GEN_INT (2147483648L),
		GEN_INT (2147483648L)))),
	const_int_rtx[MAX_SAVED_CONST_INT + (32)])));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:339 */
rtx
gen_iwmmxt_wmulwumr (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V2SImode,
	gen_rtx_LSHIFTRT (V2DImode,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand2)),
	gen_rtx_CONST_VECTOR (V2DImode,
	gen_rtvec (2,
		GEN_INT (2147483648L),
		GEN_INT (2147483648L)))),
	const_int_rtx[MAX_SAVED_CONST_INT + (32)])));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:356 */
rtx
gen_iwmmxt_wmulwl (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:367 */
rtx
gen_iwmmxt_wqmulm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	113));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:377 */
rtx
gen_iwmmxt_wqmulwm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	112));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:387 */
rtx
gen_iwmmxt_wqmulmr (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	111));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:397 */
rtx
gen_iwmmxt_wqmulwmr (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	110));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:407 */
rtx
gen_iwmmxt_waddbhusm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8QImode,
	gen_rtx_CONST_VECTOR (V4QImode,
	gen_rtvec (4,
		const0_rtx,
		const0_rtx,
		const0_rtx,
		const0_rtx)),
	gen_rtx_US_TRUNCATE (V4QImode,
	gen_rtx_SS_PLUS (V4HImode,
	operand1,
	gen_rtx_ZERO_EXTEND (V4HImode,
	gen_rtx_VEC_SELECT (V4QImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const_int_rtx[MAX_SAVED_CONST_INT + (6)],
		const_int_rtx[MAX_SAVED_CONST_INT + (7)]))))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:423 */
rtx
gen_iwmmxt_waddbhusl (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8QImode,
	gen_rtx_US_TRUNCATE (V4QImode,
	gen_rtx_SS_PLUS (V4HImode,
	operand1,
	gen_rtx_ZERO_EXTEND (V4HImode,
	gen_rtx_VEC_SELECT (V4QImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const0_rtx,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)])))))),
	gen_rtx_CONST_VECTOR (V4QImode,
	gen_rtvec (4,
		const0_rtx,
		const0_rtx,
		const0_rtx,
		const0_rtx))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:439 */
rtx
gen_iwmmxt_wqmiabb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (5,
		operand1,
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const0_rtx),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (32)]),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const0_rtx),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (32)])),
	115));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:452 */
rtx
gen_iwmmxt_wqmiabt (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (5,
		operand1,
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const0_rtx),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (32)]),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (16)]),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (48)])),
	115));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:465 */
rtx
gen_iwmmxt_wqmiatb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (5,
		operand1,
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (16)]),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (48)]),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const0_rtx),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (32)])),
	115));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:478 */
rtx
gen_iwmmxt_wqmiatt (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (5,
		operand1,
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (16)]),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (48)]),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (16)]),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (48)])),
	115));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:491 */
rtx
gen_iwmmxt_wqmiabbn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (5,
		operand1,
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const0_rtx),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (32)]),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const0_rtx),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (32)])),
	114));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:504 */
rtx
gen_iwmmxt_wqmiabtn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (5,
		operand1,
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const0_rtx),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (32)]),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (16)]),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (48)])),
	114));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:517 */
rtx
gen_iwmmxt_wqmiatbn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (5,
		operand1,
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (16)]),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (48)]),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const0_rtx),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (32)])),
	114));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:530 */
rtx
gen_iwmmxt_wqmiattn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (5,
		operand1,
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (16)]),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (48)]),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (16)]),
		gen_rtx_ZERO_EXTRACT (V4HImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	const_int_rtx[MAX_SAVED_CONST_INT + (48)])),
	114));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:543 */
rtx
gen_iwmmxt_wmiabb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	gen_rtx_PLUS (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const0_rtx)))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const0_rtx))))),
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)])))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)]))))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:567 */
rtx
gen_iwmmxt_wmiabt (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	gen_rtx_PLUS (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const0_rtx)))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const1_rtx))))),
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)])))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:591 */
rtx
gen_iwmmxt_wmiatb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	gen_rtx_PLUS (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const1_rtx)))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const0_rtx))))),
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)])))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)]))))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:615 */
rtx
gen_iwmmxt_wmiatt (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	gen_rtx_PLUS (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const1_rtx)))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const1_rtx))))),
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)])))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:639 */
rtx
gen_iwmmxt_wmiabbn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand1,
	gen_rtx_PLUS (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const0_rtx)))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const0_rtx))))),
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)])))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)]))))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:663 */
rtx
gen_iwmmxt_wmiabtn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand1,
	gen_rtx_PLUS (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const0_rtx)))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const1_rtx))))),
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)])))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:687 */
rtx
gen_iwmmxt_wmiatbn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand1,
	gen_rtx_PLUS (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const1_rtx)))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const0_rtx))))),
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)])))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)]))))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:711 */
rtx
gen_iwmmxt_wmiattn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand1,
	gen_rtx_PLUS (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const1_rtx)))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const1_rtx))))),
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)])))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:735 */
rtx
gen_iwmmxt_wmiawbb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const0_rtx)))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const0_rtx)))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:748 */
rtx
gen_iwmmxt_wmiawbt (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const0_rtx)))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const1_rtx)))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:761 */
rtx
gen_iwmmxt_wmiawtb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const1_rtx)))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const0_rtx)))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:774 */
rtx
gen_iwmmxt_wmiawtt (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const1_rtx)))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const1_rtx)))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:787 */
rtx
gen_iwmmxt_wmiawbbn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand1,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const0_rtx)))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const0_rtx)))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:800 */
rtx
gen_iwmmxt_wmiawbtn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand1,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const0_rtx)))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const1_rtx)))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:813 */
rtx
gen_iwmmxt_wmiawtbn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand1,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const1_rtx)))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const0_rtx)))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:826 */
rtx
gen_iwmmxt_wmiawttn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand1,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const1_rtx)))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const1_rtx)))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:839 */
rtx
gen_iwmmxt_wmerge (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (DImode,
	gen_rtx_ASHIFT (DImode,
	operand2,
	gen_rtx_MINUS (SImode,
	const_int_rtx[MAX_SAVED_CONST_INT + (64)],
	gen_rtx_MULT (SImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (8)]))),
	gen_rtx_LSHIFTRT (DImode,
	gen_rtx_ASHIFT (DImode,
	operand1,
	gen_rtx_MULT (SImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (8)])),
	gen_rtx_MULT (SImode,
	operand3,
	const_int_rtx[MAX_SAVED_CONST_INT + (8)]))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:864 */
rtx
gen_iwmmxt_tandcv2si3 (void)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_SUBREG (CCmode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	116),
	0)),
		gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (SImode,
	15)),
	116)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:864 */
rtx
gen_iwmmxt_tandcv4hi3 (void)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_SUBREG (CCmode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	116),
	0)),
		gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (SImode,
	15)),
	116)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:864 */
rtx
gen_iwmmxt_tandcv8qi3 (void)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_SUBREG (CCmode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	116),
	0)),
		gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (SImode,
	15)),
	116)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:874 */
rtx
gen_iwmmxt_torcv2si3 (void)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_SUBREG (CCmode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	117),
	0)),
		gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (SImode,
	15)),
	117)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:874 */
rtx
gen_iwmmxt_torcv4hi3 (void)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_SUBREG (CCmode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	117),
	0)),
		gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (SImode,
	15)),
	117)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:874 */
rtx
gen_iwmmxt_torcv8qi3 (void)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_SUBREG (CCmode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	117),
	0)),
		gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (SImode,
	15)),
	117)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:884 */
rtx
gen_iwmmxt_torvscv2si3 (void)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_SUBREG (CCmode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	118),
	0)),
		gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (SImode,
	15)),
	118)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:884 */
rtx
gen_iwmmxt_torvscv4hi3 (void)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_SUBREG (CCmode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	118),
	0)),
		gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (SImode,
	15)),
	118)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:884 */
rtx
gen_iwmmxt_torvscv8qi3 (void)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_SUBREG (CCmode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	118),
	0)),
		gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (SImode,
	15)),
	118)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:894 */
rtx
gen_iwmmxt_textrcv2si3 (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_SUBREG (CCmode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		const0_rtx,
		operand0),
	119),
	0)),
		gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (SImode,
	15)),
	119)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:894 */
rtx
gen_iwmmxt_textrcv4hi3 (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_SUBREG (CCmode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		const0_rtx,
		operand0),
	119),
	0)),
		gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (SImode,
	15)),
	119)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt2.md:894 */
rtx
gen_iwmmxt_textrcv8qi3 (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_SUBREG (CCmode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		const0_rtx,
		operand0),
	119),
	0)),
		gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		gen_rtx_REG (SImode,
	15)),
	119)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:946 */
rtx
gen_abshf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:946 */
rtx
gen_neghf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:966 */
rtx
gen_neon_vrndhf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	355));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:966 */
rtx
gen_neon_vrndahf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	356));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:966 */
rtx
gen_neon_vrndmhf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	358));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:966 */
rtx
gen_neon_vrndnhf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	359));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:966 */
rtx
gen_neon_vrndphf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	360));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:966 */
rtx
gen_neon_vrndxhf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	361));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:977 */
rtx
gen_neon_vrndihf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	357));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:990 */
rtx
gen_addhf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1022 */
rtx
gen_subhf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1058 */
rtx
gen_divhf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_DIV (HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1098 */
rtx
gen_mulhf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1336 */
rtx
gen_fmahf4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (HFmode,
	operand1,
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1360 */
rtx
gen_fmasf4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (SFmode,
	operand1,
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1360 */
rtx
gen_fmadf4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (DFmode,
	operand1,
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1371 */
rtx
gen_fmsubhf4_fp16 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (HFmode,
	gen_rtx_NEG (HFmode,
	operand1),
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1473 */
rtx
gen_extendhfsf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT_EXTEND (SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1500 */
rtx
gen_truncsfhf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT_TRUNCATE (HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1528 */
rtx
gen_fixuns_truncsfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_FIX (SFmode,
	operand1)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1537 */
rtx
gen_fixuns_truncdfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_FIX (DFmode,
	operand1)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1566 */
rtx
gen_floatunssisf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FLOAT (SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1575 */
rtx
gen_floatunssidf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FLOAT (DFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1587 */
rtx
gen_neon_vsqrthf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SQRT (HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1596 */
rtx
gen_neon_vrsqrtshf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	295));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1643 */
rtx
gen_push_fpsysreg_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (SImode,
	gen_rtx_POST_DEC (SImode,
	operand0)),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		operand1),
	51));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1662 */
rtx
gen_pop_fpsysreg_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (SImode,
	gen_rtx_POST_INC (SImode,
	operand0)),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		operand1),
	51));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1721 */
rtx
gen_lazy_store_multiple_insn (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		gen_rtx_MEM (BLKmode,
	operand0)),
	54);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1731 */
rtx
gen_lazy_load_multiple_insn (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		gen_rtx_MEM (BLKmode,
	operand0)),
	55);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1902 */
rtx
gen_neon_vcvthshf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	181));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1902 */
rtx
gen_neon_vcvthuhf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	182));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1913 */
rtx
gen_neon_vcvthssi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	181));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1913 */
rtx
gen_neon_vcvthusi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	182));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1931 */
rtx
gen_neon_vcvths_nhf_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	177)),
		gen_rtx_SET (operand3,
	gen_rtx_FLOAT_TRUNCATE (HFmode,
	gen_rtx_FLOAT (SFmode,
	copy_rtx (operand0))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1931 */
rtx
gen_neon_vcvthu_nhf_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	178)),
		gen_rtx_SET (operand3,
	gen_rtx_FLOAT_TRUNCATE (HFmode,
	gen_rtx_FLOAT (SFmode,
	copy_rtx (operand0))))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1973 */
rtx
gen_neon_vcvths_nsi_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		gen_rtx_FIX (SImode,
	gen_rtx_FIX (SFmode,
	gen_rtx_FLOAT_EXTEND (SFmode,
	operand1))),
		operand2),
	179));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1973 */
rtx
gen_neon_vcvthu_nsi_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		gen_rtx_FIX (SImode,
	gen_rtx_FIX (SFmode,
	gen_rtx_FLOAT_EXTEND (SFmode,
	operand1))),
		operand2),
	180));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2008 */
rtx
gen_neon_vcvtahssi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	183));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2008 */
rtx
gen_neon_vcvtahusi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	184));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2008 */
rtx
gen_neon_vcvtmhssi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	185));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2008 */
rtx
gen_neon_vcvtmhusi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	186));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2008 */
rtx
gen_neon_vcvtnhssi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	187));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2008 */
rtx
gen_neon_vcvtnhusi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	188));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2008 */
rtx
gen_neon_vcvtphssi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	189));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2008 */
rtx
gen_neon_vcvtphusi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	190));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2035 */
rtx
gen_btruncsf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	32));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2035 */
rtx
gen_ceilsf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	33));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2035 */
rtx
gen_floorsf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	34));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2035 */
rtx
gen_nearbyintsf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	35));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2035 */
rtx
gen_rintsf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	36));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2035 */
rtx
gen_roundsf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	37));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2035 */
rtx
gen_btruncdf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	32));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2035 */
rtx
gen_ceildf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	33));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2035 */
rtx
gen_floordf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	34));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2035 */
rtx
gen_nearbyintdf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	35));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2035 */
rtx
gen_rintdf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	36));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2035 */
rtx
gen_rounddf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	37));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2048 */
rtx
gen_lceilsfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	33)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2048 */
rtx
gen_lfloorsfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	34)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2048 */
rtx
gen_lroundsfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	37)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2048 */
rtx
gen_lceilusfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	33)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2048 */
rtx
gen_lfloorusfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	34)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2048 */
rtx
gen_lroundusfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	37)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2048 */
rtx
gen_lceildfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	33)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2048 */
rtx
gen_lfloordfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	34)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2048 */
rtx
gen_lrounddfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	37)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2048 */
rtx
gen_lceiludfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	33)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2048 */
rtx
gen_lfloorudfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	34)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2048 */
rtx
gen_lroundudfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	37)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2066 */
rtx
gen_smaxsf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2066 */
rtx
gen_smaxdf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (DFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2076 */
rtx
gen_sminsf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2076 */
rtx
gen_smindf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (DFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2088 */
rtx
gen_neon_vmaxnmhf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	215));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2088 */
rtx
gen_neon_vminnmhf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	218));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2101 */
rtx
gen_fmaxsf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	215));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2101 */
rtx
gen_fminsf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	218));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2101 */
rtx
gen_fmaxdf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	215));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2101 */
rtx
gen_fmindf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	218));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2113 */
rtx
gen_set_fpscr (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		operand0),
	28);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2121 */
rtx
gen_get_fpscr (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		const0_rtx),
	27));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2138 */
rtx
gen_no_literal_pool_df_immediate (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_CLOBBER (VOIDmode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2165 */
rtx
gen_no_literal_pool_sf_immediate (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_CLOBBER (VOIDmode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2187 */
rtx
gen_arm_vcx1si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	104));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2187 */
rtx
gen_arm_vcx1di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	104));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2197 */
rtx
gen_arm_vcx1asi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	105));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2197 */
rtx
gen_arm_vcx1adi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	105));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2208 */
rtx
gen_arm_vcx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	104));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2208 */
rtx
gen_arm_vcx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	104));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2219 */
rtx
gen_arm_vcx2asi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	105));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2219 */
rtx
gen_arm_vcx2adi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	105));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2231 */
rtx
gen_arm_vcx3si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	104));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2231 */
rtx
gen_arm_vcx3di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	104));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2243 */
rtx
gen_arm_vcx3asi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (5,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5),
	105));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2243 */
rtx
gen_arm_vcx3adi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (5,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5),
	105));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:142 */
rtx
gen_thumb1_subsi3_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:231 */
rtx
gen_thumb1_bicsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (SImode,
	gen_rtx_NOT (SImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:442 */
rtx
gen_thumb1_extendhisi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (SImode,
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:580 */
rtx
gen_thumb1_extendqisi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:994 */
rtx
gen_cpymem12b (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (8,
		gen_rtx_SET (gen_rtx_MEM (SImode,
	operand2),
	gen_rtx_MEM (SImode,
	operand3)),
		gen_rtx_SET (gen_rtx_MEM (SImode,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand2),
	const_int_rtx[MAX_SAVED_CONST_INT + (4)])),
	gen_rtx_MEM (SImode,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand3),
	const_int_rtx[MAX_SAVED_CONST_INT + (4)]))),
		gen_rtx_SET (gen_rtx_MEM (SImode,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand2),
	const_int_rtx[MAX_SAVED_CONST_INT + (8)])),
	gen_rtx_MEM (SImode,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand3),
	const_int_rtx[MAX_SAVED_CONST_INT + (8)]))),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand2),
	const_int_rtx[MAX_SAVED_CONST_INT + (12)])),
		gen_rtx_SET (operand1,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand3),
	const_int_rtx[MAX_SAVED_CONST_INT + (12)])),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:1016 */
rtx
gen_cpymem8b (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (6,
		gen_rtx_SET (gen_rtx_MEM (SImode,
	operand2),
	gen_rtx_MEM (SImode,
	operand3)),
		gen_rtx_SET (gen_rtx_MEM (SImode,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand2),
	const_int_rtx[MAX_SAVED_CONST_INT + (4)])),
	gen_rtx_MEM (SImode,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand3),
	const_int_rtx[MAX_SAVED_CONST_INT + (4)]))),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand2),
	const_int_rtx[MAX_SAVED_CONST_INT + (8)])),
		gen_rtx_SET (operand1,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand3),
	const_int_rtx[MAX_SAVED_CONST_INT + (8)])),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:1065 */
rtx
gen_thumb1_cbz (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand0), VOIDmode,
		operand1,
		const0_rtx),
	gen_rtx_LABEL_REF (VOIDmode,
	operand2),
	pc_rtx));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:1148 */
rtx
gen_cbranchsi4_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand0), VOIDmode,
		operand1,
		operand2),
	gen_rtx_LABEL_REF (VOIDmode,
	operand3),
	pc_rtx));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:1227 */
rtx
gen_cbranchsi4_scratch (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand4), VOIDmode,
		operand1,
		operand2),
	gen_rtx_LABEL_REF (VOIDmode,
	operand3),
	pc_rtx)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:1739 */
rtx
gen_cstoresi_nltu_thumb1 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (SImode,
	gen_rtx_LTU (SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:1749 */
rtx
gen_cstoresi_ltu_thumb1 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LTU (SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:1765 */
rtx
gen_thumb1_addsi3_addgeu (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_PLUS (SImode,
	operand1,
	operand2),
	gen_rtx_GEU (SImode,
	operand3,
	operand4)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:1936 */
rtx
gen_thumb1_casesi_dispatch (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (pc_rtx,
	gen_rtx_UNSPEC (VOIDmode,
	gen_rtvec (2,
		gen_rtx_REG (SImode,
	0),
		gen_rtx_LABEL_REF (VOIDmode,
	operand0)),
	21)),
		gen_hard_reg_clobber (SImode, 12),
		gen_hard_reg_clobber (SImode, 14)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:1962 */
rtx
gen_prologue_thumb1_interwork (void)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		const0_rtx),
	2);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:2028 */
rtx
gen_thumb_eh_return (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		operand0),
	16),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:2046 */
rtx
gen_thumb1_stack_protect_test_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MEM (SImode,
	operand2)),
	41)),
		gen_rtx_CLOBBER (VOIDmode,
	copy_rtx (operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:267 */
rtx
gen_tls_load_dot_plus_four (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_MEM (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		operand3),
	2))),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:1117 */
rtx
gen_thumb2_zero_extendqisi2_v6 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:1235 */
rtx
gen_thumb2_eh_return (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		operand0),
	16),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:1363 */
rtx
gen_thumb2_addsi3_compare0 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	100),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_PLUS (SImode,
	operand1,
	operand2),
	const0_rtx)),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:1703 */
rtx
gen_thumb2_asrl (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (DImode,
	operand0,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:1711 */
rtx
gen_thumb2_lsll (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (DImode,
	operand0,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:1719 */
rtx
gen_thumb2_lsrl (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (DImode,
	operand0,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:1765 */
rtx
gen_dls_insn (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_REG (SImode,
	14),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand0),
	106));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:26 */
rtx
gen_unaligned_storev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	26));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:317 */
rtx
gen_vec_setv8qi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V8QImode,
	gen_rtx_VEC_DUPLICATE (V8QImode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:317 */
rtx
gen_vec_setv4hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V4HImode,
	gen_rtx_VEC_DUPLICATE (V4HImode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:317 */
rtx
gen_vec_setv4hf_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V4HFmode,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:317 */
rtx
gen_vec_setv4bf_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V4BFmode,
	gen_rtx_VEC_DUPLICATE (V4BFmode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:317 */
rtx
gen_vec_setv2si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V2SImode,
	gen_rtx_VEC_DUPLICATE (V2SImode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:317 */
rtx
gen_vec_setv2sf_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2SFmode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:338 */
rtx
gen_vec_setv16qi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V16QImode,
	gen_rtx_VEC_DUPLICATE (V16QImode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:338 */
rtx
gen_vec_setv8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V8HImode,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:338 */
rtx
gen_vec_setv8hf_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V8HFmode,
	gen_rtx_VEC_DUPLICATE (V8HFmode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:338 */
rtx
gen_vec_setv4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V4SImode,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:338 */
rtx
gen_vec_setv4sf_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:367 */
rtx
gen_vec_setv2di_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V2DImode,
	gen_rtx_VEC_DUPLICATE (V2DImode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:389 */
rtx
gen_vec_extractv8qiqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:389 */
rtx
gen_vec_extractv4hihi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:389 */
rtx
gen_vec_extractv4hfhf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (HFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:389 */
rtx
gen_vec_extractv4bfbf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (BFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:389 */
rtx
gen_vec_extractv2sisi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:389 */
rtx
gen_vec_extractv2sfsf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:414 */
rtx
gen_neon_vec_extractv16qiqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:414 */
rtx
gen_neon_vec_extractv8hihi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:414 */
rtx
gen_neon_vec_extractv8hfhf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (HFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:414 */
rtx
gen_neon_vec_extractv4sisi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:414 */
rtx
gen_neon_vec_extractv4sfsf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:442 */
rtx
gen_neon_vec_extractv2didi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (DImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:534 */
rtx
gen_mulv8qi3addv8qi_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8QImode,
	gen_rtx_MULT (V8QImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:534 */
rtx
gen_mulv16qi3addv16qi_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V16QImode,
	gen_rtx_MULT (V16QImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:534 */
rtx
gen_mulv4hi3addv4hi_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HImode,
	gen_rtx_MULT (V4HImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:534 */
rtx
gen_mulv8hi3addv8hi_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_MULT (V8HImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:534 */
rtx
gen_mulv2si3addv2si_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_MULT (V2SImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:534 */
rtx
gen_mulv4si3addv4si_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MULT (V4SImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:534 */
rtx
gen_mulv2sf3addv2sf_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	gen_rtx_MULT (V2SFmode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:534 */
rtx
gen_mulv4sf3addv4sf_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	gen_rtx_MULT (V4SFmode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:547 */
rtx
gen_mulv8hf3addv8hf_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	gen_rtx_MULT (V8HFmode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:547 */
rtx
gen_mulv4hf3addv4hf_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	gen_rtx_MULT (V4HFmode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:557 */
rtx
gen_mulv8qi3negv8qiaddv8qi_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8QImode,
	operand1,
	gen_rtx_MULT (V8QImode,
	operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:557 */
rtx
gen_mulv16qi3negv16qiaddv16qi_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V16QImode,
	operand1,
	gen_rtx_MULT (V16QImode,
	operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:557 */
rtx
gen_mulv4hi3negv4hiaddv4hi_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4HImode,
	operand1,
	gen_rtx_MULT (V4HImode,
	operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:557 */
rtx
gen_mulv8hi3negv8hiaddv8hi_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	operand1,
	gen_rtx_MULT (V8HImode,
	operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:557 */
rtx
gen_mulv2si3negv2siaddv2si_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2SImode,
	operand1,
	gen_rtx_MULT (V2SImode,
	operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:557 */
rtx
gen_mulv4si3negv4siaddv4si_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_MULT (V4SImode,
	operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:557 */
rtx
gen_mulv2sf3negv2sfaddv2sf_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2SFmode,
	operand1,
	gen_rtx_MULT (V2SFmode,
	operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:557 */
rtx
gen_mulv4sf3negv4sfaddv4sf_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SFmode,
	operand1,
	gen_rtx_MULT (V4SFmode,
	operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:575 */
rtx
gen_fmav2sf4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	operand1,
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:575 */
rtx
gen_fmav4sf4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	operand1,
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:585 */
rtx
gen_fmav2sf4_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	operand1,
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:585 */
rtx
gen_fmav4sf4_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	operand1,
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:595 */
rtx
gen_fmav8hf4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V8HFmode,
	operand1,
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:595 */
rtx
gen_fmav4hf4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4HFmode,
	operand1,
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:616 */
rtx
gen_fmsubv2sf4_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_NEG (V2SFmode,
	operand1),
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:616 */
rtx
gen_fmsubv4sf4_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_NEG (V4SFmode,
	operand1),
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:627 */
rtx
gen_fmsubv8hf4_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V8HFmode,
	gen_rtx_NEG (V8HFmode,
	operand1),
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:627 */
rtx
gen_fmsubv4hf4_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4HFmode,
	gen_rtx_NEG (V4HFmode,
	operand1),
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:645 */
rtx
gen_neon_vrintpv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	348));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:645 */
rtx
gen_neon_vrintzv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	347));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:645 */
rtx
gen_neon_vrintmv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	349));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:645 */
rtx
gen_neon_vrintxv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	350));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:645 */
rtx
gen_neon_vrintav2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	351));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:645 */
rtx
gen_neon_vrintnv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	352));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:645 */
rtx
gen_neon_vrintpv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	348));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:645 */
rtx
gen_neon_vrintzv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	347));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:645 */
rtx
gen_neon_vrintmv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	349));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:645 */
rtx
gen_neon_vrintxv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	350));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:645 */
rtx
gen_neon_vrintav4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	351));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:645 */
rtx
gen_neon_vrintnv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	352));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:663 */
rtx
gen_neon_vcvtpv2sfv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	348)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:663 */
rtx
gen_neon_vcvtmv2sfv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	349)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:663 */
rtx
gen_neon_vcvtav2sfv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	351)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:663 */
rtx
gen_neon_vcvtpuv2sfv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	348)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:663 */
rtx
gen_neon_vcvtmuv2sfv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	349)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:663 */
rtx
gen_neon_vcvtauv2sfv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	351)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:663 */
rtx
gen_neon_vcvtpv4sfv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	348)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:663 */
rtx
gen_neon_vcvtmv4sfv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	349)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:663 */
rtx
gen_neon_vcvtav4sfv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	351)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:663 */
rtx
gen_neon_vcvtpuv4sfv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	348)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:663 */
rtx
gen_neon_vcvtmuv4sfv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	349)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:663 */
rtx
gen_neon_vcvtauv4sfv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	351)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:674 */
rtx
gen_iorv8qi3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:674 */
rtx
gen_iorv16qi3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:674 */
rtx
gen_iorv4hi3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:674 */
rtx
gen_iorv8hi3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:674 */
rtx
gen_iorv2si3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:674 */
rtx
gen_iorv4si3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:674 */
rtx
gen_iorv4hf3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V4HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:674 */
rtx
gen_iorv8hf3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:674 */
rtx
gen_iorv2sf3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V2SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:674 */
rtx
gen_iorv4sf3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:674 */
rtx
gen_iorv2di3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:696 */
rtx
gen_andv8qi3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:696 */
rtx
gen_andv16qi3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:696 */
rtx
gen_andv4hi3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:696 */
rtx
gen_andv8hi3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:696 */
rtx
gen_andv2si3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:696 */
rtx
gen_andv4si3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:696 */
rtx
gen_andv4hf3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V4HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:696 */
rtx
gen_andv8hf3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:696 */
rtx
gen_andv2sf3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V2SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:696 */
rtx
gen_andv4sf3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:696 */
rtx
gen_andv2di3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:713 */
rtx
gen_ornv8qi3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V8QImode,
	gen_rtx_NOT (V8QImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:713 */
rtx
gen_ornv16qi3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V16QImode,
	gen_rtx_NOT (V16QImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:713 */
rtx
gen_ornv4hi3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V4HImode,
	gen_rtx_NOT (V4HImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:713 */
rtx
gen_ornv8hi3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V8HImode,
	gen_rtx_NOT (V8HImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:713 */
rtx
gen_ornv2si3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V2SImode,
	gen_rtx_NOT (V2SImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:713 */
rtx
gen_ornv4si3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V4SImode,
	gen_rtx_NOT (V4SImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:713 */
rtx
gen_ornv4hf3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V4HFmode,
	gen_rtx_NOT (V4HFmode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:713 */
rtx
gen_ornv8hf3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V8HFmode,
	gen_rtx_NOT (V8HFmode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:713 */
rtx
gen_ornv2sf3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V2SFmode,
	gen_rtx_NOT (V2SFmode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:713 */
rtx
gen_ornv4sf3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V4SFmode,
	gen_rtx_NOT (V4SFmode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:713 */
rtx
gen_ornv2di3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V2DImode,
	gen_rtx_NOT (V2DImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:722 */
rtx
gen_bicv8qi3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V8QImode,
	gen_rtx_NOT (V8QImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:722 */
rtx
gen_bicv16qi3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V16QImode,
	gen_rtx_NOT (V16QImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:722 */
rtx
gen_bicv4hi3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V4HImode,
	gen_rtx_NOT (V4HImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:722 */
rtx
gen_bicv8hi3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V8HImode,
	gen_rtx_NOT (V8HImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:722 */
rtx
gen_bicv2si3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V2SImode,
	gen_rtx_NOT (V2SImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:722 */
rtx
gen_bicv4si3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V4SImode,
	gen_rtx_NOT (V4SImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:722 */
rtx
gen_bicv4hf3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V4HFmode,
	gen_rtx_NOT (V4HFmode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:722 */
rtx
gen_bicv8hf3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V8HFmode,
	gen_rtx_NOT (V8HFmode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:722 */
rtx
gen_bicv2sf3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V2SFmode,
	gen_rtx_NOT (V2SFmode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:722 */
rtx
gen_bicv4sf3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V4SFmode,
	gen_rtx_NOT (V4SFmode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:722 */
rtx
gen_bicv2di3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V2DImode,
	gen_rtx_NOT (V2DImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:731 */
rtx
gen_xorv8qi3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:731 */
rtx
gen_xorv16qi3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:731 */
rtx
gen_xorv4hi3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:731 */
rtx
gen_xorv8hi3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:731 */
rtx
gen_xorv2si3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:731 */
rtx
gen_xorv4si3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:731 */
rtx
gen_xorv4hf3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V4HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:731 */
rtx
gen_xorv8hf3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:731 */
rtx
gen_xorv2sf3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V2SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:731 */
rtx
gen_xorv4sf3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:731 */
rtx
gen_xorv2di3_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:740 */
rtx
gen_one_cmplv8qi2_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:740 */
rtx
gen_one_cmplv16qi2_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:740 */
rtx
gen_one_cmplv4hi2_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:740 */
rtx
gen_one_cmplv8hi2_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:740 */
rtx
gen_one_cmplv2si2_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:740 */
rtx
gen_one_cmplv4si2_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:740 */
rtx
gen_one_cmplv4hf2_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V4HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:740 */
rtx
gen_one_cmplv8hf2_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V8HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:740 */
rtx
gen_one_cmplv2sf2_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V2SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:740 */
rtx
gen_one_cmplv4sf2_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V4SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:740 */
rtx
gen_one_cmplv2di2_neon (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V2DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:748 */
rtx
gen_neon_absv8qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:748 */
rtx
gen_neon_absv16qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:748 */
rtx
gen_neon_absv4hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:748 */
rtx
gen_neon_absv8hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:748 */
rtx
gen_neon_absv2si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:748 */
rtx
gen_neon_absv4si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:748 */
rtx
gen_neon_absv2sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V2SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:748 */
rtx
gen_neon_absv4sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V4SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:759 */
rtx
gen_neon_negv8qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:759 */
rtx
gen_neon_negv16qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:759 */
rtx
gen_neon_negv4hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:759 */
rtx
gen_neon_negv8hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:759 */
rtx
gen_neon_negv2si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:759 */
rtx
gen_neon_negv4si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:759 */
rtx
gen_neon_negv2sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:759 */
rtx
gen_neon_negv4sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:770 */
rtx
gen_neon_absv8hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V8HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:770 */
rtx
gen_neon_negv8hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:770 */
rtx
gen_neon_absv4hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V4HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:770 */
rtx
gen_neon_negv4hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:788 */
rtx
gen_neon_vrndv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	355));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:788 */
rtx
gen_neon_vrndav8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	356));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:788 */
rtx
gen_neon_vrndmv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	358));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:788 */
rtx
gen_neon_vrndnv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	359));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:788 */
rtx
gen_neon_vrndpv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	360));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:788 */
rtx
gen_neon_vrndxv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	361));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:788 */
rtx
gen_neon_vrndv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	355));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:788 */
rtx
gen_neon_vrndav4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	356));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:788 */
rtx
gen_neon_vrndmv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	358));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:788 */
rtx
gen_neon_vrndnv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	359));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:788 */
rtx
gen_neon_vrndpv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	360));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:788 */
rtx
gen_neon_vrndxv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	361));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:798 */
rtx
gen_neon_vrsqrtev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	294));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:798 */
rtx
gen_neon_vrsqrtev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	294));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:854 */
rtx
gen_vashrv8qi3_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:854 */
rtx
gen_vashrv16qi3_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:854 */
rtx
gen_vashrv4hi3_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:854 */
rtx
gen_vashrv8hi3_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:854 */
rtx
gen_vashrv2si3_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:854 */
rtx
gen_vashrv4si3_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:867 */
rtx
gen_vlshrv8qi3_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:867 */
rtx
gen_vlshrv16qi3_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:867 */
rtx
gen_vlshrv4hi3_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:867 */
rtx
gen_vlshrv8hi3_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:867 */
rtx
gen_vlshrv2si3_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:867 */
rtx
gen_vlshrv4si3_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:885 */
rtx
gen_ashlv8qi3_signed (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	121));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:885 */
rtx
gen_ashlv16qi3_signed (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	121));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:885 */
rtx
gen_ashlv4hi3_signed (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	121));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:885 */
rtx
gen_ashlv8hi3_signed (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	121));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:885 */
rtx
gen_ashlv2si3_signed (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	121));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:885 */
rtx
gen_ashlv4si3_signed (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	121));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:885 */
rtx
gen_ashlv2di3_signed (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	121));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:898 */
rtx
gen_ashlv8qi3_unsigned (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	122));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:898 */
rtx
gen_ashlv16qi3_unsigned (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	122));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:898 */
rtx
gen_ashlv4hi3_unsigned (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	122));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:898 */
rtx
gen_ashlv8hi3_unsigned (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	122));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:898 */
rtx
gen_ashlv2si3_unsigned (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	122));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:898 */
rtx
gen_ashlv4si3_unsigned (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	122));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:898 */
rtx
gen_ashlv2di3_unsigned (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	122));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:915 */
rtx
gen_neon_load_count (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	145));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:957 */
rtx
gen_vec_sel_widen_ssum_lov16qiv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:957 */
rtx
gen_vec_sel_widen_ssum_lov8hiv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:957 */
rtx
gen_vec_sel_widen_ssum_lov4siv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:972 */
rtx
gen_vec_sel_widen_ssum_hiv16qiv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:972 */
rtx
gen_vec_sel_widen_ssum_hiv8hiv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:972 */
rtx
gen_vec_sel_widen_ssum_hiv4siv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:987 */
rtx
gen_widen_ssumv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:987 */
rtx
gen_widen_ssumv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:987 */
rtx
gen_widen_ssumv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1027 */
rtx
gen_vec_sel_widen_usum_lov16qiv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1027 */
rtx
gen_vec_sel_widen_usum_lov8hiv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1027 */
rtx
gen_vec_sel_widen_usum_lov4siv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1042 */
rtx
gen_vec_sel_widen_usum_hiv16qiv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1042 */
rtx
gen_vec_sel_widen_usum_hiv8hiv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1042 */
rtx
gen_vec_sel_widen_usum_hiv4siv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1057 */
rtx
gen_widen_usumv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1057 */
rtx
gen_widen_usumv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1057 */
rtx
gen_widen_usumv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1073 */
rtx
gen_quad_halves_plusv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const1_rtx))),
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)])))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1073 */
rtx
gen_quad_halves_sminv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V2SImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const1_rtx))),
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)])))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1073 */
rtx
gen_quad_halves_smaxv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V2SImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const1_rtx))),
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)])))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1073 */
rtx
gen_quad_halves_uminv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMIN (V2SImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const1_rtx))),
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)])))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1073 */
rtx
gen_quad_halves_umaxv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMAX (V2SImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const1_rtx))),
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)])))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1086 */
rtx
gen_quad_halves_plusv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	gen_rtx_VEC_SELECT (V2SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const1_rtx))),
	gen_rtx_VEC_SELECT (V2SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)])))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1086 */
rtx
gen_quad_halves_sminv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V2SFmode,
	gen_rtx_VEC_SELECT (V2SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const1_rtx))),
	gen_rtx_VEC_SELECT (V2SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)])))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1086 */
rtx
gen_quad_halves_smaxv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V2SFmode,
	gen_rtx_VEC_SELECT (V2SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const0_rtx,
		const1_rtx))),
	gen_rtx_VEC_SELECT (V2SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)])))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1099 */
rtx
gen_quad_halves_plusv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const0_rtx,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))),
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const_int_rtx[MAX_SAVED_CONST_INT + (6)],
		const_int_rtx[MAX_SAVED_CONST_INT + (7)])))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1099 */
rtx
gen_quad_halves_sminv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V4HImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const0_rtx,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))),
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const_int_rtx[MAX_SAVED_CONST_INT + (6)],
		const_int_rtx[MAX_SAVED_CONST_INT + (7)])))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1099 */
rtx
gen_quad_halves_smaxv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V4HImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const0_rtx,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))),
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const_int_rtx[MAX_SAVED_CONST_INT + (6)],
		const_int_rtx[MAX_SAVED_CONST_INT + (7)])))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1099 */
rtx
gen_quad_halves_uminv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMIN (V4HImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const0_rtx,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))),
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const_int_rtx[MAX_SAVED_CONST_INT + (6)],
		const_int_rtx[MAX_SAVED_CONST_INT + (7)])))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1099 */
rtx
gen_quad_halves_umaxv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMAX (V4HImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const0_rtx,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)]))),
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const_int_rtx[MAX_SAVED_CONST_INT + (6)],
		const_int_rtx[MAX_SAVED_CONST_INT + (7)])))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1114 */
rtx
gen_quad_halves_plusv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8QImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (8,
		const0_rtx,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)],
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const_int_rtx[MAX_SAVED_CONST_INT + (6)],
		const_int_rtx[MAX_SAVED_CONST_INT + (7)]))),
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (8,
		const_int_rtx[MAX_SAVED_CONST_INT + (8)],
		const_int_rtx[MAX_SAVED_CONST_INT + (9)],
		const_int_rtx[MAX_SAVED_CONST_INT + (10)],
		const_int_rtx[MAX_SAVED_CONST_INT + (11)],
		const_int_rtx[MAX_SAVED_CONST_INT + (12)],
		const_int_rtx[MAX_SAVED_CONST_INT + (13)],
		const_int_rtx[MAX_SAVED_CONST_INT + (14)],
		const_int_rtx[MAX_SAVED_CONST_INT + (15)])))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1114 */
rtx
gen_quad_halves_sminv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V8QImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (8,
		const0_rtx,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)],
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const_int_rtx[MAX_SAVED_CONST_INT + (6)],
		const_int_rtx[MAX_SAVED_CONST_INT + (7)]))),
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (8,
		const_int_rtx[MAX_SAVED_CONST_INT + (8)],
		const_int_rtx[MAX_SAVED_CONST_INT + (9)],
		const_int_rtx[MAX_SAVED_CONST_INT + (10)],
		const_int_rtx[MAX_SAVED_CONST_INT + (11)],
		const_int_rtx[MAX_SAVED_CONST_INT + (12)],
		const_int_rtx[MAX_SAVED_CONST_INT + (13)],
		const_int_rtx[MAX_SAVED_CONST_INT + (14)],
		const_int_rtx[MAX_SAVED_CONST_INT + (15)])))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1114 */
rtx
gen_quad_halves_smaxv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V8QImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (8,
		const0_rtx,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)],
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const_int_rtx[MAX_SAVED_CONST_INT + (6)],
		const_int_rtx[MAX_SAVED_CONST_INT + (7)]))),
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (8,
		const_int_rtx[MAX_SAVED_CONST_INT + (8)],
		const_int_rtx[MAX_SAVED_CONST_INT + (9)],
		const_int_rtx[MAX_SAVED_CONST_INT + (10)],
		const_int_rtx[MAX_SAVED_CONST_INT + (11)],
		const_int_rtx[MAX_SAVED_CONST_INT + (12)],
		const_int_rtx[MAX_SAVED_CONST_INT + (13)],
		const_int_rtx[MAX_SAVED_CONST_INT + (14)],
		const_int_rtx[MAX_SAVED_CONST_INT + (15)])))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1114 */
rtx
gen_quad_halves_uminv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMIN (V8QImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (8,
		const0_rtx,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)],
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const_int_rtx[MAX_SAVED_CONST_INT + (6)],
		const_int_rtx[MAX_SAVED_CONST_INT + (7)]))),
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (8,
		const_int_rtx[MAX_SAVED_CONST_INT + (8)],
		const_int_rtx[MAX_SAVED_CONST_INT + (9)],
		const_int_rtx[MAX_SAVED_CONST_INT + (10)],
		const_int_rtx[MAX_SAVED_CONST_INT + (11)],
		const_int_rtx[MAX_SAVED_CONST_INT + (12)],
		const_int_rtx[MAX_SAVED_CONST_INT + (13)],
		const_int_rtx[MAX_SAVED_CONST_INT + (14)],
		const_int_rtx[MAX_SAVED_CONST_INT + (15)])))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1114 */
rtx
gen_quad_halves_umaxv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMAX (V8QImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (8,
		const0_rtx,
		const1_rtx,
		const_int_rtx[MAX_SAVED_CONST_INT + (2)],
		const_int_rtx[MAX_SAVED_CONST_INT + (3)],
		const_int_rtx[MAX_SAVED_CONST_INT + (4)],
		const_int_rtx[MAX_SAVED_CONST_INT + (5)],
		const_int_rtx[MAX_SAVED_CONST_INT + (6)],
		const_int_rtx[MAX_SAVED_CONST_INT + (7)]))),
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (8,
		const_int_rtx[MAX_SAVED_CONST_INT + (8)],
		const_int_rtx[MAX_SAVED_CONST_INT + (9)],
		const_int_rtx[MAX_SAVED_CONST_INT + (10)],
		const_int_rtx[MAX_SAVED_CONST_INT + (11)],
		const_int_rtx[MAX_SAVED_CONST_INT + (12)],
		const_int_rtx[MAX_SAVED_CONST_INT + (13)],
		const_int_rtx[MAX_SAVED_CONST_INT + (14)],
		const_int_rtx[MAX_SAVED_CONST_INT + (15)])))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1183 */
rtx
gen_arm_reduc_plus_internal_v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	246));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1297 */
rtx
gen_neon_vpadd_internalv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	246));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1297 */
rtx
gen_neon_vpadd_internalv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	246));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1297 */
rtx
gen_neon_vpadd_internalv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	246));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1297 */
rtx
gen_neon_vpadd_internalv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	246));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1311 */
rtx
gen_neon_vpaddv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	246));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1322 */
rtx
gen_neon_vpsminv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	254));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1322 */
rtx
gen_neon_vpsminv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	254));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1322 */
rtx
gen_neon_vpsminv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	254));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1322 */
rtx
gen_neon_vpsminv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	254));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1335 */
rtx
gen_neon_vpsmaxv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	253));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1335 */
rtx
gen_neon_vpsmaxv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	253));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1335 */
rtx
gen_neon_vpsmaxv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	253));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1335 */
rtx
gen_neon_vpsmaxv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	253));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1348 */
rtx
gen_neon_vpuminv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	256));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1348 */
rtx
gen_neon_vpuminv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	256));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1348 */
rtx
gen_neon_vpuminv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	256));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1358 */
rtx
gen_neon_vpumaxv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	255));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1358 */
rtx
gen_neon_vpumaxv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	255));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1358 */
rtx
gen_neon_vpumaxv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	255));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1501 */
rtx
gen_neon_vaddv2sf_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	153));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1501 */
rtx
gen_neon_vaddv4sf_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	153));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1514 */
rtx
gen_neon_vaddlsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	156));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1514 */
rtx
gen_neon_vaddluv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	157));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1514 */
rtx
gen_neon_vaddlsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	156));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1514 */
rtx
gen_neon_vaddluv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	157));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1514 */
rtx
gen_neon_vaddlsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	156));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1514 */
rtx
gen_neon_vaddluv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	157));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1524 */
rtx
gen_neon_vaddwsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	158));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1524 */
rtx
gen_neon_vaddwuv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	159));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1524 */
rtx
gen_neon_vaddwsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	158));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1524 */
rtx
gen_neon_vaddwuv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	159));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1524 */
rtx
gen_neon_vaddwsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	158));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1524 */
rtx
gen_neon_vaddwuv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	159));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vrhaddsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	194));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vrhadduv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	195));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vhaddsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	192));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vhadduv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	193));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vrhaddsv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	194));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vrhadduv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	195));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vhaddsv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	192));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vhadduv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	193));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vrhaddsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	194));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vrhadduv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	195));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vhaddsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	192));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vhadduv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	193));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vrhaddsv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	194));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vrhadduv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	195));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vhaddsv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	192));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vhadduv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	193));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vrhaddsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	194));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vrhadduv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	195));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vhaddsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	192));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vhadduv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	193));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vrhaddsv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	194));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vrhadduv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	195));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vhaddsv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	192));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1536 */
rtx
gen_neon_vhadduv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	193));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1546 */
rtx
gen_neon_vqaddsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	258));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1546 */
rtx
gen_neon_vqadduv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	259));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1546 */
rtx
gen_neon_vqaddsv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	258));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1546 */
rtx
gen_neon_vqadduv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	259));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1546 */
rtx
gen_neon_vqaddsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	258));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1546 */
rtx
gen_neon_vqadduv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	259));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1546 */
rtx
gen_neon_vqaddsv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	258));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1546 */
rtx
gen_neon_vqadduv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	259));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1546 */
rtx
gen_neon_vqaddsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	258));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1546 */
rtx
gen_neon_vqadduv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	259));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1546 */
rtx
gen_neon_vqaddsv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	258));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1546 */
rtx
gen_neon_vqadduv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	259));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1546 */
rtx
gen_neon_vqaddsdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	258));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1546 */
rtx
gen_neon_vqaddudi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	259));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1546 */
rtx
gen_neon_vqaddsv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	258));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1546 */
rtx
gen_neon_vqadduv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	259));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1556 */
rtx
gen_neon_vaddhnv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	154));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1556 */
rtx
gen_neon_vraddhnv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	155));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1556 */
rtx
gen_neon_vaddhnv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	154));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1556 */
rtx
gen_neon_vraddhnv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	155));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1556 */
rtx
gen_neon_vaddhnv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	154));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1556 */
rtx
gen_neon_vraddhnv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	155));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1567 */
rtx
gen_neon_vmulpv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	237));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1567 */
rtx
gen_neon_vmulpv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	237));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1567 */
rtx
gen_neon_vmulfv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	237));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1567 */
rtx
gen_neon_vmulfv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	237));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1580 */
rtx
gen_neon_vmulfv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1580 */
rtx
gen_neon_vmulfv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1677 */
rtx
gen_vfmal_lowv2sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand3,
	operand5)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1677 */
rtx
gen_vfmal_lowv4sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand3,
	operand5)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1694 */
rtx
gen_vfmsl_highv2sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_NEG (V2HFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand3,
	operand5)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1694 */
rtx
gen_vfmsl_highv4sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_NEG (V4HFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand3,
	operand5)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1712 */
rtx
gen_vfmal_highv2sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand3,
	operand5)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1712 */
rtx
gen_vfmal_highv4sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand3,
	operand5)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1729 */
rtx
gen_vfmsl_lowv2sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_NEG (V2HFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand3,
	operand5)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1729 */
rtx
gen_vfmsl_lowv4sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_NEG (V4HFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand3,
	operand5)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1766 */
rtx
gen_vfmal_lane_lowv2sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1766 */
rtx
gen_vfmal_lane_lowv4sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1822 */
rtx
gen_vfmal_lane_lowv8hfv2sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1822 */
rtx
gen_vfmal_lane_lowv4hfv4sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1859 */
rtx
gen_vfmal_lane_highv8hfv2sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1859 */
rtx
gen_vfmal_lane_highv4hfv4sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1888 */
rtx
gen_vfmal_lane_highv2sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1888 */
rtx
gen_vfmal_lane_highv4sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1918 */
rtx
gen_vfmsl_lane_lowv2sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_NEG (V2HFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1918 */
rtx
gen_vfmsl_lane_lowv4sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_NEG (V4HFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1956 */
rtx
gen_vfmsl_lane_lowv8hfv2sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_NEG (V2HFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1956 */
rtx
gen_vfmsl_lane_lowv4hfv4sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_NEG (V4HFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1994 */
rtx
gen_vfmsl_lane_highv8hfv2sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_NEG (V2HFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1994 */
rtx
gen_vfmsl_lane_highv4hfv4sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_NEG (V4HFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2024 */
rtx
gen_vfmsl_lane_highv2sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_NEG (V2HFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2024 */
rtx
gen_vfmsl_lane_highv4sf_intrinsic (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_NEG (V4HFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2057 */
rtx
gen_neon_vmlav8qi_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	219));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2057 */
rtx
gen_neon_vmlav16qi_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	219));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2057 */
rtx
gen_neon_vmlav4hi_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	219));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2057 */
rtx
gen_neon_vmlav8hi_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	219));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2057 */
rtx
gen_neon_vmlav2si_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	219));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2057 */
rtx
gen_neon_vmlav4si_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	219));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2057 */
rtx
gen_neon_vmlav2sf_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	219));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2057 */
rtx
gen_neon_vmlav4sf_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	219));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2071 */
rtx
gen_neon_vmlalsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	221));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2071 */
rtx
gen_neon_vmlaluv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	222));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2071 */
rtx
gen_neon_vmlalsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	221));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2071 */
rtx
gen_neon_vmlaluv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	222));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2071 */
rtx
gen_neon_vmlalsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	221));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2071 */
rtx
gen_neon_vmlaluv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	222));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2100 */
rtx
gen_neon_vmlsv8qi_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	225));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2100 */
rtx
gen_neon_vmlsv16qi_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	225));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2100 */
rtx
gen_neon_vmlsv4hi_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	225));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2100 */
rtx
gen_neon_vmlsv8hi_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	225));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2100 */
rtx
gen_neon_vmlsv2si_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	225));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2100 */
rtx
gen_neon_vmlsv4si_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	225));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2100 */
rtx
gen_neon_vmlsv2sf_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	225));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2100 */
rtx
gen_neon_vmlsv4sf_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	225));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2114 */
rtx
gen_neon_vmlslsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	227));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2114 */
rtx
gen_neon_vmlsluv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	228));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2114 */
rtx
gen_neon_vmlslsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	227));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2114 */
rtx
gen_neon_vmlsluv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	228));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2114 */
rtx
gen_neon_vmlslsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	227));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2114 */
rtx
gen_neon_vmlsluv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	228));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2126 */
rtx
gen_neon_vqdmulhv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	264));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2126 */
rtx
gen_neon_vqrdmulhv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	266));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2126 */
rtx
gen_neon_vqdmulhv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	264));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2126 */
rtx
gen_neon_vqrdmulhv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	266));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2126 */
rtx
gen_neon_vqdmulhv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	264));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2126 */
rtx
gen_neon_vqrdmulhv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	266));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2126 */
rtx
gen_neon_vqdmulhv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	264));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2126 */
rtx
gen_neon_vqrdmulhv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	266));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2137 */
rtx
gen_neon_vqrdmlahv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	353));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2137 */
rtx
gen_neon_vqrdmlshv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	354));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2137 */
rtx
gen_neon_vqrdmlahv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	353));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2137 */
rtx
gen_neon_vqrdmlshv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	354));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2137 */
rtx
gen_neon_vqrdmlahv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	353));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2137 */
rtx
gen_neon_vqrdmlshv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	354));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2137 */
rtx
gen_neon_vqrdmlahv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	353));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2137 */
rtx
gen_neon_vqrdmlshv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	354));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2148 */
rtx
gen_neon_vqdmlalv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	260));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2148 */
rtx
gen_neon_vqdmlalv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	260));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2159 */
rtx
gen_neon_vqdmlslv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	262));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2159 */
rtx
gen_neon_vqdmlslv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	262));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2170 */
rtx
gen_neon_vmullsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	239));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2170 */
rtx
gen_neon_vmulluv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	240));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2170 */
rtx
gen_neon_vmullpv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	238));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2170 */
rtx
gen_neon_vmullsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	239));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2170 */
rtx
gen_neon_vmulluv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	240));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2170 */
rtx
gen_neon_vmullpv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	238));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2170 */
rtx
gen_neon_vmullsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	239));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2170 */
rtx
gen_neon_vmulluv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	240));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2170 */
rtx
gen_neon_vmullpv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	238));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2180 */
rtx
gen_neon_vqdmullv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	268));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2180 */
rtx
gen_neon_vqdmullv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	268));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2206 */
rtx
gen_neon_vsubv2sf_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	328));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2206 */
rtx
gen_neon_vsubv4sf_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	328));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2219 */
rtx
gen_neon_vsublsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	331));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2219 */
rtx
gen_neon_vsubluv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	332));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2219 */
rtx
gen_neon_vsublsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	331));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2219 */
rtx
gen_neon_vsubluv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	332));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2219 */
rtx
gen_neon_vsublsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	331));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2219 */
rtx
gen_neon_vsubluv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	332));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2229 */
rtx
gen_neon_vsubwsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	333));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2229 */
rtx
gen_neon_vsubwuv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	334));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2229 */
rtx
gen_neon_vsubwsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	333));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2229 */
rtx
gen_neon_vsubwuv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	334));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2229 */
rtx
gen_neon_vsubwsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	333));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2229 */
rtx
gen_neon_vsubwuv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	334));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2239 */
rtx
gen_neon_vqsubsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	287));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2239 */
rtx
gen_neon_vqsubuv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	288));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2239 */
rtx
gen_neon_vqsubsv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	287));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2239 */
rtx
gen_neon_vqsubuv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	288));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2239 */
rtx
gen_neon_vqsubsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	287));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2239 */
rtx
gen_neon_vqsubuv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	288));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2239 */
rtx
gen_neon_vqsubsv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	287));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2239 */
rtx
gen_neon_vqsubuv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	288));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2239 */
rtx
gen_neon_vqsubsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	287));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2239 */
rtx
gen_neon_vqsubuv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	288));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2239 */
rtx
gen_neon_vqsubsv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	287));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2239 */
rtx
gen_neon_vqsubuv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	288));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2239 */
rtx
gen_neon_vqsubsdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	287));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2239 */
rtx
gen_neon_vqsubudi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	288));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2239 */
rtx
gen_neon_vqsubsv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	287));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2239 */
rtx
gen_neon_vqsubuv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	288));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2249 */
rtx
gen_neon_vhsubsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	196));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2249 */
rtx
gen_neon_vhsubuv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	197));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2249 */
rtx
gen_neon_vhsubsv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	196));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2249 */
rtx
gen_neon_vhsubuv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	197));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2249 */
rtx
gen_neon_vhsubsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	196));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2249 */
rtx
gen_neon_vhsubuv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	197));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2249 */
rtx
gen_neon_vhsubsv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	196));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2249 */
rtx
gen_neon_vhsubuv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	197));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2249 */
rtx
gen_neon_vhsubsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	196));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2249 */
rtx
gen_neon_vhsubuv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	197));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2249 */
rtx
gen_neon_vhsubsv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	196));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2249 */
rtx
gen_neon_vhsubuv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	197));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2259 */
rtx
gen_neon_vsubhnv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	329));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2259 */
rtx
gen_neon_vrsubhnv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	330));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2259 */
rtx
gen_neon_vsubhnv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	329));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2259 */
rtx
gen_neon_vrsubhnv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	330));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2259 */
rtx
gen_neon_vsubhnv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	329));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2259 */
rtx
gen_neon_vrsubhnv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	330));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vceqv8qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8QImode,
	gen_rtx_EQ (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcgtv8qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8QImode,
	gen_rtx_GT (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcgev8qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8QImode,
	gen_rtx_GE (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vclev8qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8QImode,
	gen_rtx_LE (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcltv8qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8QImode,
	gen_rtx_LT (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vceqv16qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V16QImode,
	gen_rtx_EQ (V16QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcgtv16qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V16QImode,
	gen_rtx_GT (V16QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcgev16qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V16QImode,
	gen_rtx_GE (V16QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vclev16qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V16QImode,
	gen_rtx_LE (V16QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcltv16qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V16QImode,
	gen_rtx_LT (V16QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vceqv4hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_EQ (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcgtv4hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_GT (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcgev4hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_GE (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vclev4hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_LE (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcltv4hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_LT (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vceqv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_EQ (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcgtv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_GT (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcgev8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_GE (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vclev8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_LE (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcltv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_LT (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vceqv2si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_EQ (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcgtv2si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_GT (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcgev2si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_GE (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vclev2si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_LE (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcltv2si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_LT (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vceqv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_EQ (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcgtv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_GT (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcgev4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_GE (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vclev4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_LE (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcltv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_LT (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vceqv2sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_EQ (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcgtv2sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_GT (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcgev2sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_GE (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vclev2sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_LE (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcltv2sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_LT (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vceqv4sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_EQ (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcgtv4sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_GT (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcgev4sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_GE (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vclev4sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_LE (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2311 */
rtx
gen_neon_vcltv4sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_LT (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2336 */
rtx
gen_neon_vceqv2sf_insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	165));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2336 */
rtx
gen_neon_vcgtv2sf_insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	168));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2336 */
rtx
gen_neon_vcgev2sf_insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	166));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2336 */
rtx
gen_neon_vcltv2sf_insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	346));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2336 */
rtx
gen_neon_vclev2sf_insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	345));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2336 */
rtx
gen_neon_vceqv4sf_insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	165));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2336 */
rtx
gen_neon_vcgtv4sf_insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	168));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2336 */
rtx
gen_neon_vcgev4sf_insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	166));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2336 */
rtx
gen_neon_vcltv4sf_insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	346));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2336 */
rtx
gen_neon_vclev4sf_insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	345));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2377 */
rtx
gen_neon_vceqv8hf_fp16insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_EQ (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2377 */
rtx
gen_neon_vcgtv8hf_fp16insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_GT (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2377 */
rtx
gen_neon_vcgev8hf_fp16insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_GE (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2377 */
rtx
gen_neon_vclev8hf_fp16insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_LE (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2377 */
rtx
gen_neon_vcltv8hf_fp16insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_LT (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2377 */
rtx
gen_neon_vceqv4hf_fp16insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_EQ (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2377 */
rtx
gen_neon_vcgtv4hf_fp16insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_GT (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2377 */
rtx
gen_neon_vcgev4hf_fp16insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_GE (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2377 */
rtx
gen_neon_vclev4hf_fp16insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_LE (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2377 */
rtx
gen_neon_vcltv4hf_fp16insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_LT (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2402 */
rtx
gen_neon_vceqv8hf_fp16insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	165));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2402 */
rtx
gen_neon_vcgtv8hf_fp16insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	168));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2402 */
rtx
gen_neon_vcgev8hf_fp16insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	166));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2402 */
rtx
gen_neon_vcltv8hf_fp16insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	346));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2402 */
rtx
gen_neon_vclev8hf_fp16insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	345));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2402 */
rtx
gen_neon_vceqv4hf_fp16insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	165));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2402 */
rtx
gen_neon_vcgtv4hf_fp16insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	168));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2402 */
rtx
gen_neon_vcgev4hf_fp16insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	166));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2402 */
rtx
gen_neon_vcltv4hf_fp16insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	346));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2402 */
rtx
gen_neon_vclev4hf_fp16insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	345));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2421 */
rtx
gen_neon_vcgtuv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8QImode,
	gen_rtx_GTU (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2421 */
rtx
gen_neon_vcgeuv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8QImode,
	gen_rtx_GEU (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2421 */
rtx
gen_neon_vcgtuv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V16QImode,
	gen_rtx_GTU (V16QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2421 */
rtx
gen_neon_vcgeuv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V16QImode,
	gen_rtx_GEU (V16QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2421 */
rtx
gen_neon_vcgtuv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_GTU (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2421 */
rtx
gen_neon_vcgeuv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_GEU (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2421 */
rtx
gen_neon_vcgtuv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_GTU (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2421 */
rtx
gen_neon_vcgeuv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_GEU (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2421 */
rtx
gen_neon_vcgtuv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_GTU (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2421 */
rtx
gen_neon_vcgeuv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_GEU (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2421 */
rtx
gen_neon_vcgtuv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_GTU (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2421 */
rtx
gen_neon_vcgeuv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_GEU (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2451 */
rtx
gen_neon_vcagtv2sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_GT (V2SImode,
	gen_rtx_ABS (V2SFmode,
	operand1),
	gen_rtx_ABS (V2SFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2451 */
rtx
gen_neon_vcagev2sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_GE (V2SImode,
	gen_rtx_ABS (V2SFmode,
	operand1),
	gen_rtx_ABS (V2SFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2451 */
rtx
gen_neon_vcaltv2sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_LT (V2SImode,
	gen_rtx_ABS (V2SFmode,
	operand1),
	gen_rtx_ABS (V2SFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2451 */
rtx
gen_neon_vcalev2sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_LE (V2SImode,
	gen_rtx_ABS (V2SFmode,
	operand1),
	gen_rtx_ABS (V2SFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2451 */
rtx
gen_neon_vcagtv4sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_GT (V4SImode,
	gen_rtx_ABS (V4SFmode,
	operand1),
	gen_rtx_ABS (V4SFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2451 */
rtx
gen_neon_vcagev4sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_GE (V4SImode,
	gen_rtx_ABS (V4SFmode,
	operand1),
	gen_rtx_ABS (V4SFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2451 */
rtx
gen_neon_vcaltv4sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_LT (V4SImode,
	gen_rtx_ABS (V4SFmode,
	operand1),
	gen_rtx_ABS (V4SFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2451 */
rtx
gen_neon_vcalev4sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_LE (V4SImode,
	gen_rtx_ABS (V4SFmode,
	operand1),
	gen_rtx_ABS (V4SFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2462 */
rtx
gen_neon_vcagev2sf_insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	161));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2462 */
rtx
gen_neon_vcagtv2sf_insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	162));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2462 */
rtx
gen_neon_vcalev2sf_insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	163));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2462 */
rtx
gen_neon_vcaltv2sf_insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	164));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2462 */
rtx
gen_neon_vcagev4sf_insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	161));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2462 */
rtx
gen_neon_vcagtv4sf_insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	162));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2462 */
rtx
gen_neon_vcalev4sf_insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	163));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2462 */
rtx
gen_neon_vcaltv4sf_insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	164));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2490 */
rtx
gen_neon_vcagtv8hf_fp16insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_GT (V8HImode,
	gen_rtx_ABS (V8HFmode,
	operand1),
	gen_rtx_ABS (V8HFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2490 */
rtx
gen_neon_vcagev8hf_fp16insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_GE (V8HImode,
	gen_rtx_ABS (V8HFmode,
	operand1),
	gen_rtx_ABS (V8HFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2490 */
rtx
gen_neon_vcaltv8hf_fp16insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_LT (V8HImode,
	gen_rtx_ABS (V8HFmode,
	operand1),
	gen_rtx_ABS (V8HFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2490 */
rtx
gen_neon_vcalev8hf_fp16insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_LE (V8HImode,
	gen_rtx_ABS (V8HFmode,
	operand1),
	gen_rtx_ABS (V8HFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2490 */
rtx
gen_neon_vcagtv4hf_fp16insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_GT (V4HImode,
	gen_rtx_ABS (V4HFmode,
	operand1),
	gen_rtx_ABS (V4HFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2490 */
rtx
gen_neon_vcagev4hf_fp16insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_GE (V4HImode,
	gen_rtx_ABS (V4HFmode,
	operand1),
	gen_rtx_ABS (V4HFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2490 */
rtx
gen_neon_vcaltv4hf_fp16insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_LT (V4HImode,
	gen_rtx_ABS (V4HFmode,
	operand1),
	gen_rtx_ABS (V4HFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2490 */
rtx
gen_neon_vcalev4hf_fp16insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_LE (V4HImode,
	gen_rtx_ABS (V4HFmode,
	operand1),
	gen_rtx_ABS (V4HFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2502 */
rtx
gen_neon_vcagev8hf_fp16insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	161));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2502 */
rtx
gen_neon_vcagtv8hf_fp16insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	162));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2502 */
rtx
gen_neon_vcalev8hf_fp16insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	163));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2502 */
rtx
gen_neon_vcaltv8hf_fp16insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	164));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2502 */
rtx
gen_neon_vcagev4hf_fp16insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	161));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2502 */
rtx
gen_neon_vcagtv4hf_fp16insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	162));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2502 */
rtx
gen_neon_vcalev4hf_fp16insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	163));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2502 */
rtx
gen_neon_vcaltv4hf_fp16insn_unspec (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	164));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2526 */
rtx
gen_neon_vtst_combinev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8QImode,
	gen_rtx_EQ (V8QImode,
	gen_rtx_AND (V8QImode,
	operand1,
	operand2),
	operand3),
	operand4));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2526 */
rtx
gen_neon_vtst_combinev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V16QImode,
	gen_rtx_EQ (V16QImode,
	gen_rtx_AND (V16QImode,
	operand1,
	operand2),
	operand3),
	operand4));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2526 */
rtx
gen_neon_vtst_combinev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HImode,
	gen_rtx_EQ (V4HImode,
	gen_rtx_AND (V4HImode,
	operand1,
	operand2),
	operand3),
	operand4));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2526 */
rtx
gen_neon_vtst_combinev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_EQ (V8HImode,
	gen_rtx_AND (V8HImode,
	operand1,
	operand2),
	operand3),
	operand4));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2526 */
rtx
gen_neon_vtst_combinev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_EQ (V2SImode,
	gen_rtx_AND (V2SImode,
	operand1,
	operand2),
	operand3),
	operand4));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2526 */
rtx
gen_neon_vtst_combinev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_EQ (V4SImode,
	gen_rtx_AND (V4SImode,
	operand1,
	operand2),
	operand3),
	operand4));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2539 */
rtx
gen_neon_vabdsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	149));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2539 */
rtx
gen_neon_vabduv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	150));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2539 */
rtx
gen_neon_vabdsv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	149));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2539 */
rtx
gen_neon_vabduv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	150));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2539 */
rtx
gen_neon_vabdsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	149));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2539 */
rtx
gen_neon_vabduv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	150));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2539 */
rtx
gen_neon_vabdsv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	149));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2539 */
rtx
gen_neon_vabduv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	150));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2539 */
rtx
gen_neon_vabdsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	149));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2539 */
rtx
gen_neon_vabduv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	150));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2539 */
rtx
gen_neon_vabdsv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	149));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2539 */
rtx
gen_neon_vabduv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	150));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2549 */
rtx
gen_neon_vabdv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	148));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2549 */
rtx
gen_neon_vabdv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	148));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2559 */
rtx
gen_neon_vabdfv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	148));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2559 */
rtx
gen_neon_vabdfv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	148));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2569 */
rtx
gen_neon_vabdlsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	151));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2569 */
rtx
gen_neon_vabdluv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	152));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2569 */
rtx
gen_neon_vabdlsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	151));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2569 */
rtx
gen_neon_vabdluv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	152));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2569 */
rtx
gen_neon_vabdlsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	151));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2569 */
rtx
gen_neon_vabdluv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	152));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2579 */
rtx
gen_neon_vabasv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	149),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2579 */
rtx
gen_neon_vabauv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	150),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2579 */
rtx
gen_neon_vabasv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V16QImode,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	149),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2579 */
rtx
gen_neon_vabauv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V16QImode,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	150),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2579 */
rtx
gen_neon_vabasv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	149),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2579 */
rtx
gen_neon_vabauv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	150),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2579 */
rtx
gen_neon_vabasv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	149),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2579 */
rtx
gen_neon_vabauv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	150),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2579 */
rtx
gen_neon_vabasv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	149),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2579 */
rtx
gen_neon_vabauv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	150),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2579 */
rtx
gen_neon_vabasv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	149),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2579 */
rtx
gen_neon_vabauv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	150),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2590 */
rtx
gen_neon_vabalsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	151),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2590 */
rtx
gen_neon_vabaluv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	152),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2590 */
rtx
gen_neon_vabalsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	151),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2590 */
rtx
gen_neon_vabaluv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	152),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2590 */
rtx
gen_neon_vabalsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	151),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2590 */
rtx
gen_neon_vabaluv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	152),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vmaxsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	213));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vmaxuv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	214));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vminsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	216));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vminuv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	217));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vmaxsv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	213));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vmaxuv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	214));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vminsv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	216));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vminuv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	217));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vmaxsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	213));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vmaxuv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	214));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vminsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	216));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vminuv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	217));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vmaxsv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	213));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vmaxuv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	214));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vminsv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	216));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vminuv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	217));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vmaxsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	213));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vmaxuv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	214));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vminsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	216));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vminuv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	217));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vmaxsv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	213));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vmaxuv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	214));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vminsv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	216));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2627 */
rtx
gen_neon_vminuv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	217));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2637 */
rtx
gen_neon_vmaxfv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	213));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2637 */
rtx
gen_neon_vminfv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	216));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2637 */
rtx
gen_neon_vmaxfv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	213));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2637 */
rtx
gen_neon_vminfv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	216));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2647 */
rtx
gen_neon_vmaxfv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	213));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2647 */
rtx
gen_neon_vminfv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	216));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2647 */
rtx
gen_neon_vmaxfv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	213));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2647 */
rtx
gen_neon_vminfv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	216));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2658 */
rtx
gen_neon_vpmaxfv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	249));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2658 */
rtx
gen_neon_vpminfv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	251));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2669 */
rtx
gen_neon_vmaxnmv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	215));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2669 */
rtx
gen_neon_vminnmv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	218));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2669 */
rtx
gen_neon_vmaxnmv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	215));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2669 */
rtx
gen_neon_vminnmv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	218));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2682 */
rtx
gen_neon_vmaxnmv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	215));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2682 */
rtx
gen_neon_vminnmv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	218));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2682 */
rtx
gen_neon_vmaxnmv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	215));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2682 */
rtx
gen_neon_vminnmv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	218));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2693 */
rtx
gen_fmaxv2sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	215));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2693 */
rtx
gen_fminv2sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	218));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2693 */
rtx
gen_fmaxv4sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	215));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2693 */
rtx
gen_fminv4sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	218));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2714 */
rtx
gen_neon_vpaddlsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	247));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2714 */
rtx
gen_neon_vpaddluv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	248));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2714 */
rtx
gen_neon_vpaddlsv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	247));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2714 */
rtx
gen_neon_vpaddluv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	248));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2714 */
rtx
gen_neon_vpaddlsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	247));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2714 */
rtx
gen_neon_vpaddluv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	248));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2714 */
rtx
gen_neon_vpaddlsv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	247));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2714 */
rtx
gen_neon_vpaddluv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	248));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2714 */
rtx
gen_neon_vpaddlsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	247));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2714 */
rtx
gen_neon_vpaddluv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	248));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2714 */
rtx
gen_neon_vpaddlsv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	247));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2714 */
rtx
gen_neon_vpaddluv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	248));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2723 */
rtx
gen_neon_vpadalsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	244));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2723 */
rtx
gen_neon_vpadaluv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	245));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2723 */
rtx
gen_neon_vpadalsv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	244));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2723 */
rtx
gen_neon_vpadaluv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	245));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2723 */
rtx
gen_neon_vpadalsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	244));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2723 */
rtx
gen_neon_vpadaluv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	245));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2723 */
rtx
gen_neon_vpadalsv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	244));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2723 */
rtx
gen_neon_vpadaluv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	245));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2723 */
rtx
gen_neon_vpadalsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	244));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2723 */
rtx
gen_neon_vpadaluv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	245));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2723 */
rtx
gen_neon_vpadalsv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	244));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2723 */
rtx
gen_neon_vpadaluv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	245));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2733 */
rtx
gen_neon_vpmaxsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	249));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2733 */
rtx
gen_neon_vpmaxuv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	250));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2733 */
rtx
gen_neon_vpminsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	251));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2733 */
rtx
gen_neon_vpminuv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	252));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2733 */
rtx
gen_neon_vpmaxsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	249));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2733 */
rtx
gen_neon_vpmaxuv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	250));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2733 */
rtx
gen_neon_vpminsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	251));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2733 */
rtx
gen_neon_vpminuv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	252));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2733 */
rtx
gen_neon_vpmaxsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	249));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2733 */
rtx
gen_neon_vpmaxuv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	250));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2733 */
rtx
gen_neon_vpminsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	251));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2733 */
rtx
gen_neon_vpminuv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	252));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2743 */
rtx
gen_neon_vpmaxfv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	249));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2743 */
rtx
gen_neon_vpminfv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	251));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2743 */
rtx
gen_neon_vpmaxfv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	249));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2743 */
rtx
gen_neon_vpminfv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	251));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2753 */
rtx
gen_neon_vrecpsv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	290));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2753 */
rtx
gen_neon_vrecpsv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	290));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2763 */
rtx
gen_neon_vrecpsv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	290));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2763 */
rtx
gen_neon_vrecpsv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	290));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2774 */
rtx
gen_neon_vrsqrtsv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	295));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2774 */
rtx
gen_neon_vrsqrtsv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	295));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2784 */
rtx
gen_neon_vrsqrtsv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	295));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2784 */
rtx
gen_neon_vrsqrtsv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	295));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2804 */
rtx
gen_neon_vqabsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	257));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2804 */
rtx
gen_neon_vqabsv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	257));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2804 */
rtx
gen_neon_vqabsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	257));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2804 */
rtx
gen_neon_vqabsv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	257));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2804 */
rtx
gen_neon_vqabsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	257));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2804 */
rtx
gen_neon_vqabsv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	257));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2813 */
rtx
gen_neon_bswapv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_BSWAP (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2813 */
rtx
gen_neon_bswapv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_BSWAP (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2813 */
rtx
gen_neon_bswapv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_BSWAP (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2813 */
rtx
gen_neon_bswapv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_BSWAP (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2813 */
rtx
gen_neon_bswapv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_BSWAP (V2DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2837 */
rtx
gen_neon_vcadd90v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	368));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2837 */
rtx
gen_neon_vcadd270v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	369));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2837 */
rtx
gen_neon_vcadd90v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	368));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2837 */
rtx
gen_neon_vcadd270v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	369));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2837 */
rtx
gen_neon_vcadd90v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	368));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2837 */
rtx
gen_neon_vcadd270v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	369));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2837 */
rtx
gen_neon_vcadd90v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	368));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2837 */
rtx
gen_neon_vcadd270v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	369));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2847 */
rtx
gen_neon_vcmla0v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	370)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2847 */
rtx
gen_neon_vcmla90v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	371)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2847 */
rtx
gen_neon_vcmla180v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	372)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2847 */
rtx
gen_neon_vcmla270v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	373)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2847 */
rtx
gen_neon_vcmla0v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	370)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2847 */
rtx
gen_neon_vcmla90v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	371)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2847 */
rtx
gen_neon_vcmla180v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	372)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2847 */
rtx
gen_neon_vcmla270v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	373)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2847 */
rtx
gen_neon_vcmla0v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	370)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2847 */
rtx
gen_neon_vcmla90v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	371)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2847 */
rtx
gen_neon_vcmla180v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	372)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2847 */
rtx
gen_neon_vcmla270v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	373)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2847 */
rtx
gen_neon_vcmla0v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	370)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2847 */
rtx
gen_neon_vcmla90v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	371)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2847 */
rtx
gen_neon_vcmla180v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	372)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2847 */
rtx
gen_neon_vcmla270v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	373)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2858 */
rtx
gen_neon_vcmla_lane0v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	370)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2858 */
rtx
gen_neon_vcmla_lane90v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	371)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2858 */
rtx
gen_neon_vcmla_lane180v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	372)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2858 */
rtx
gen_neon_vcmla_lane270v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	373)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2858 */
rtx
gen_neon_vcmla_lane0v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	370)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2858 */
rtx
gen_neon_vcmla_lane90v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	371)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2858 */
rtx
gen_neon_vcmla_lane180v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	372)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2858 */
rtx
gen_neon_vcmla_lane270v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	373)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2858 */
rtx
gen_neon_vcmla_lane0v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	370)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2858 */
rtx
gen_neon_vcmla_lane90v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	371)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2858 */
rtx
gen_neon_vcmla_lane180v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	372)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2858 */
rtx
gen_neon_vcmla_lane270v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	373)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2858 */
rtx
gen_neon_vcmla_lane0v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	370)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2858 */
rtx
gen_neon_vcmla_lane90v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	371)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2858 */
rtx
gen_neon_vcmla_lane180v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	372)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2858 */
rtx
gen_neon_vcmla_lane270v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	373)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2873 */
rtx
gen_neon_vcmla_laneq0v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	370)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2873 */
rtx
gen_neon_vcmla_laneq90v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	371)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2873 */
rtx
gen_neon_vcmla_laneq180v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	372)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2873 */
rtx
gen_neon_vcmla_laneq270v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	373)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2873 */
rtx
gen_neon_vcmla_laneq0v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	370)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2873 */
rtx
gen_neon_vcmla_laneq90v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	371)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2873 */
rtx
gen_neon_vcmla_laneq180v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	372)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2873 */
rtx
gen_neon_vcmla_laneq270v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	373)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2888 */
rtx
gen_neon_vcmlaq_lane0v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	370)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2888 */
rtx
gen_neon_vcmlaq_lane90v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	371)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2888 */
rtx
gen_neon_vcmlaq_lane180v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	372)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2888 */
rtx
gen_neon_vcmlaq_lane270v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	373)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2888 */
rtx
gen_neon_vcmlaq_lane0v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	370)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2888 */
rtx
gen_neon_vcmlaq_lane90v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	371)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2888 */
rtx
gen_neon_vcmlaq_lane180v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	372)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2888 */
rtx
gen_neon_vcmlaq_lane270v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	373)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2943 */
rtx
gen_sdot_prodv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	362),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2943 */
rtx
gen_udot_prodv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	363),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2943 */
rtx
gen_sdot_prodv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	362),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2943 */
rtx
gen_udot_prodv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	363),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2967 */
rtx
gen_neon_usdotv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	364),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2967 */
rtx
gen_neon_usdotv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	364),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2982 */
rtx
gen_neon_sdot_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	362),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2982 */
rtx
gen_neon_udot_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	363),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2982 */
rtx
gen_neon_sdot_lanev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	362),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2982 */
rtx
gen_neon_udot_lanev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	363),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2997 */
rtx
gen_neon_sdot_laneqv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	362),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2997 */
rtx
gen_neon_udot_laneqv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	363),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2997 */
rtx
gen_neon_sdot_laneqv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	362),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2997 */
rtx
gen_neon_udot_laneqv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	363),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3024 */
rtx
gen_neon_usdot_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	364),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3024 */
rtx
gen_neon_sudot_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	365),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3024 */
rtx
gen_neon_usdot_lanev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	364),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3024 */
rtx
gen_neon_sudot_lanev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	365),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3040 */
rtx
gen_neon_usdot_laneqv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	364),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3040 */
rtx
gen_neon_sudot_laneqv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	365),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3040 */
rtx
gen_neon_usdot_laneqv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	364),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3040 */
rtx
gen_neon_sudot_laneqv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	365),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3099 */
rtx
gen_neon_vqnegv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	273));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3099 */
rtx
gen_neon_vqnegv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	273));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3099 */
rtx
gen_neon_vqnegv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	273));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3099 */
rtx
gen_neon_vqnegv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	273));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3099 */
rtx
gen_neon_vqnegv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	273));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3099 */
rtx
gen_neon_vqnegv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	273));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3108 */
rtx
gen_neon_vclsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	170));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3108 */
rtx
gen_neon_vclsv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	170));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3108 */
rtx
gen_neon_vclsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	170));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3108 */
rtx
gen_neon_vclsv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	170));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3108 */
rtx
gen_neon_vclsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	170));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3108 */
rtx
gen_neon_vclsv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	170));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3117 */
rtx
gen_neon_vclzv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3117 */
rtx
gen_neon_vclzv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3117 */
rtx
gen_neon_vclzv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3117 */
rtx
gen_neon_vclzv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3117 */
rtx
gen_neon_vclzv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3117 */
rtx
gen_neon_vclzv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3125 */
rtx
gen_popcountv8qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_POPCOUNT (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3125 */
rtx
gen_popcountv16qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_POPCOUNT (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3142 */
rtx
gen_neon_vrecpev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	289));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3142 */
rtx
gen_neon_vrecpev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	289));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3151 */
rtx
gen_neon_vrecpev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	289));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3151 */
rtx
gen_neon_vrecpev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	289));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3151 */
rtx
gen_neon_vrecpev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	289));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3151 */
rtx
gen_neon_vrecpev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	289));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3160 */
rtx
gen_neon_vrsqrtev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	294));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3160 */
rtx
gen_neon_vrsqrtev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	294));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3160 */
rtx
gen_neon_vrsqrtev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	294));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3160 */
rtx
gen_neon_vrsqrtev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	294));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3178 */
rtx
gen_neon_vget_lanev8qi_sext_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3178 */
rtx
gen_neon_vget_lanev4hi_sext_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3178 */
rtx
gen_neon_vget_lanev2si_sext_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3178 */
rtx
gen_neon_vget_lanev2sf_sext_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3197 */
rtx
gen_neon_vget_lanev8qi_zext_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3197 */
rtx
gen_neon_vget_lanev4hi_zext_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3197 */
rtx
gen_neon_vget_lanev2si_zext_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3197 */
rtx
gen_neon_vget_lanev2sf_zext_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3216 */
rtx
gen_neon_vget_lanev16qi_sext_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3216 */
rtx
gen_neon_vget_lanev8hi_sext_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3216 */
rtx
gen_neon_vget_lanev8hf_sext_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3216 */
rtx
gen_neon_vget_lanev4si_sext_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3216 */
rtx
gen_neon_vget_lanev4sf_sext_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3243 */
rtx
gen_neon_vget_lanev16qi_zext_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3243 */
rtx
gen_neon_vget_lanev8hi_zext_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3243 */
rtx
gen_neon_vget_lanev8hf_zext_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3243 */
rtx
gen_neon_vget_lanev4si_zext_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3243 */
rtx
gen_neon_vget_lanev4sf_zext_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3413 */
rtx
gen_neon_vdup_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3413 */
rtx
gen_neon_vdup_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3413 */
rtx
gen_neon_vdup_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3413 */
rtx
gen_neon_vdup_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3421 */
rtx
gen_neon_vdup_nv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3429 */
rtx
gen_neon_vdup_nv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3437 */
rtx
gen_neon_vdup_nv4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4BFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3445 */
rtx
gen_neon_vdup_nv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8BFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3453 */
rtx
gen_neon_vdup_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3453 */
rtx
gen_neon_vdup_nv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V2SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3453 */
rtx
gen_neon_vdup_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3453 */
rtx
gen_neon_vdup_nv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3473 */
rtx
gen_neon_vdup_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V2DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3484 */
rtx
gen_neon_vdup_lanev8qi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8QImode,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3484 */
rtx
gen_neon_vdup_lanev16qi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V16QImode,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3484 */
rtx
gen_neon_vdup_lanev4hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4HImode,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3484 */
rtx
gen_neon_vdup_lanev8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3484 */
rtx
gen_neon_vdup_lanev2si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V2SImode,
	gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3484 */
rtx
gen_neon_vdup_lanev4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3484 */
rtx
gen_neon_vdup_lanev2sf_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V2SFmode,
	gen_rtx_VEC_SELECT (SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3484 */
rtx
gen_neon_vdup_lanev4sf_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	gen_rtx_VEC_SELECT (SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3506 */
rtx
gen_neon_vdup_lanev8hf_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3506 */
rtx
gen_neon_vdup_lanev4hf_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3506 */
rtx
gen_neon_vdup_lanev4bf_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4BFmode,
	gen_rtx_VEC_SELECT (BFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3506 */
rtx
gen_neon_vdup_lanev8bf_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8BFmode,
	gen_rtx_VEC_SELECT (BFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3606 */
rtx
gen_neon_vcombinev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3606 */
rtx
gen_neon_vcombinev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3606 */
rtx
gen_neon_vcombinev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3606 */
rtx
gen_neon_vcombinev4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8BFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3606 */
rtx
gen_neon_vcombinev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3606 */
rtx
gen_neon_vcombinev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3606 */
rtx
gen_neon_vcombinedi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3644 */
rtx
gen_floatv2siv2sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT (V2SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3644 */
rtx
gen_floatv4siv4sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT (V4SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3652 */
rtx
gen_floatunsv2siv2sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FLOAT (V2SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3652 */
rtx
gen_floatunsv4siv4sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FLOAT (V4SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3660 */
rtx
gen_fix_truncv2sfv2si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3660 */
rtx
gen_fix_truncv4sfv4si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3668 */
rtx
gen_fixuns_truncv2sfv2si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3668 */
rtx
gen_fixuns_truncv4sfv4si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3676 */
rtx
gen_neon_vcvtsv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	173));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3676 */
rtx
gen_neon_vcvtuv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	174));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3676 */
rtx
gen_neon_vcvtsv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	173));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3676 */
rtx
gen_neon_vcvtuv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	174));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3685 */
rtx
gen_neon_vcvtsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	173));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3685 */
rtx
gen_neon_vcvtuv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	174));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3685 */
rtx
gen_neon_vcvtsv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	173));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3685 */
rtx
gen_neon_vcvtuv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	174));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3694 */
rtx
gen_neon_vcvtv4sfv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	172));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3703 */
rtx
gen_neon_vcvtv4hfv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	172));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3712 */
rtx
gen_neon_vcvtsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	173));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3712 */
rtx
gen_neon_vcvtuv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	174));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3712 */
rtx
gen_neon_vcvtsv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	173));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3712 */
rtx
gen_neon_vcvtuv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	174));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3723 */
rtx
gen_neon_vcvtsv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	173));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3723 */
rtx
gen_neon_vcvtuv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	174));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3723 */
rtx
gen_neon_vcvtsv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	173));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3723 */
rtx
gen_neon_vcvtuv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	174));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3734 */
rtx
gen_neon_vcvts_nv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	175));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3734 */
rtx
gen_neon_vcvtu_nv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	176));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3734 */
rtx
gen_neon_vcvts_nv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	175));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3734 */
rtx
gen_neon_vcvtu_nv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	176));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3747 */
rtx
gen_neon_vcvts_nv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	175));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3747 */
rtx
gen_neon_vcvtu_nv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	176));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3747 */
rtx
gen_neon_vcvts_nv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	175));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3747 */
rtx
gen_neon_vcvtu_nv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	176));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3761 */
rtx
gen_neon_vcvts_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	175));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3761 */
rtx
gen_neon_vcvtu_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	176));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3761 */
rtx
gen_neon_vcvts_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	175));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3761 */
rtx
gen_neon_vcvtu_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	176));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3774 */
rtx
gen_neon_vcvts_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	175));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3774 */
rtx
gen_neon_vcvtu_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	176));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3774 */
rtx
gen_neon_vcvts_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	175));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3774 */
rtx
gen_neon_vcvtu_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	176));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3788 */
rtx
gen_neon_vcvtasv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	183));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3788 */
rtx
gen_neon_vcvtauv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	184));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3788 */
rtx
gen_neon_vcvtmsv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	185));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3788 */
rtx
gen_neon_vcvtmuv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	186));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3788 */
rtx
gen_neon_vcvtnsv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	187));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3788 */
rtx
gen_neon_vcvtnuv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	188));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3788 */
rtx
gen_neon_vcvtpsv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	189));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3788 */
rtx
gen_neon_vcvtpuv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	190));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3788 */
rtx
gen_neon_vcvtasv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	183));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3788 */
rtx
gen_neon_vcvtauv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	184));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3788 */
rtx
gen_neon_vcvtmsv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	185));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3788 */
rtx
gen_neon_vcvtmuv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	186));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3788 */
rtx
gen_neon_vcvtnsv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	187));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3788 */
rtx
gen_neon_vcvtnuv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	188));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3788 */
rtx
gen_neon_vcvtpsv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	189));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3788 */
rtx
gen_neon_vcvtpuv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	190));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3799 */
rtx
gen_neon_vmovnv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	236));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3799 */
rtx
gen_neon_vmovnv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	236));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3799 */
rtx
gen_neon_vmovnv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	236));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3808 */
rtx
gen_neon_vqmovnsv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	270));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3808 */
rtx
gen_neon_vqmovnuv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	271));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3808 */
rtx
gen_neon_vqmovnsv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	270));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3808 */
rtx
gen_neon_vqmovnuv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	271));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3808 */
rtx
gen_neon_vqmovnsv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	270));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3808 */
rtx
gen_neon_vqmovnuv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	271));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3817 */
rtx
gen_neon_vqmovunv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	272));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3817 */
rtx
gen_neon_vqmovunv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	272));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3817 */
rtx
gen_neon_vqmovunv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	272));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3826 */
rtx
gen_neon_vmovlsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	234));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3826 */
rtx
gen_neon_vmovluv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	235));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3826 */
rtx
gen_neon_vmovlsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	234));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3826 */
rtx
gen_neon_vmovluv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	235));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3826 */
rtx
gen_neon_vmovlsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	234));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3826 */
rtx
gen_neon_vmovluv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	235));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3835 */
rtx
gen_neon_vmul_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	241));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3835 */
rtx
gen_neon_vmul_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	241));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3835 */
rtx
gen_neon_vmul_lanev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	241));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3852 */
rtx
gen_neon_vmul_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	241));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3852 */
rtx
gen_neon_vmul_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	241));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3852 */
rtx
gen_neon_vmul_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	241));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3869 */
rtx
gen_neon_vmul_lanev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	241));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3869 */
rtx
gen_neon_vmul_lanev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	241));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3881 */
rtx
gen_neon_vmulls_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	242));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3881 */
rtx
gen_neon_vmullu_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	243));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3881 */
rtx
gen_neon_vmulls_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	242));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3881 */
rtx
gen_neon_vmullu_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	243));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3895 */
rtx
gen_neon_vqdmull_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	269));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3895 */
rtx
gen_neon_vqdmull_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	269));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3909 */
rtx
gen_neon_vqdmulh_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	265));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3909 */
rtx
gen_neon_vqrdmulh_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	267));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3909 */
rtx
gen_neon_vqdmulh_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	265));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3909 */
rtx
gen_neon_vqrdmulh_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	267));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3923 */
rtx
gen_neon_vqdmulh_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	265));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3923 */
rtx
gen_neon_vqrdmulh_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	267));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3923 */
rtx
gen_neon_vqdmulh_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	265));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3923 */
rtx
gen_neon_vqrdmulh_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	267));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3938 */
rtx
gen_neon_vqrdmlah_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	353));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3938 */
rtx
gen_neon_vqrdmlsh_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	354));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3938 */
rtx
gen_neon_vqrdmlah_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	353));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3938 */
rtx
gen_neon_vqrdmlsh_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	354));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3954 */
rtx
gen_neon_vqrdmlah_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	353));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3954 */
rtx
gen_neon_vqrdmlsh_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	354));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3954 */
rtx
gen_neon_vqrdmlah_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	353));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3954 */
rtx
gen_neon_vqrdmlsh_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	354));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3970 */
rtx
gen_neon_vmla_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	220));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3970 */
rtx
gen_neon_vmla_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	220));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3970 */
rtx
gen_neon_vmla_lanev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	220));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3988 */
rtx
gen_neon_vmla_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	220));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3988 */
rtx
gen_neon_vmla_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	220));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3988 */
rtx
gen_neon_vmla_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	220));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4006 */
rtx
gen_neon_vmlals_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	223));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4006 */
rtx
gen_neon_vmlalu_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	224));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4006 */
rtx
gen_neon_vmlals_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	223));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4006 */
rtx
gen_neon_vmlalu_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	224));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4021 */
rtx
gen_neon_vqdmlal_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	261));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4021 */
rtx
gen_neon_vqdmlal_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	261));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4036 */
rtx
gen_neon_vmls_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	226));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4036 */
rtx
gen_neon_vmls_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	226));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4036 */
rtx
gen_neon_vmls_lanev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	226));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4054 */
rtx
gen_neon_vmls_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	226));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4054 */
rtx
gen_neon_vmls_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	226));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4054 */
rtx
gen_neon_vmls_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	226));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4072 */
rtx
gen_neon_vmlsls_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	229));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4072 */
rtx
gen_neon_vmlslu_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	230));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4072 */
rtx
gen_neon_vmlsls_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	229));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4072 */
rtx
gen_neon_vmlslu_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	230));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4087 */
rtx
gen_neon_vqdmlsl_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	263));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4087 */
rtx
gen_neon_vqdmlsl_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	263));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4379 */
rtx
gen_neon_vextv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	191));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4379 */
rtx
gen_neon_vextv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	191));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4379 */
rtx
gen_neon_vextv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	191));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4379 */
rtx
gen_neon_vextv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	191));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4379 */
rtx
gen_neon_vextv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	191));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4379 */
rtx
gen_neon_vextv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	191));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4379 */
rtx
gen_neon_vextv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	191));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4379 */
rtx
gen_neon_vextv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	191));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4379 */
rtx
gen_neon_vextv4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	191));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4379 */
rtx
gen_neon_vextv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	191));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4379 */
rtx
gen_neon_vextv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	191));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4379 */
rtx
gen_neon_vextv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	191));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4379 */
rtx
gen_neon_vextdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	191));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4379 */
rtx
gen_neon_vextv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	191));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4393 */
rtx
gen_neon_vrev64v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	293));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4393 */
rtx
gen_neon_vrev64v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	293));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4393 */
rtx
gen_neon_vrev64v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	293));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4393 */
rtx
gen_neon_vrev64v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	293));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4393 */
rtx
gen_neon_vrev64v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	293));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4393 */
rtx
gen_neon_vrev64v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	293));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4393 */
rtx
gen_neon_vrev64v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	293));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4393 */
rtx
gen_neon_vrev64v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	293));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4393 */
rtx
gen_neon_vrev64v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	293));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4393 */
rtx
gen_neon_vrev64v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	293));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4393 */
rtx
gen_neon_vrev64v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	293));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4402 */
rtx
gen_neon_vrev32v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	292));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4402 */
rtx
gen_neon_vrev32v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	292));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4402 */
rtx
gen_neon_vrev32v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	292));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4402 */
rtx
gen_neon_vrev32v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	292));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4411 */
rtx
gen_neon_vrev16v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	291));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4411 */
rtx
gen_neon_vrev16v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	291));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4428 */
rtx
gen_neon_vbslv8qi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4428 */
rtx
gen_neon_vbslv16qi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4428 */
rtx
gen_neon_vbslv4hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4428 */
rtx
gen_neon_vbslv8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4428 */
rtx
gen_neon_vbslv2si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4428 */
rtx
gen_neon_vbslv4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4428 */
rtx
gen_neon_vbslv4hf_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4428 */
rtx
gen_neon_vbslv8hf_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4428 */
rtx
gen_neon_vbslv4bf_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4428 */
rtx
gen_neon_vbslv8bf_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4428 */
rtx
gen_neon_vbslv2sf_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4428 */
rtx
gen_neon_vbslv4sf_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4428 */
rtx
gen_neon_vbsldi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4428 */
rtx
gen_neon_vbslv2di_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vshlsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	296));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vshluv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	297));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vrshlsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	298));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vrshluv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	299));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vshlsv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	296));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vshluv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	297));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vrshlsv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	298));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vrshluv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	299));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vshlsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	296));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vshluv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	297));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vrshlsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	298));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vrshluv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	299));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vshlsv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	296));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vshluv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	297));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vrshlsv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	298));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vrshluv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	299));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vshlsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	296));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vshluv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	297));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vrshlsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	298));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vrshluv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	299));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vshlsv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	296));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vshluv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	297));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vrshlsv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	298));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vrshluv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	299));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vshlsdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	296));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vshludi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	297));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vrshlsdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	298));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vrshludi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	299));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vshlsv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	296));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vshluv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	297));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vrshlsv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	298));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4455 */
rtx
gen_neon_vrshluv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	299));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqshlsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	274));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqshluv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	275));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqrshlsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	276));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqrshluv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	277));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqshlsv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	274));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqshluv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	275));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqrshlsv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	276));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqrshluv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	277));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqshlsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	274));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqshluv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	275));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqrshlsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	276));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqrshluv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	277));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqshlsv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	274));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqshluv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	275));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqrshlsv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	276));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqrshluv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	277));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqshlsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	274));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqshluv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	275));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqrshlsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	276));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqrshluv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	277));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqshlsv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	274));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqshluv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	275));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqrshlsv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	276));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqrshluv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	277));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqshlsdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	274));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqshludi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	275));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqrshlsdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	276));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqrshludi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	277));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqshlsv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	274));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqshluv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	275));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqrshlsv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	276));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4466 */
rtx
gen_neon_vqrshluv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	277));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vshrs_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	303));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vshru_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	304));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vrshrs_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	305));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vrshru_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	306));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vshrs_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	303));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vshru_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	304));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vrshrs_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	305));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vrshru_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	306));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vshrs_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	303));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vshru_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	304));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vrshrs_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	305));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vrshru_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	306));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vshrs_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	303));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vshru_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	304));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vrshrs_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	305));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vrshru_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	306));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vshrs_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	303));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vshru_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	304));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vrshrs_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	305));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vrshru_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	306));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vshrs_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	303));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vshru_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	304));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vrshrs_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	305));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vrshru_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	306));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vshrs_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	303));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vshru_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	304));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vrshrs_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	305));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vrshru_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	306));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vshrs_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	303));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vshru_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	304));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vrshrs_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	305));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4477 */
rtx
gen_neon_vrshru_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	306));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4491 */
rtx
gen_neon_vshrn_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	307));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4491 */
rtx
gen_neon_vrshrn_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	308));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4491 */
rtx
gen_neon_vshrn_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	307));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4491 */
rtx
gen_neon_vrshrn_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	308));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4491 */
rtx
gen_neon_vshrn_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	307));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4491 */
rtx
gen_neon_vrshrn_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	308));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4505 */
rtx
gen_neon_vqshrns_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	281));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4505 */
rtx
gen_neon_vqshrnu_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	282));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4505 */
rtx
gen_neon_vqrshrns_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	283));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4505 */
rtx
gen_neon_vqrshrnu_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	284));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4505 */
rtx
gen_neon_vqshrns_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	281));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4505 */
rtx
gen_neon_vqshrnu_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	282));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4505 */
rtx
gen_neon_vqrshrns_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	283));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4505 */
rtx
gen_neon_vqrshrnu_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	284));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4505 */
rtx
gen_neon_vqshrns_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	281));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4505 */
rtx
gen_neon_vqshrnu_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	282));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4505 */
rtx
gen_neon_vqrshrns_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	283));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4505 */
rtx
gen_neon_vqrshrnu_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	284));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4519 */
rtx
gen_neon_vqshrun_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	285));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4519 */
rtx
gen_neon_vqrshrun_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	286));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4519 */
rtx
gen_neon_vqshrun_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	285));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4519 */
rtx
gen_neon_vqrshrun_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	286));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4519 */
rtx
gen_neon_vqshrun_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	285));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4519 */
rtx
gen_neon_vqrshrun_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	286));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4532 */
rtx
gen_neon_vshl_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	302));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4532 */
rtx
gen_neon_vshl_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	302));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4532 */
rtx
gen_neon_vshl_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	302));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4532 */
rtx
gen_neon_vshl_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	302));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4532 */
rtx
gen_neon_vshl_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	302));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4532 */
rtx
gen_neon_vshl_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	302));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4532 */
rtx
gen_neon_vshl_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	302));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4532 */
rtx
gen_neon_vshl_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	302));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4545 */
rtx
gen_neon_vqshl_s_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	278));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4545 */
rtx
gen_neon_vqshl_u_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	279));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4545 */
rtx
gen_neon_vqshl_s_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	278));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4545 */
rtx
gen_neon_vqshl_u_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	279));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4545 */
rtx
gen_neon_vqshl_s_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	278));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4545 */
rtx
gen_neon_vqshl_u_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	279));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4545 */
rtx
gen_neon_vqshl_s_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	278));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4545 */
rtx
gen_neon_vqshl_u_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	279));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4545 */
rtx
gen_neon_vqshl_s_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	278));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4545 */
rtx
gen_neon_vqshl_u_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	279));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4545 */
rtx
gen_neon_vqshl_s_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	278));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4545 */
rtx
gen_neon_vqshl_u_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	279));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4545 */
rtx
gen_neon_vqshl_s_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	278));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4545 */
rtx
gen_neon_vqshl_u_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	279));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4545 */
rtx
gen_neon_vqshl_s_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	278));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4545 */
rtx
gen_neon_vqshl_u_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	279));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4558 */
rtx
gen_neon_vqshlu_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	280));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4558 */
rtx
gen_neon_vqshlu_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	280));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4558 */
rtx
gen_neon_vqshlu_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	280));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4558 */
rtx
gen_neon_vqshlu_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	280));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4558 */
rtx
gen_neon_vqshlu_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	280));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4558 */
rtx
gen_neon_vqshlu_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	280));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4558 */
rtx
gen_neon_vqshlu_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	280));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4558 */
rtx
gen_neon_vqshlu_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	280));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4571 */
rtx
gen_neon_vshlls_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	300));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4571 */
rtx
gen_neon_vshllu_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	301));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4571 */
rtx
gen_neon_vshlls_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	300));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4571 */
rtx
gen_neon_vshllu_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	301));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4571 */
rtx
gen_neon_vshlls_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	300));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4571 */
rtx
gen_neon_vshllu_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	301));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vsras_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	310));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vsrau_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	311));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vrsras_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	312));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vrsrau_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	313));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vsras_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	310));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vsrau_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	311));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vrsras_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	312));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vrsrau_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	313));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vsras_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	310));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vsrau_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	311));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vrsras_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	312));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vrsrau_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	313));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vsras_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	310));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vsrau_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	311));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vrsras_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	312));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vrsrau_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	313));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vsras_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	310));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vsrau_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	311));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vrsras_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	312));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vrsrau_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	313));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vsras_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	310));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vsrau_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	311));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vrsras_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	312));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vrsrau_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	313));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vsras_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	310));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vsrau_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	311));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vrsras_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	312));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vrsrau_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	313));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vsras_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	310));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vsrau_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	311));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vrsras_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	312));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4586 */
rtx
gen_neon_vrsrau_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	313));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4600 */
rtx
gen_neon_vsri_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	314));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4600 */
rtx
gen_neon_vsri_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	314));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4600 */
rtx
gen_neon_vsri_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	314));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4600 */
rtx
gen_neon_vsri_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	314));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4600 */
rtx
gen_neon_vsri_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	314));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4600 */
rtx
gen_neon_vsri_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	314));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4600 */
rtx
gen_neon_vsri_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	314));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4600 */
rtx
gen_neon_vsri_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	314));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4614 */
rtx
gen_neon_vsli_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	309));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4614 */
rtx
gen_neon_vsli_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	309));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4614 */
rtx
gen_neon_vsli_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	309));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4614 */
rtx
gen_neon_vsli_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	309));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4614 */
rtx
gen_neon_vsli_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	309));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4614 */
rtx
gen_neon_vsli_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	309));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4614 */
rtx
gen_neon_vsli_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	309));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4614 */
rtx
gen_neon_vsli_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	309));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4628 */
rtx
gen_neon_vtbl1v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	335));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4638 */
rtx
gen_neon_vtbl2v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	335));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4659 */
rtx
gen_neon_vtbl3v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	335));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4681 */
rtx
gen_neon_vtbl4v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	335));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4705 */
rtx
gen_neon_vtbl1v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	335));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4736 */
rtx
gen_neon_vtbl2v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	335));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4771 */
rtx
gen_neon_vcombinev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		operand2),
	171));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4787 */
rtx
gen_neon_vtbx1v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	336));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4798 */
rtx
gen_neon_vtbx2v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	336));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4820 */
rtx
gen_neon_vtbx3v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	336));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4843 */
rtx
gen_neon_vtbx4v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	336));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4951 */
rtx
gen_neon_vld1v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4951 */
rtx
gen_neon_vld1v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4951 */
rtx
gen_neon_vld1v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4951 */
rtx
gen_neon_vld1v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4951 */
rtx
gen_neon_vld1v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4951 */
rtx
gen_neon_vld1v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4951 */
rtx
gen_neon_vld1v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4951 */
rtx
gen_neon_vld1v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4951 */
rtx
gen_neon_vld1v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4951 */
rtx
gen_neon_vld1v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4951 */
rtx
gen_neon_vld1v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4951 */
rtx
gen_neon_vld1v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4951 */
rtx
gen_neon_vld1di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4951 */
rtx
gen_neon_vld1v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4963 */
rtx
gen_neon_vld1_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	199));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4963 */
rtx
gen_neon_vld1_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	199));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4963 */
rtx
gen_neon_vld1_lanev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	199));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4963 */
rtx
gen_neon_vld1_lanev4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	199));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4963 */
rtx
gen_neon_vld1_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	199));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4963 */
rtx
gen_neon_vld1_lanev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	199));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4963 */
rtx
gen_neon_vld1_lanedi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	199));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4984 */
rtx
gen_neon_vld1_lanev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	199));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4984 */
rtx
gen_neon_vld1_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	199));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4984 */
rtx
gen_neon_vld1_lanev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	199));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4984 */
rtx
gen_neon_vld1_lanev8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	199));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4984 */
rtx
gen_neon_vld1_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	199));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4984 */
rtx
gen_neon_vld1_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	199));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4984 */
rtx
gen_neon_vld1_lanev2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	199));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5011 */
rtx
gen_neon_vld1_dupv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5011 */
rtx
gen_neon_vld1_dupv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5011 */
rtx
gen_neon_vld1_dupv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5011 */
rtx
gen_neon_vld1_dupv4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4BFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5011 */
rtx
gen_neon_vld1_dupv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5011 */
rtx
gen_neon_vld1_dupv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V2SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5028 */
rtx
gen_neon_vld1_dupv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5028 */
rtx
gen_neon_vld1_dupv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5028 */
rtx
gen_neon_vld1_dupv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5028 */
rtx
gen_neon_vld1_dupv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5028 */
rtx
gen_neon_vld1_dupv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5038 */
rtx
gen_neon_vld1_dupv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V2DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5061 */
rtx
gen_neon_vst1v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5061 */
rtx
gen_neon_vst1v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5061 */
rtx
gen_neon_vst1v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5061 */
rtx
gen_neon_vst1v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5061 */
rtx
gen_neon_vst1v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5061 */
rtx
gen_neon_vst1v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5061 */
rtx
gen_neon_vst1v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5061 */
rtx
gen_neon_vst1v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5061 */
rtx
gen_neon_vst1v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5061 */
rtx
gen_neon_vst1v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5061 */
rtx
gen_neon_vst1v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5061 */
rtx
gen_neon_vst1v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5061 */
rtx
gen_neon_vst1di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5061 */
rtx
gen_neon_vst1v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5071 */
rtx
gen_neon_vst1_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	316));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5071 */
rtx
gen_neon_vst1_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	316));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5071 */
rtx
gen_neon_vst1_lanev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	316));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5071 */
rtx
gen_neon_vst1_lanev4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	316));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5071 */
rtx
gen_neon_vst1_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	316));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5071 */
rtx
gen_neon_vst1_lanev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	316));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5071 */
rtx
gen_neon_vst1_lanedi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	316));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5092 */
rtx
gen_neon_vst1_lanev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	316));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5092 */
rtx
gen_neon_vst1_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	316));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5092 */
rtx
gen_neon_vst1_lanev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	316));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5092 */
rtx
gen_neon_vst1_lanev8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	316));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5092 */
rtx
gen_neon_vst1_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	316));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5092 */
rtx
gen_neon_vst1_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	316));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5092 */
rtx
gen_neon_vst1_lanev2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	316));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5125 */
rtx
gen_neon_vld2v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5125 */
rtx
gen_neon_vld2v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5125 */
rtx
gen_neon_vld2v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5125 */
rtx
gen_neon_vld2v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5125 */
rtx
gen_neon_vld2v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5125 */
rtx
gen_neon_vld2v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5125 */
rtx
gen_neon_vld2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5143 */
rtx
gen_neon_vld2v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5143 */
rtx
gen_neon_vld2v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5143 */
rtx
gen_neon_vld2v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5143 */
rtx
gen_neon_vld2v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5143 */
rtx
gen_neon_vld2v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5143 */
rtx
gen_neon_vld2v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5154 */
rtx
gen_neon_vld2_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	202));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5154 */
rtx
gen_neon_vld2_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	202));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5154 */
rtx
gen_neon_vld2_lanev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	202));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5154 */
rtx
gen_neon_vld2_lanev4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	202));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5154 */
rtx
gen_neon_vld2_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	202));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5154 */
rtx
gen_neon_vld2_lanev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	202));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5178 */
rtx
gen_neon_vld2_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	202));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5178 */
rtx
gen_neon_vld2_lanev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	202));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5178 */
rtx
gen_neon_vld2_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	202));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5178 */
rtx
gen_neon_vld2_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	202));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5178 */
rtx
gen_neon_vld2_lanev8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	202));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5206 */
rtx
gen_neon_vld2_dupv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	201));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5206 */
rtx
gen_neon_vld2_dupv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	201));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5206 */
rtx
gen_neon_vld2_dupv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	201));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5206 */
rtx
gen_neon_vld2_dupv4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	201));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5206 */
rtx
gen_neon_vld2_dupv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	201));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5206 */
rtx
gen_neon_vld2_dupv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	201));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5206 */
rtx
gen_neon_vld2_dupdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	201));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5224 */
rtx
gen_neon_vld2_dupv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	201));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5252 */
rtx
gen_neon_vst2v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5252 */
rtx
gen_neon_vst2v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5252 */
rtx
gen_neon_vst2v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5252 */
rtx
gen_neon_vst2v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5252 */
rtx
gen_neon_vst2v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5252 */
rtx
gen_neon_vst2v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5252 */
rtx
gen_neon_vst2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5270 */
rtx
gen_neon_vst2v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5270 */
rtx
gen_neon_vst2v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5270 */
rtx
gen_neon_vst2v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5270 */
rtx
gen_neon_vst2v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5270 */
rtx
gen_neon_vst2v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5270 */
rtx
gen_neon_vst2v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5282 */
rtx
gen_neon_vst2_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	318));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5282 */
rtx
gen_neon_vst2_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	318));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5282 */
rtx
gen_neon_vst2_lanev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	318));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5282 */
rtx
gen_neon_vst2_lanev4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	318));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5282 */
rtx
gen_neon_vst2_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	318));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5282 */
rtx
gen_neon_vst2_lanev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	318));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5306 */
rtx
gen_neon_vst2_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	318));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5306 */
rtx
gen_neon_vst2_lanev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	318));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5306 */
rtx
gen_neon_vst2_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	318));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5306 */
rtx
gen_neon_vst2_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	318));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5306 */
rtx
gen_neon_vst2_lanev8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	318));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5341 */
rtx
gen_neon_vld3v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	203));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5341 */
rtx
gen_neon_vld3v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	203));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5341 */
rtx
gen_neon_vld3v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	203));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5341 */
rtx
gen_neon_vld3v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	203));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5341 */
rtx
gen_neon_vld3v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	203));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5341 */
rtx
gen_neon_vld3v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	203));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5341 */
rtx
gen_neon_vld3di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	203));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5384 */
rtx
gen_neon_vld3qav16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (CImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	204));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5384 */
rtx
gen_neon_vld3qav8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (CImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	204));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5384 */
rtx
gen_neon_vld3qav8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (CImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	204));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5384 */
rtx
gen_neon_vld3qav8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (CImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	204));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5384 */
rtx
gen_neon_vld3qav4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (CImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	204));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5384 */
rtx
gen_neon_vld3qav4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (CImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	204));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5403 */
rtx
gen_neon_vld3qbv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (CImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	205));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5403 */
rtx
gen_neon_vld3qbv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (CImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	205));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5403 */
rtx
gen_neon_vld3qbv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (CImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	205));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5403 */
rtx
gen_neon_vld3qbv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (CImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	205));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5403 */
rtx
gen_neon_vld3qbv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (CImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	205));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5403 */
rtx
gen_neon_vld3qbv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (CImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	205));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5425 */
rtx
gen_neon_vld3_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	207));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5425 */
rtx
gen_neon_vld3_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	207));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5425 */
rtx
gen_neon_vld3_lanev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	207));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5425 */
rtx
gen_neon_vld3_lanev4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	207));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5425 */
rtx
gen_neon_vld3_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	207));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5425 */
rtx
gen_neon_vld3_lanev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	207));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5451 */
rtx
gen_neon_vld3_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (CImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	207));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5451 */
rtx
gen_neon_vld3_lanev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (CImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	207));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5451 */
rtx
gen_neon_vld3_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (CImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	207));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5451 */
rtx
gen_neon_vld3_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (CImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	207));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5451 */
rtx
gen_neon_vld3_lanev8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (CImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	207));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5481 */
rtx
gen_neon_vld3_dupv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	206));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5481 */
rtx
gen_neon_vld3_dupv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	206));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5481 */
rtx
gen_neon_vld3_dupv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	206));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5481 */
rtx
gen_neon_vld3_dupv4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	206));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5481 */
rtx
gen_neon_vld3_dupv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	206));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5481 */
rtx
gen_neon_vld3_dupv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	206));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5481 */
rtx
gen_neon_vld3_dupdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	206));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5507 */
rtx
gen_neon_vld3_dupv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (CImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	201));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5534 */
rtx
gen_neon_vst3v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	319));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5534 */
rtx
gen_neon_vst3v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	319));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5534 */
rtx
gen_neon_vst3v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	319));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5534 */
rtx
gen_neon_vst3v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	319));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5534 */
rtx
gen_neon_vst3v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	319));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5534 */
rtx
gen_neon_vst3v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	319));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5534 */
rtx
gen_neon_vst3di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	319));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5576 */
rtx
gen_neon_vst3qav16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	320));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5576 */
rtx
gen_neon_vst3qav8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	320));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5576 */
rtx
gen_neon_vst3qav8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	320));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5576 */
rtx
gen_neon_vst3qav8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	320));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5576 */
rtx
gen_neon_vst3qav4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	320));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5576 */
rtx
gen_neon_vst3qav4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	320));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5595 */
rtx
gen_neon_vst3qbv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	321));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5595 */
rtx
gen_neon_vst3qbv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	321));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5595 */
rtx
gen_neon_vst3qbv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	321));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5595 */
rtx
gen_neon_vst3qbv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	321));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5595 */
rtx
gen_neon_vst3qbv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	321));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5595 */
rtx
gen_neon_vst3qbv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	321));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5616 */
rtx
gen_neon_vst3_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	322));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5616 */
rtx
gen_neon_vst3_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	322));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5616 */
rtx
gen_neon_vst3_lanev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	322));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5616 */
rtx
gen_neon_vst3_lanev4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	322));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5616 */
rtx
gen_neon_vst3_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	322));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5616 */
rtx
gen_neon_vst3_lanev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	322));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5642 */
rtx
gen_neon_vst3_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	322));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5642 */
rtx
gen_neon_vst3_lanev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	322));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5642 */
rtx
gen_neon_vst3_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	322));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5642 */
rtx
gen_neon_vst3_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	322));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5642 */
rtx
gen_neon_vst3_lanev8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	322));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5679 */
rtx
gen_neon_vld4v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	208));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5679 */
rtx
gen_neon_vld4v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	208));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5679 */
rtx
gen_neon_vld4v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	208));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5679 */
rtx
gen_neon_vld4v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	208));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5679 */
rtx
gen_neon_vld4v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	208));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5679 */
rtx
gen_neon_vld4v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	208));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5679 */
rtx
gen_neon_vld4di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	208));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5712 */
rtx
gen_neon_vld4qav16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	209));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5712 */
rtx
gen_neon_vld4qav8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	209));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5712 */
rtx
gen_neon_vld4qav8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	209));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5712 */
rtx
gen_neon_vld4qav8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	209));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5712 */
rtx
gen_neon_vld4qav4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	209));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5712 */
rtx
gen_neon_vld4qav4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	209));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5732 */
rtx
gen_neon_vld4qbv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	210));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5732 */
rtx
gen_neon_vld4qbv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	210));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5732 */
rtx
gen_neon_vld4qbv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	210));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5732 */
rtx
gen_neon_vld4qbv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	210));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5732 */
rtx
gen_neon_vld4qbv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	210));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5732 */
rtx
gen_neon_vld4qbv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	210));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5755 */
rtx
gen_neon_vld4_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	212));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5755 */
rtx
gen_neon_vld4_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	212));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5755 */
rtx
gen_neon_vld4_lanev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	212));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5755 */
rtx
gen_neon_vld4_lanev4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	212));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5755 */
rtx
gen_neon_vld4_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	212));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5755 */
rtx
gen_neon_vld4_lanev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	212));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5782 */
rtx
gen_neon_vld4_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	212));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5782 */
rtx
gen_neon_vld4_lanev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	212));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5782 */
rtx
gen_neon_vld4_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	212));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5782 */
rtx
gen_neon_vld4_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	212));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5782 */
rtx
gen_neon_vld4_lanev8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	212));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5813 */
rtx
gen_neon_vld4_dupv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	211));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5813 */
rtx
gen_neon_vld4_dupv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	211));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5813 */
rtx
gen_neon_vld4_dupv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	211));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5813 */
rtx
gen_neon_vld4_dupv4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	211));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5813 */
rtx
gen_neon_vld4_dupv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	211));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5813 */
rtx
gen_neon_vld4_dupv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	211));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5813 */
rtx
gen_neon_vld4_dupdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	211));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5842 */
rtx
gen_neon_vld4_dupv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	201));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5870 */
rtx
gen_neon_vst4v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	323));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5870 */
rtx
gen_neon_vst4v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	323));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5870 */
rtx
gen_neon_vst4v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	323));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5870 */
rtx
gen_neon_vst4v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	323));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5870 */
rtx
gen_neon_vst4v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	323));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5870 */
rtx
gen_neon_vst4v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	323));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5870 */
rtx
gen_neon_vst4di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	323));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5903 */
rtx
gen_neon_vst4qav16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	324));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5903 */
rtx
gen_neon_vst4qav8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	324));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5903 */
rtx
gen_neon_vst4qav8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	324));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5903 */
rtx
gen_neon_vst4qav8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	324));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5903 */
rtx
gen_neon_vst4qav4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	324));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5903 */
rtx
gen_neon_vst4qav4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	324));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5923 */
rtx
gen_neon_vst4qbv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	325));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5923 */
rtx
gen_neon_vst4qbv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	325));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5923 */
rtx
gen_neon_vst4qbv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	325));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5923 */
rtx
gen_neon_vst4qbv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	325));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5923 */
rtx
gen_neon_vst4qbv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	325));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5923 */
rtx
gen_neon_vst4qbv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	325));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5945 */
rtx
gen_neon_vst4_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	326));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5945 */
rtx
gen_neon_vst4_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	326));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5945 */
rtx
gen_neon_vst4_lanev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	326));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5945 */
rtx
gen_neon_vst4_lanev4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	326));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5945 */
rtx
gen_neon_vst4_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	326));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5945 */
rtx
gen_neon_vst4_lanev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	326));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5972 */
rtx
gen_neon_vst4_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	326));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5972 */
rtx
gen_neon_vst4_lanev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	326));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5972 */
rtx
gen_neon_vst4_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	326));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5972 */
rtx
gen_neon_vst4_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	326));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5972 */
rtx
gen_neon_vst4_lanev8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	326));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6003 */
rtx
gen_neon_vec_unpacks_lo_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6003 */
rtx
gen_neon_vec_unpacku_lo_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6003 */
rtx
gen_neon_vec_unpacks_lo_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6003 */
rtx
gen_neon_vec_unpacku_lo_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6003 */
rtx
gen_neon_vec_unpacks_lo_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6003 */
rtx
gen_neon_vec_unpacku_lo_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6013 */
rtx
gen_neon_vec_unpacks_hi_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6013 */
rtx
gen_neon_vec_unpacku_hi_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6013 */
rtx
gen_neon_vec_unpacks_hi_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6013 */
rtx
gen_neon_vec_unpacku_hi_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6013 */
rtx
gen_neon_vec_unpacks_hi_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6013 */
rtx
gen_neon_vec_unpacku_hi_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6060 */
rtx
gen_neon_vec_smult_lo_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2)),
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand3,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6060 */
rtx
gen_neon_vec_umult_lo_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2)),
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand3,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6060 */
rtx
gen_neon_vec_smult_lo_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2)),
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand3,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6060 */
rtx
gen_neon_vec_umult_lo_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2)),
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand3,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6060 */
rtx
gen_neon_vec_smult_lo_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2)),
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand3,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6060 */
rtx
gen_neon_vec_umult_lo_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2)),
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand3,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6094 */
rtx
gen_neon_vec_smult_hi_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2)),
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand3,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6094 */
rtx
gen_neon_vec_umult_hi_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2)),
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand3,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6094 */
rtx
gen_neon_vec_smult_hi_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2)),
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand3,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6094 */
rtx
gen_neon_vec_umult_hi_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2)),
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand3,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6094 */
rtx
gen_neon_vec_smult_hi_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2)),
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand3,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6094 */
rtx
gen_neon_vec_umult_hi_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2)),
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand3,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6129 */
rtx
gen_neon_vec_sshiftl_v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_ASHIFT (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6129 */
rtx
gen_neon_vec_ushiftl_v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_ASHIFT (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6129 */
rtx
gen_neon_vec_sshiftl_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_ASHIFT (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6129 */
rtx
gen_neon_vec_ushiftl_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_ASHIFT (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6129 */
rtx
gen_neon_vec_sshiftl_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_ASHIFT (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6129 */
rtx
gen_neon_vec_ushiftl_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_ASHIFT (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6168 */
rtx
gen_neon_unpacks_v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6168 */
rtx
gen_neon_unpacku_v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6168 */
rtx
gen_neon_unpacks_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6168 */
rtx
gen_neon_unpacku_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6168 */
rtx
gen_neon_unpacks_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6168 */
rtx
gen_neon_unpacku_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6202 */
rtx
gen_neon_vec_smult_v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand1),
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6202 */
rtx
gen_neon_vec_umult_v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6202 */
rtx
gen_neon_vec_smult_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6202 */
rtx
gen_neon_vec_umult_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6202 */
rtx
gen_neon_vec_smult_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand1),
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6202 */
rtx
gen_neon_vec_umult_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6275 */
rtx
gen_vec_pack_trunc_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_TRUNCATE (V8QImode,
	operand1),
	gen_rtx_TRUNCATE (V8QImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6275 */
rtx
gen_vec_pack_trunc_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_TRUNCATE (V4HImode,
	operand1),
	gen_rtx_TRUNCATE (V4HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6275 */
rtx
gen_vec_pack_trunc_v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_TRUNCATE (V2SImode,
	operand1),
	gen_rtx_TRUNCATE (V2SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6289 */
rtx
gen_neon_vec_pack_trunc_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6289 */
rtx
gen_neon_vec_pack_trunc_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6289 */
rtx
gen_neon_vec_pack_trunc_v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6311 */
rtx
gen_neon_vabdv4hf_2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V4HFmode,
	gen_rtx_MINUS (V4HFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6311 */
rtx
gen_neon_vabdv8hf_2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V8HFmode,
	gen_rtx_MINUS (V8HFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6311 */
rtx
gen_neon_vabdv2sf_2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V2SFmode,
	gen_rtx_MINUS (V2SFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6311 */
rtx
gen_neon_vabdv4sf_2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V4SFmode,
	gen_rtx_MINUS (V4SFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6320 */
rtx
gen_neon_vabdv4hf_3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V4HFmode,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	328)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6320 */
rtx
gen_neon_vabdv8hf_3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V8HFmode,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	328)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6320 */
rtx
gen_neon_vabdv2sf_3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V2SFmode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	328)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6320 */
rtx
gen_neon_vabdv4sf_3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V4SFmode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	328)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6330 */
rtx
gen_neon_smmlav16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	381),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6330 */
rtx
gen_neon_ummlav16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	382),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6330 */
rtx
gen_neon_usmmlav16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	383),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6341 */
rtx
gen_neon_vbfdotv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	362)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6341 */
rtx
gen_neon_vbfdotv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	362)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6353 */
rtx
gen_neon_vbfdot_lanev4bfv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	362)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6353 */
rtx
gen_neon_vbfdot_lanev4bfv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	362)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6366 */
rtx
gen_neon_vbfdot_lanev8bfv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	362)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6366 */
rtx
gen_neon_vbfdot_lanev8bfv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	362)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6389 */
rtx
gen_neon_vbfcvtv4sfv4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		operand1),
	384));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6389 */
rtx
gen_neon_vbfcvtv4sfv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		operand1),
	384));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6398 */
rtx
gen_neon_vbfcvtv4sf_highv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	385));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6408 */
rtx
gen_neon_vbfcvtsf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BFmode,
	gen_rtvec (1,
		operand1),
	384));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6417 */
rtx
gen_neon_vbfcvtv4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	384));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6417 */
rtx
gen_neon_vbfcvtv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	384));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6426 */
rtx
gen_neon_vbfcvt_highv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	385));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6458 */
rtx
gen_neon_vbfcvtbf_cvtmodev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	384));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6458 */
rtx
gen_neon_vbfcvtbf_cvtmodesf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	384));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6466 */
rtx
gen_neon_vmmlav8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	386)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6477 */
rtx
gen_neon_vfmabv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	387)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6477 */
rtx
gen_neon_vfmatv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	388)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6488 */
rtx
gen_neon_vfmab_lanev8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	387)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6488 */
rtx
gen_neon_vfmat_lanev8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	388)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md:22 */
rtx
gen_crypto_aesmc (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	132));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md:22 */
rtx
gen_crypto_aesimc (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	131));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md:71 */
rtx
gen_aes_op_protect (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	133));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md:106 */
rtx
gen_aes_op_protect_neon_vld1v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	198)),
	133));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md:207 */
rtx
gen_crypto_sha1su1 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	139));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md:207 */
rtx
gen_crypto_sha256su0 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	142));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md:218 */
rtx
gen_crypto_sha1su0 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	138));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md:218 */
rtx
gen_crypto_sha256h (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	140));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md:218 */
rtx
gen_crypto_sha256h2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	141));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md:218 */
rtx
gen_crypto_sha256su1 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	143));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md:245 */
rtx
gen_crypto_sha1h_lb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))),
	137));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md:257 */
rtx
gen_crypto_vmullp64 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		operand2),
	144));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md:286 */
rtx
gen_crypto_sha1c_lb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4))),
		operand3),
	134));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md:286 */
rtx
gen_crypto_sha1m_lb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4))),
		operand3),
	135));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md:286 */
rtx
gen_crypto_sha1p_lb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4))),
		operand3),
	136));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:65 */
rtx
gen_atomic_loadqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	25));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:65 */
rtx
gen_atomic_loadhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	25));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:65 */
rtx
gen_atomic_loadsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	25));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:91 */
rtx
gen_atomic_storeqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	26));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:91 */
rtx
gen_atomic_storehi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	26));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:91 */
rtx
gen_atomic_storesi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	26));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:119 */
rtx
gen_arm_atomic_loaddi2_ldrd (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (1,
		operand1),
	21));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:189 */
rtx
gen_atomic_compare_and_swap32qi_1 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED,
	rtx operand7 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (CC_Zmode,
	gen_rtvec (1,
		const0_rtx),
	17)),
		gen_rtx_SET (operand1,
	gen_rtx_ZERO_EXTEND (SImode,
	operand2)),
		gen_rtx_SET (copy_rtx (operand2),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (5,
		operand3,
		operand4,
		operand5,
		operand6,
		operand7),
	17)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:189 */
rtx
gen_atomic_compare_and_swap32hi_1 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED,
	rtx operand7 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (CC_Zmode,
	gen_rtvec (1,
		const0_rtx),
	17)),
		gen_rtx_SET (operand1,
	gen_rtx_ZERO_EXTEND (SImode,
	operand2)),
		gen_rtx_SET (copy_rtx (operand2),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (5,
		operand3,
		operand4,
		operand5,
		operand6,
		operand7),
	17)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:189 */
rtx
gen_atomic_compare_and_swapt1qi_1 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED,
	rtx operand7 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		const0_rtx),
	17)),
		gen_rtx_SET (operand1,
	gen_rtx_ZERO_EXTEND (SImode,
	operand2)),
		gen_rtx_SET (copy_rtx (operand2),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (5,
		operand3,
		operand4,
		operand5,
		operand6,
		operand7),
	17)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:189 */
rtx
gen_atomic_compare_and_swapt1hi_1 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED,
	rtx operand7 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		const0_rtx),
	17)),
		gen_rtx_SET (operand1,
	gen_rtx_ZERO_EXTEND (SImode,
	operand2)),
		gen_rtx_SET (copy_rtx (operand2),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (5,
		operand3,
		operand4,
		operand5,
		operand6,
		operand7),
	17)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:221 */
rtx
gen_atomic_compare_and_swap32si_1 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED,
	rtx operand7 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (CC_Zmode,
	gen_rtvec (1,
		const0_rtx),
	17)),
		gen_rtx_SET (operand1,
	operand2),
		gen_rtx_SET (copy_rtx (operand2),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (5,
		operand3,
		operand4,
		operand5,
		operand6,
		operand7),
	17)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:221 */
rtx
gen_atomic_compare_and_swap32di_1 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED,
	rtx operand7 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (CC_Zmode,
	gen_rtvec (1,
		const0_rtx),
	17)),
		gen_rtx_SET (operand1,
	operand2),
		gen_rtx_SET (copy_rtx (operand2),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (5,
		operand3,
		operand4,
		operand5,
		operand6,
		operand7),
	17)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:221 */
rtx
gen_atomic_compare_and_swapt1si_1 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED,
	rtx operand7 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		const0_rtx),
	17)),
		gen_rtx_SET (operand1,
	operand2),
		gen_rtx_SET (copy_rtx (operand2),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (5,
		operand3,
		operand4,
		operand5,
		operand6,
		operand7),
	17)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:221 */
rtx
gen_atomic_compare_and_swapt1di_1 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED,
	rtx operand7 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		const0_rtx),
	17)),
		gen_rtx_SET (operand1,
	operand2),
		gen_rtx_SET (copy_rtx (operand2),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (5,
		operand3,
		operand4,
		operand5,
		operand6,
		operand7),
	17)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:245 */
rtx
gen_atomic_exchangeqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	18)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:245 */
rtx
gen_atomic_exchangehi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	18)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:245 */
rtx
gen_atomic_exchangesi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	18)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:245 */
rtx
gen_atomic_exchangedi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	18)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
rtx
gen_atomic_addqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_PLUS (QImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
rtx
gen_atomic_subqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_MINUS (QImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
rtx
gen_atomic_orqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_IOR (QImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
rtx
gen_atomic_xorqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_XOR (QImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
rtx
gen_atomic_andqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_AND (QImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
rtx
gen_atomic_addhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_PLUS (HImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
rtx
gen_atomic_subhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_MINUS (HImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
rtx
gen_atomic_orhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_IOR (HImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
rtx
gen_atomic_xorhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_XOR (HImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
rtx
gen_atomic_andhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_AND (HImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
rtx
gen_atomic_addsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_PLUS (SImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
rtx
gen_atomic_subsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_MINUS (SImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
rtx
gen_atomic_orsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_IOR (SImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
rtx
gen_atomic_xorsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_XOR (SImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
rtx
gen_atomic_andsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_AND (SImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
rtx
gen_atomic_adddi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_PLUS (DImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
rtx
gen_atomic_subdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_MINUS (DImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
rtx
gen_atomic_ordi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_IOR (DImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
rtx
gen_atomic_xordi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_XOR (DImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
rtx
gen_atomic_anddi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_AND (DImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:309 */
rtx
gen_atomic_nandqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_NOT (QImode,
	gen_rtx_AND (QImode,
	copy_rtx (operand0),
	operand1)),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:309 */
rtx
gen_atomic_nandhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_NOT (HImode,
	gen_rtx_AND (HImode,
	copy_rtx (operand0),
	operand1)),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:309 */
rtx
gen_atomic_nandsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_NOT (SImode,
	gen_rtx_AND (SImode,
	copy_rtx (operand0),
	operand1)),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:309 */
rtx
gen_atomic_nanddi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_NOT (DImode,
	gen_rtx_AND (DImode,
	copy_rtx (operand0),
	operand1)),
		operand2),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
rtx
gen_atomic_fetch_addqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_PLUS (QImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
rtx
gen_atomic_fetch_subqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_MINUS (QImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
rtx
gen_atomic_fetch_orqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_IOR (QImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
rtx
gen_atomic_fetch_xorqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_XOR (QImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
rtx
gen_atomic_fetch_andqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_AND (QImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
rtx
gen_atomic_fetch_addhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_PLUS (HImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
rtx
gen_atomic_fetch_subhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_MINUS (HImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
rtx
gen_atomic_fetch_orhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_IOR (HImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
rtx
gen_atomic_fetch_xorhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_XOR (HImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
rtx
gen_atomic_fetch_andhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_AND (HImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
rtx
gen_atomic_fetch_addsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
rtx
gen_atomic_fetch_subsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_MINUS (SImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
rtx
gen_atomic_fetch_orsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_IOR (SImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
rtx
gen_atomic_fetch_xorsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_XOR (SImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
rtx
gen_atomic_fetch_andsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_AND (SImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
rtx
gen_atomic_fetch_adddi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_PLUS (DImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
rtx
gen_atomic_fetch_subdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_MINUS (DImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
rtx
gen_atomic_fetch_ordi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_IOR (DImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
rtx
gen_atomic_fetch_xordi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_XOR (DImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
rtx
gen_atomic_fetch_anddi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_AND (DImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:373 */
rtx
gen_atomic_fetch_nandqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_NOT (QImode,
	gen_rtx_AND (QImode,
	copy_rtx (operand1),
	operand2)),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:373 */
rtx
gen_atomic_fetch_nandhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_NOT (HImode,
	gen_rtx_AND (HImode,
	copy_rtx (operand1),
	operand2)),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:373 */
rtx
gen_atomic_fetch_nandsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_NOT (SImode,
	gen_rtx_AND (SImode,
	copy_rtx (operand1),
	operand2)),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:373 */
rtx
gen_atomic_fetch_nanddi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_NOT (DImode,
	gen_rtx_AND (DImode,
	copy_rtx (operand1),
	operand2)),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
rtx
gen_atomic_add_fetchqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (QImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
rtx
gen_atomic_sub_fetchqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (QImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
rtx
gen_atomic_or_fetchqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_IOR (QImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
rtx
gen_atomic_xor_fetchqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_XOR (QImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
rtx
gen_atomic_and_fetchqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_AND (QImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
rtx
gen_atomic_add_fetchhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (HImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
rtx
gen_atomic_sub_fetchhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (HImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
rtx
gen_atomic_or_fetchhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_IOR (HImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
rtx
gen_atomic_xor_fetchhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_XOR (HImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
rtx
gen_atomic_and_fetchhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_AND (HImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
rtx
gen_atomic_add_fetchsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
rtx
gen_atomic_sub_fetchsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
rtx
gen_atomic_or_fetchsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_IOR (SImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
rtx
gen_atomic_xor_fetchsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_XOR (SImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
rtx
gen_atomic_and_fetchsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_AND (SImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
rtx
gen_atomic_add_fetchdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
rtx
gen_atomic_sub_fetchdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
rtx
gen_atomic_or_fetchdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_IOR (DImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
rtx
gen_atomic_xor_fetchdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_XOR (DImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
rtx
gen_atomic_and_fetchdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_AND (DImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:424 */
rtx
gen_atomic_nand_fetchqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_NOT (QImode,
	gen_rtx_AND (QImode,
	operand1,
	operand2))),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:424 */
rtx
gen_atomic_nand_fetchhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_NOT (HImode,
	gen_rtx_AND (HImode,
	operand1,
	operand2))),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:424 */
rtx
gen_atomic_nand_fetchsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_NOT (SImode,
	gen_rtx_AND (SImode,
	operand1,
	operand2))),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:424 */
rtx
gen_atomic_nand_fetchdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_NOT (DImode,
	gen_rtx_AND (DImode,
	operand1,
	operand2))),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	19)),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:448 */
rtx
gen_arm_load_exclusiveqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (1,
		operand1),
	20)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:448 */
rtx
gen_arm_load_exclusivehi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (1,
		operand1),
	20)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:461 */
rtx
gen_arm_load_acquire_exclusiveqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (1,
		operand1),
	23)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:461 */
rtx
gen_arm_load_acquire_exclusivehi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (1,
		operand1),
	23)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:474 */
rtx
gen_arm_load_exclusivesi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		operand1),
	20));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:486 */
rtx
gen_arm_load_acquire_exclusivesi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		operand1),
	23));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:498 */
rtx
gen_arm_load_exclusivedi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (1,
		operand1),
	20));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:507 */
rtx
gen_arm_load_acquire_exclusivedi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (1,
		operand1),
	23));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:516 */
rtx
gen_arm_store_exclusiveqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		const0_rtx),
	22)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (1,
		operand2),
	22))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:516 */
rtx
gen_arm_store_exclusivehi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		const0_rtx),
	22)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (1,
		operand2),
	22))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:516 */
rtx
gen_arm_store_exclusivesi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		const0_rtx),
	22)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		operand2),
	22))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:516 */
rtx
gen_arm_store_exclusivedi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		const0_rtx),
	22)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (1,
		operand2),
	22))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:542 */
rtx
gen_arm_store_release_exclusivedi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		const0_rtx),
	24)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (1,
		operand2),
	24))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:557 */
rtx
gen_arm_store_release_exclusiveqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		const0_rtx),
	24)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (1,
		operand2),
	24))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:557 */
rtx
gen_arm_store_release_exclusivehi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		const0_rtx),
	24)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (1,
		operand2),
	24))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:557 */
rtx
gen_arm_store_release_exclusivesi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		const0_rtx),
	24)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		operand2),
	24))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:21 */
rtx
gen_addqq3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (QQmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:21 */
rtx
gen_addhq3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (HQmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:21 */
rtx
gen_addsq3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (SQmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:21 */
rtx
gen_adduqq3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (UQQmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:21 */
rtx
gen_adduhq3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (UHQmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:21 */
rtx
gen_addusq3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (USQmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:21 */
rtx
gen_addha3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (HAmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:21 */
rtx
gen_addsa3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (SAmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:21 */
rtx
gen_adduha3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (UHAmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:21 */
rtx
gen_addusa3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (USAmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:51 */
rtx
gen_usaddv4uqq3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (V4UQQmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:51 */
rtx
gen_usaddv2uhq3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (V2UHQmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:51 */
rtx
gen_usadduqq3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (UQQmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:51 */
rtx
gen_usadduhq3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (UHQmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:51 */
rtx
gen_usaddv2uha3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (V2UHAmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:51 */
rtx
gen_usadduha3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (UHAmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:80 */
rtx
gen_subqq3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (QQmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:80 */
rtx
gen_subhq3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (HQmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:80 */
rtx
gen_subsq3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (SQmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:80 */
rtx
gen_subuqq3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (UQQmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:80 */
rtx
gen_subuhq3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (UHQmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:80 */
rtx
gen_subusq3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (USQmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:80 */
rtx
gen_subha3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (HAmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:80 */
rtx
gen_subsa3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (SAmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:80 */
rtx
gen_subuha3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (UHAmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:80 */
rtx
gen_subusa3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (USAmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:110 */
rtx
gen_ussubv4uqq3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (V4UQQmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:110 */
rtx
gen_ussubv2uhq3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (V2UHQmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:110 */
rtx
gen_ussubuqq3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (UQQmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:110 */
rtx
gen_ussubuhq3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (UHQmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:110 */
rtx
gen_ussubv2uha3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (V2UHAmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:110 */
rtx
gen_ussubuha3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (UHAmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:476 */
rtx
gen_arm_ssatsihi_shift (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_TRUNCATE (HImode,
	gen_rtx_fmt_ee (GET_CODE (operand1), SImode,
		operand2,
		operand3)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:487 */
rtx
gen_arm_usatsihi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_TRUNCATE (HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:101 */
rtx
gen_mve_vst4qv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	389));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:101 */
rtx
gen_mve_vst4qv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	389));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:101 */
rtx
gen_mve_vst4qv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	389));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:101 */
rtx
gen_mve_vst4qv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	389));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:101 */
rtx
gen_mve_vst4qv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	389));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:135 */
rtx
gen_mve_vrndq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	750));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:135 */
rtx
gen_mve_vrndq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	750));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:151 */
rtx
gen_mve_vrndxq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	390));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:151 */
rtx
gen_mve_vrndxq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	390));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:165 */
rtx
gen_mve_vrndq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	391));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:165 */
rtx
gen_mve_vrndq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	391));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:179 */
rtx
gen_mve_vrndpq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	392));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:179 */
rtx
gen_mve_vrndpq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	392));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:193 */
rtx
gen_mve_vrndnq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	393));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:193 */
rtx
gen_mve_vrndnq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	393));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:207 */
rtx
gen_mve_vrndmq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	394));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:207 */
rtx
gen_mve_vrndmq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	394));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:221 */
rtx
gen_mve_vrndaq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	395));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:221 */
rtx
gen_mve_vrndaq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	395));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:235 */
rtx
gen_mve_vrev64q_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	396));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:235 */
rtx
gen_mve_vrev64q_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	396));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:249 */
rtx
gen_mve_vnegq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:249 */
rtx
gen_mve_vnegq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:262 */
rtx
gen_mve_vdupq_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	397));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:262 */
rtx
gen_mve_vdupq_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	397));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:276 */
rtx
gen_mve_vabsq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V8HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:276 */
rtx
gen_mve_vabsq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V4SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:289 */
rtx
gen_mve_vrev32q_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	398));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:302 */
rtx
gen_mve_vcvttq_f32_f16v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	399));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:316 */
rtx
gen_mve_vcvtbq_f32_f16v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	400));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:330 */
rtx
gen_mve_vcvtq_to_f_sv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	401));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:330 */
rtx
gen_mve_vcvtq_to_f_uv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	403));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:330 */
rtx
gen_mve_vcvtq_to_f_sv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	401));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:330 */
rtx
gen_mve_vcvtq_to_f_uv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	403));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:344 */
rtx
gen_mve_vrev64q_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	411));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:344 */
rtx
gen_mve_vrev64q_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	412));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:344 */
rtx
gen_mve_vrev64q_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	411));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:344 */
rtx
gen_mve_vrev64q_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	412));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:344 */
rtx
gen_mve_vrev64q_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	411));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:344 */
rtx
gen_mve_vrev64q_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	412));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:358 */
rtx
gen_mve_vcvtq_from_f_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	425));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:358 */
rtx
gen_mve_vcvtq_from_f_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	426));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:358 */
rtx
gen_mve_vcvtq_from_f_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	425));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:358 */
rtx
gen_mve_vcvtq_from_f_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	426));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:370 */
rtx
gen_mve_vqnegq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	402));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:370 */
rtx
gen_mve_vqnegq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	402));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:370 */
rtx
gen_mve_vqnegq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	402));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:384 */
rtx
gen_mve_vqabsq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	413));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:384 */
rtx
gen_mve_vqabsq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	413));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:384 */
rtx
gen_mve_vqabsq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	413));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:398 */
rtx
gen_mve_vnegq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:398 */
rtx
gen_mve_vnegq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:398 */
rtx
gen_mve_vnegq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:411 */
rtx
gen_mve_vmvnq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:411 */
rtx
gen_mve_vmvnq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:411 */
rtx
gen_mve_vmvnq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:431 */
rtx
gen_mve_vdupq_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	414));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:431 */
rtx
gen_mve_vdupq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	415));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:431 */
rtx
gen_mve_vdupq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	414));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:431 */
rtx
gen_mve_vdupq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	415));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:431 */
rtx
gen_mve_vdupq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	414));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:431 */
rtx
gen_mve_vdupq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	415));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:445 */
rtx
gen_mve_vclzq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:445 */
rtx
gen_mve_vclzq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:445 */
rtx
gen_mve_vclzq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:465 */
rtx
gen_mve_vclsq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	416));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:465 */
rtx
gen_mve_vclsq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	416));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:465 */
rtx
gen_mve_vclsq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	416));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:479 */
rtx
gen_mve_vaddvq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	418));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:479 */
rtx
gen_mve_vaddvq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	417));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:479 */
rtx
gen_mve_vaddvq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	418));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:479 */
rtx
gen_mve_vaddvq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	417));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:479 */
rtx
gen_mve_vaddvq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	418));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:479 */
rtx
gen_mve_vaddvq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	417));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:493 */
rtx
gen_mve_vabsq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:493 */
rtx
gen_mve_vabsq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:493 */
rtx
gen_mve_vabsq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:506 */
rtx
gen_mve_vrev32q_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	419));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:506 */
rtx
gen_mve_vrev32q_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	420));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:506 */
rtx
gen_mve_vrev32q_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	419));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:506 */
rtx
gen_mve_vrev32q_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	420));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:520 */
rtx
gen_mve_vmovltq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	421));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:520 */
rtx
gen_mve_vmovltq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	422));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:520 */
rtx
gen_mve_vmovltq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	421));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:520 */
rtx
gen_mve_vmovltq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	422));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:534 */
rtx
gen_mve_vmovlbq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	423));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:534 */
rtx
gen_mve_vmovlbq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	424));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:534 */
rtx
gen_mve_vmovlbq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	423));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:534 */
rtx
gen_mve_vmovlbq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	424));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:548 */
rtx
gen_mve_vcvtpq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	427));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:548 */
rtx
gen_mve_vcvtpq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	428));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:548 */
rtx
gen_mve_vcvtpq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	427));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:548 */
rtx
gen_mve_vcvtpq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	428));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:562 */
rtx
gen_mve_vcvtnq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	429));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:562 */
rtx
gen_mve_vcvtnq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	430));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:562 */
rtx
gen_mve_vcvtnq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	429));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:562 */
rtx
gen_mve_vcvtnq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	430));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:576 */
rtx
gen_mve_vcvtmq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	431));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:576 */
rtx
gen_mve_vcvtmq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	432));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:576 */
rtx
gen_mve_vcvtmq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	431));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:576 */
rtx
gen_mve_vcvtmq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	432));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:590 */
rtx
gen_mve_vcvtaq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	410));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:590 */
rtx
gen_mve_vcvtaq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	409));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:590 */
rtx
gen_mve_vcvtaq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	410));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:590 */
rtx
gen_mve_vcvtaq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	409));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:604 */
rtx
gen_mve_vmvnq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	408));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:604 */
rtx
gen_mve_vmvnq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	407));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:604 */
rtx
gen_mve_vmvnq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	408));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:604 */
rtx
gen_mve_vmvnq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	407));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:618 */
rtx
gen_mve_vrev16q_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	405));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:618 */
rtx
gen_mve_vrev16q_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	404));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:632 */
rtx
gen_mve_vaddlvq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	433));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:632 */
rtx
gen_mve_vaddlvq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	406));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:646 */
rtx
gen_mve_vctp8qv16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (1,
		operand1),
	434));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:646 */
rtx
gen_mve_vctp16qv8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (1,
		operand1),
	434));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:646 */
rtx
gen_mve_vctp32qv4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (1,
		operand1),
	434));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:646 */
rtx
gen_mve_vctp64qv2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2QImode,
	gen_rtvec (1,
		operand1),
	434));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:660 */
rtx
gen_mve_vpnotv16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (1,
		operand1),
	436));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:674 */
rtx
gen_mve_vsubq_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	441));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:674 */
rtx
gen_mve_vsubq_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	441));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:689 */
rtx
gen_mve_vbrsrq_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	440));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:689 */
rtx
gen_mve_vbrsrq_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	440));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:704 */
rtx
gen_mve_vcvtq_n_to_f_sv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	438));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:704 */
rtx
gen_mve_vcvtq_n_to_f_uv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	439));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:704 */
rtx
gen_mve_vcvtq_n_to_f_sv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	438));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:704 */
rtx
gen_mve_vcvtq_n_to_f_uv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	439));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:718 */
rtx
gen_mve_vcreateq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	437));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:718 */
rtx
gen_mve_vcreateq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	437));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:733 */
rtx
gen_mve_vcreateq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	442));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:733 */
rtx
gen_mve_vcreateq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	443));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:733 */
rtx
gen_mve_vcreateq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	442));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:733 */
rtx
gen_mve_vcreateq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	443));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:733 */
rtx
gen_mve_vcreateq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	442));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:733 */
rtx
gen_mve_vcreateq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	443));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:733 */
rtx
gen_mve_vcreateq_uv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	442));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:733 */
rtx
gen_mve_vcreateq_sv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	443));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:749 */
rtx
gen_mve_vshrq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	444));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:749 */
rtx
gen_mve_vshrq_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	445));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:749 */
rtx
gen_mve_vshrq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	444));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:749 */
rtx
gen_mve_vshrq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	445));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:749 */
rtx
gen_mve_vshrq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	444));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:749 */
rtx
gen_mve_vshrq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	445));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:763 */
rtx
gen_mve_vshrq_n_sv16qi_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:763 */
rtx
gen_mve_vshrq_n_sv8hi_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:763 */
rtx
gen_mve_vshrq_n_sv4si_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:778 */
rtx
gen_mve_vshrq_n_uv16qi_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:778 */
rtx
gen_mve_vshrq_n_uv8hi_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:778 */
rtx
gen_mve_vshrq_n_uv4si_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:797 */
rtx
gen_mve_vcvtq_n_from_f_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	446));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:797 */
rtx
gen_mve_vcvtq_n_from_f_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	447));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:797 */
rtx
gen_mve_vcvtq_n_from_f_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	446));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:797 */
rtx
gen_mve_vcvtq_n_from_f_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	447));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:812 */
rtx
gen_mve_vaddlvq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	448));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:812 */
rtx
gen_mve_vaddlvq_p_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	449));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmpeqq_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_EQ (V16BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmpgeq_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GE (V16BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmpcsq_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GEU (V16BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmpgtq_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GT (V16BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmphiq_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GTU (V16BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmpleq_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LE (V16BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmpltq_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LT (V16BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmpneq_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NE (V16BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmpeqq_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_EQ (V8BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmpgeq_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GE (V8BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmpcsq_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GEU (V8BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmpgtq_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GT (V8BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmphiq_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GTU (V8BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmpleq_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LE (V8BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmpltq_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LT (V8BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmpneq_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NE (V8BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmpeqq_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_EQ (V4BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmpgeq_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GE (V4BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmpcsq_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GEU (V4BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmpgtq_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GT (V4BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmphiq_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GTU (V4BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmpleq_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LE (V4BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmpltq_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LT (V4BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:827 */
rtx
gen_mve_vcmpneq_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NE (V4BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmpeqq_n_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_EQ (V16BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V16QImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmpgeq_n_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GE (V16BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V16QImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmpcsq_n_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GEU (V16BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V16QImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmpgtq_n_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GT (V16BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V16QImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmphiq_n_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GTU (V16BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V16QImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmpleq_n_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LE (V16BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V16QImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmpltq_n_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LT (V16BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V16QImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmpneq_n_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NE (V16BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V16QImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmpeqq_n_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_EQ (V8BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmpgeq_n_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GE (V8BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmpcsq_n_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GEU (V8BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmpgtq_n_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GT (V8BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmphiq_n_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GTU (V8BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmpleq_n_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LE (V8BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmpltq_n_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LT (V8BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmpneq_n_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NE (V8BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmpeqq_n_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_EQ (V4BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmpgeq_n_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GE (V4BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmpcsq_n_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GEU (V4BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmpgtq_n_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GT (V4BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmphiq_n_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GTU (V4BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmpleq_n_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LE (V4BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmpltq_n_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LT (V4BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:841 */
rtx
gen_mve_vcmpneq_n_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NE (V4BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:860 */
rtx
gen_mve_vabdq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	452));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:860 */
rtx
gen_mve_vabdq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	489));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:860 */
rtx
gen_mve_vabdq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	452));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:860 */
rtx
gen_mve_vabdq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	489));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:860 */
rtx
gen_mve_vabdq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	452));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:860 */
rtx
gen_mve_vabdq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	489));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:875 */
rtx
gen_mve_vaddq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	453));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:875 */
rtx
gen_mve_vaddq_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	490));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:875 */
rtx
gen_mve_vaddq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	453));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:875 */
rtx
gen_mve_vaddq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	490));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:875 */
rtx
gen_mve_vaddq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	453));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:875 */
rtx
gen_mve_vaddq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	490));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:890 */
rtx
gen_mve_vaddvaq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	454));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:890 */
rtx
gen_mve_vaddvaq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	491));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:890 */
rtx
gen_mve_vaddvaq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	454));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:890 */
rtx
gen_mve_vaddvaq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	491));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:890 */
rtx
gen_mve_vaddvaq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	454));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:890 */
rtx
gen_mve_vaddvaq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	491));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:905 */
rtx
gen_mve_vaddvq_p_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	492));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:905 */
rtx
gen_mve_vaddvq_p_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	455));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:905 */
rtx
gen_mve_vaddvq_p_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	492));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:905 */
rtx
gen_mve_vaddvq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	455));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:905 */
rtx
gen_mve_vaddvq_p_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	492));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:905 */
rtx
gen_mve_vaddvq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	455));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:924 */
rtx
gen_mve_vandq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:924 */
rtx
gen_mve_vandq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:924 */
rtx
gen_mve_vandq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:948 */
rtx
gen_mve_vbicq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V16QImode,
	gen_rtx_NOT (V16QImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:948 */
rtx
gen_mve_vbicq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V8HImode,
	gen_rtx_NOT (V8HImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:948 */
rtx
gen_mve_vbicq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V4SImode,
	gen_rtx_NOT (V4SImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:971 */
rtx
gen_mve_vbrsrq_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	493));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:971 */
rtx
gen_mve_vbrsrq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	456));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:971 */
rtx
gen_mve_vbrsrq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	493));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:971 */
rtx
gen_mve_vbrsrq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	456));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:971 */
rtx
gen_mve_vbrsrq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	493));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:971 */
rtx
gen_mve_vbrsrq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	456));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:986 */
rtx
gen_mve_vcaddq_rot90v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	368));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:986 */
rtx
gen_mve_vcaddq_rot270v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	369));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:986 */
rtx
gen_mve_vcaddq_rot90v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	368));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:986 */
rtx
gen_mve_vcaddq_rot270v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	369));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:986 */
rtx
gen_mve_vcaddq_rot90v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	368));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:986 */
rtx
gen_mve_vcaddq_rot270v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	369));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1010 */
rtx
gen_mve_veorq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1010 */
rtx
gen_mve_veorq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1010 */
rtx
gen_mve_veorq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1032 */
rtx
gen_mve_vhaddq_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	495));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1032 */
rtx
gen_mve_vhaddq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	458));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1032 */
rtx
gen_mve_vhaddq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	495));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1032 */
rtx
gen_mve_vhaddq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	458));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1032 */
rtx
gen_mve_vhaddq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	495));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1032 */
rtx
gen_mve_vhaddq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	458));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1047 */
rtx
gen_mve_vhaddq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	457));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1047 */
rtx
gen_mve_vhaddq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	494));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1047 */
rtx
gen_mve_vhaddq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	457));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1047 */
rtx
gen_mve_vhaddq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	494));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1047 */
rtx
gen_mve_vhaddq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	457));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1047 */
rtx
gen_mve_vhaddq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	494));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1062 */
rtx
gen_mve_vhcaddq_rot270_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	526));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1062 */
rtx
gen_mve_vhcaddq_rot270_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	526));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1062 */
rtx
gen_mve_vhcaddq_rot270_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	526));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1077 */
rtx
gen_mve_vhcaddq_rot90_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	527));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1077 */
rtx
gen_mve_vhcaddq_rot90_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	527));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1077 */
rtx
gen_mve_vhcaddq_rot90_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	527));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1092 */
rtx
gen_mve_vhsubq_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	497));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1092 */
rtx
gen_mve_vhsubq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	460));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1092 */
rtx
gen_mve_vhsubq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	497));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1092 */
rtx
gen_mve_vhsubq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	460));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1092 */
rtx
gen_mve_vhsubq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	497));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1092 */
rtx
gen_mve_vhsubq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	460));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1107 */
rtx
gen_mve_vhsubq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	459));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1107 */
rtx
gen_mve_vhsubq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	496));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1107 */
rtx
gen_mve_vhsubq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	459));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1107 */
rtx
gen_mve_vhsubq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	496));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1107 */
rtx
gen_mve_vhsubq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	459));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1107 */
rtx
gen_mve_vhsubq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	496));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1122 */
rtx
gen_mve_vmaxaq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	528));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1122 */
rtx
gen_mve_vmaxaq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	528));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1122 */
rtx
gen_mve_vmaxaq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	528));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1137 */
rtx
gen_mve_vmaxavq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	529));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1137 */
rtx
gen_mve_vmaxavq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	529));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1137 */
rtx
gen_mve_vmaxavq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	529));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1152 */
rtx
gen_mve_vmaxq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1152 */
rtx
gen_mve_vmaxq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1152 */
rtx
gen_mve_vmaxq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1163 */
rtx
gen_mve_vmaxq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMAX (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1163 */
rtx
gen_mve_vmaxq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMAX (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1163 */
rtx
gen_mve_vmaxq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMAX (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1177 */
rtx
gen_mve_vmaxvq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	499));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1177 */
rtx
gen_mve_vmaxvq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	462));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1177 */
rtx
gen_mve_vmaxvq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	499));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1177 */
rtx
gen_mve_vmaxvq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	462));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1177 */
rtx
gen_mve_vmaxvq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	499));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1177 */
rtx
gen_mve_vmaxvq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	462));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1192 */
rtx
gen_mve_vminaq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	530));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1192 */
rtx
gen_mve_vminaq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	530));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1192 */
rtx
gen_mve_vminaq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	530));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1207 */
rtx
gen_mve_vminavq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	531));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1207 */
rtx
gen_mve_vminavq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	531));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1207 */
rtx
gen_mve_vminavq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	531));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1222 */
rtx
gen_mve_vminq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1222 */
rtx
gen_mve_vminq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1222 */
rtx
gen_mve_vminq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1233 */
rtx
gen_mve_vminq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMIN (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1233 */
rtx
gen_mve_vminq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMIN (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1233 */
rtx
gen_mve_vminq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMIN (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1247 */
rtx
gen_mve_vminvq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	501));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1247 */
rtx
gen_mve_vminvq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	464));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1247 */
rtx
gen_mve_vminvq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	501));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1247 */
rtx
gen_mve_vminvq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	464));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1247 */
rtx
gen_mve_vminvq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	501));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1247 */
rtx
gen_mve_vminvq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	464));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1262 */
rtx
gen_mve_vmladavq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	502));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1262 */
rtx
gen_mve_vmladavq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	465));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1262 */
rtx
gen_mve_vmladavq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	502));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1262 */
rtx
gen_mve_vmladavq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	465));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1262 */
rtx
gen_mve_vmladavq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	502));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1262 */
rtx
gen_mve_vmladavq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	465));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1277 */
rtx
gen_mve_vmladavxq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	532));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1277 */
rtx
gen_mve_vmladavxq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	532));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1277 */
rtx
gen_mve_vmladavxq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	532));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1292 */
rtx
gen_mve_vmlsdavq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	533));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1292 */
rtx
gen_mve_vmlsdavq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	533));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1292 */
rtx
gen_mve_vmlsdavq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	533));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1307 */
rtx
gen_mve_vmlsdavxq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	534));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1307 */
rtx
gen_mve_vmlsdavxq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	534));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1307 */
rtx
gen_mve_vmlsdavxq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	534));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1322 */
rtx
gen_mve_vmulhq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	466));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1322 */
rtx
gen_mve_vmulhq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	503));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1322 */
rtx
gen_mve_vmulhq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	466));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1322 */
rtx
gen_mve_vmulhq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	503));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1322 */
rtx
gen_mve_vmulhq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	466));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1322 */
rtx
gen_mve_vmulhq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	503));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1337 */
rtx
gen_mve_vmullbq_int_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	504));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1337 */
rtx
gen_mve_vmullbq_int_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	467));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1337 */
rtx
gen_mve_vmullbq_int_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	504));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1337 */
rtx
gen_mve_vmullbq_int_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	467));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1337 */
rtx
gen_mve_vmullbq_int_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	504));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1337 */
rtx
gen_mve_vmullbq_int_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	467));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1352 */
rtx
gen_mve_vmulltq_int_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	505));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1352 */
rtx
gen_mve_vmulltq_int_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	468));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1352 */
rtx
gen_mve_vmulltq_int_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	505));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1352 */
rtx
gen_mve_vmulltq_int_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	468));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1352 */
rtx
gen_mve_vmulltq_int_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	505));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1352 */
rtx
gen_mve_vmulltq_int_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	468));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1367 */
rtx
gen_mve_vmulq_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	507));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1367 */
rtx
gen_mve_vmulq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	470));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1367 */
rtx
gen_mve_vmulq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	507));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1367 */
rtx
gen_mve_vmulq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	470));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1367 */
rtx
gen_mve_vmulq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	507));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1367 */
rtx
gen_mve_vmulq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	470));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1382 */
rtx
gen_mve_vmulq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	506));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1382 */
rtx
gen_mve_vmulq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	469));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1382 */
rtx
gen_mve_vmulq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	506));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1382 */
rtx
gen_mve_vmulq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	469));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1382 */
rtx
gen_mve_vmulq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	506));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1382 */
rtx
gen_mve_vmulq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	469));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1394 */
rtx
gen_mve_vmulqv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1394 */
rtx
gen_mve_vmulqv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1394 */
rtx
gen_mve_vmulqv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1408 */
rtx
gen_mve_vornq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V16QImode,
	gen_rtx_NOT (V16QImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1408 */
rtx
gen_mve_vornq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V8HImode,
	gen_rtx_NOT (V8HImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1408 */
rtx
gen_mve_vornq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V4SImode,
	gen_rtx_NOT (V4SImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1435 */
rtx
gen_mve_vorrq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1435 */
rtx
gen_mve_vorrq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1435 */
rtx
gen_mve_vorrq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1459 */
rtx
gen_mve_vqaddq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	472));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1459 */
rtx
gen_mve_vqaddq_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	509));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1459 */
rtx
gen_mve_vqaddq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	472));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1459 */
rtx
gen_mve_vqaddq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	509));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1459 */
rtx
gen_mve_vqaddq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	472));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1459 */
rtx
gen_mve_vqaddq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	509));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1474 */
rtx
gen_mve_vqaddq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	508));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1474 */
rtx
gen_mve_vqaddq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	471));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1474 */
rtx
gen_mve_vqaddq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	508));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1474 */
rtx
gen_mve_vqaddq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	471));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1474 */
rtx
gen_mve_vqaddq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	508));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1474 */
rtx
gen_mve_vqaddq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	471));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1489 */
rtx
gen_mve_vqdmulhq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	535));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1489 */
rtx
gen_mve_vqdmulhq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	535));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1489 */
rtx
gen_mve_vqdmulhq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	535));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1504 */
rtx
gen_mve_vqdmulhq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	536));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1504 */
rtx
gen_mve_vqdmulhq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	536));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1504 */
rtx
gen_mve_vqdmulhq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	536));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1519 */
rtx
gen_mve_vqrdmulhq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	537));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1519 */
rtx
gen_mve_vqrdmulhq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	537));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1519 */
rtx
gen_mve_vqrdmulhq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	537));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1534 */
rtx
gen_mve_vqrdmulhq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	538));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1534 */
rtx
gen_mve_vqrdmulhq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	538));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1534 */
rtx
gen_mve_vqrdmulhq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	538));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1549 */
rtx
gen_mve_vqrshlq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	474));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1549 */
rtx
gen_mve_vqrshlq_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	511));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1549 */
rtx
gen_mve_vqrshlq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	474));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1549 */
rtx
gen_mve_vqrshlq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	511));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1549 */
rtx
gen_mve_vqrshlq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	474));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1549 */
rtx
gen_mve_vqrshlq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	511));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1564 */
rtx
gen_mve_vqrshlq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	473));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1564 */
rtx
gen_mve_vqrshlq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	510));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1564 */
rtx
gen_mve_vqrshlq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	473));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1564 */
rtx
gen_mve_vqrshlq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	510));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1564 */
rtx
gen_mve_vqrshlq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	473));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1564 */
rtx
gen_mve_vqrshlq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	510));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1579 */
rtx
gen_mve_vqshlq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	476));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1579 */
rtx
gen_mve_vqshlq_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	513));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1579 */
rtx
gen_mve_vqshlq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	476));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1579 */
rtx
gen_mve_vqshlq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	513));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1579 */
rtx
gen_mve_vqshlq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	476));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1579 */
rtx
gen_mve_vqshlq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	513));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1594 */
rtx
gen_mve_vqshlq_r_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	514));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1594 */
rtx
gen_mve_vqshlq_r_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	477));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1594 */
rtx
gen_mve_vqshlq_r_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	514));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1594 */
rtx
gen_mve_vqshlq_r_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	477));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1594 */
rtx
gen_mve_vqshlq_r_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	514));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1594 */
rtx
gen_mve_vqshlq_r_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	477));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1609 */
rtx
gen_mve_vqshlq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	475));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1609 */
rtx
gen_mve_vqshlq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	512));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1609 */
rtx
gen_mve_vqshlq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	475));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1609 */
rtx
gen_mve_vqshlq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	512));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1609 */
rtx
gen_mve_vqshlq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	475));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1609 */
rtx
gen_mve_vqshlq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	512));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1624 */
rtx
gen_mve_vqshluq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	539));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1624 */
rtx
gen_mve_vqshluq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	539));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1624 */
rtx
gen_mve_vqshluq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	539));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1639 */
rtx
gen_mve_vqsubq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	479));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1639 */
rtx
gen_mve_vqsubq_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	516));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1639 */
rtx
gen_mve_vqsubq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	479));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1639 */
rtx
gen_mve_vqsubq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	516));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1639 */
rtx
gen_mve_vqsubq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	479));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1639 */
rtx
gen_mve_vqsubq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	516));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1654 */
rtx
gen_mve_vqsubq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	515));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1654 */
rtx
gen_mve_vqsubq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	478));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1654 */
rtx
gen_mve_vqsubq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	515));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1654 */
rtx
gen_mve_vqsubq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	478));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1654 */
rtx
gen_mve_vqsubq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	515));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1654 */
rtx
gen_mve_vqsubq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	478));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1669 */
rtx
gen_mve_vrhaddq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	480));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1669 */
rtx
gen_mve_vrhaddq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	517));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1669 */
rtx
gen_mve_vrhaddq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	480));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1669 */
rtx
gen_mve_vrhaddq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	517));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1669 */
rtx
gen_mve_vrhaddq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	480));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1669 */
rtx
gen_mve_vrhaddq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	517));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1684 */
rtx
gen_mve_vrmulhq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	481));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1684 */
rtx
gen_mve_vrmulhq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	518));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1684 */
rtx
gen_mve_vrmulhq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	481));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1684 */
rtx
gen_mve_vrmulhq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	518));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1684 */
rtx
gen_mve_vrmulhq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	481));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1684 */
rtx
gen_mve_vrmulhq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	518));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1699 */
rtx
gen_mve_vrshlq_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	520));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1699 */
rtx
gen_mve_vrshlq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	483));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1699 */
rtx
gen_mve_vrshlq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	520));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1699 */
rtx
gen_mve_vrshlq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	483));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1699 */
rtx
gen_mve_vrshlq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	520));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1699 */
rtx
gen_mve_vrshlq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	483));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1714 */
rtx
gen_mve_vrshlq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	482));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1714 */
rtx
gen_mve_vrshlq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	519));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1714 */
rtx
gen_mve_vrshlq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	482));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1714 */
rtx
gen_mve_vrshlq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	519));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1714 */
rtx
gen_mve_vrshlq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	482));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1714 */
rtx
gen_mve_vrshlq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	519));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1729 */
rtx
gen_mve_vrshrq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	484));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1729 */
rtx
gen_mve_vrshrq_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	521));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1729 */
rtx
gen_mve_vrshrq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	484));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1729 */
rtx
gen_mve_vrshrq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	521));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1729 */
rtx
gen_mve_vrshrq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	484));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1729 */
rtx
gen_mve_vrshrq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	521));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1744 */
rtx
gen_mve_vshlq_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	522));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1744 */
rtx
gen_mve_vshlq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	485));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1744 */
rtx
gen_mve_vshlq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	522));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1744 */
rtx
gen_mve_vshlq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	485));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1744 */
rtx
gen_mve_vshlq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	522));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1744 */
rtx
gen_mve_vshlq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	485));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1759 */
rtx
gen_mve_vshlq_r_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	486));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1759 */
rtx
gen_mve_vshlq_r_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	523));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1759 */
rtx
gen_mve_vshlq_r_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	486));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1759 */
rtx
gen_mve_vshlq_r_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	523));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1759 */
rtx
gen_mve_vshlq_r_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	486));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1759 */
rtx
gen_mve_vshlq_r_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	523));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1774 */
rtx
gen_mve_vsubq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	488));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1774 */
rtx
gen_mve_vsubq_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	525));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1774 */
rtx
gen_mve_vsubq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	488));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1774 */
rtx
gen_mve_vsubq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	525));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1774 */
rtx
gen_mve_vsubq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	488));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1774 */
rtx
gen_mve_vsubq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	525));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1789 */
rtx
gen_mve_vsubq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	487));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1789 */
rtx
gen_mve_vsubq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	524));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1789 */
rtx
gen_mve_vsubq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	487));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1789 */
rtx
gen_mve_vsubq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	524));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1789 */
rtx
gen_mve_vsubq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	487));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1789 */
rtx
gen_mve_vsubq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	524));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1801 */
rtx
gen_mve_vsubqv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1801 */
rtx
gen_mve_vsubqv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1801 */
rtx
gen_mve_vsubqv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1815 */
rtx
gen_mve_vabdq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	542));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1815 */
rtx
gen_mve_vabdq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	542));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1830 */
rtx
gen_mve_vaddlvaq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	556));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1830 */
rtx
gen_mve_vaddlvaq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	555));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1845 */
rtx
gen_mve_vaddq_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	543));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1845 */
rtx
gen_mve_vaddq_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	543));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1860 */
rtx
gen_mve_vandq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1860 */
rtx
gen_mve_vandq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1874 */
rtx
gen_mve_vbicq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V8HFmode,
	gen_rtx_NOT (V8HFmode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1874 */
rtx
gen_mve_vbicq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V4SFmode,
	gen_rtx_NOT (V4SFmode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1888 */
rtx
gen_mve_vbicq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	558));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1888 */
rtx
gen_mve_vbicq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	557));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1888 */
rtx
gen_mve_vbicq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	558));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1888 */
rtx
gen_mve_vbicq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	557));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1903 */
rtx
gen_mve_vcaddq_rot90v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	368));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1903 */
rtx
gen_mve_vcaddq_rot270v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	369));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1903 */
rtx
gen_mve_vcaddq_rot90v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	368));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1903 */
rtx
gen_mve_vcaddq_rot270v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	369));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1918 */
rtx
gen_mve_vcmpeqq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_EQ (V8BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1918 */
rtx
gen_mve_vcmpgeq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GE (V8BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1918 */
rtx
gen_mve_vcmpgtq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GT (V8BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1918 */
rtx
gen_mve_vcmpleq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LE (V8BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1918 */
rtx
gen_mve_vcmpltq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LT (V8BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1918 */
rtx
gen_mve_vcmpneq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NE (V8BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1918 */
rtx
gen_mve_vcmpeqq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_EQ (V4BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1918 */
rtx
gen_mve_vcmpgeq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GE (V4BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1918 */
rtx
gen_mve_vcmpgtq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GT (V4BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1918 */
rtx
gen_mve_vcmpleq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LE (V4BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1918 */
rtx
gen_mve_vcmpltq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LT (V4BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1918 */
rtx
gen_mve_vcmpneq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NE (V4BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1932 */
rtx
gen_mve_vcmpeqq_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_EQ (V8BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V8HFmode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1932 */
rtx
gen_mve_vcmpgeq_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GE (V8BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V8HFmode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1932 */
rtx
gen_mve_vcmpgtq_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GT (V8BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V8HFmode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1932 */
rtx
gen_mve_vcmpleq_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LE (V8BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V8HFmode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1932 */
rtx
gen_mve_vcmpltq_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LT (V8BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V8HFmode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1932 */
rtx
gen_mve_vcmpneq_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NE (V8BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V8HFmode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1932 */
rtx
gen_mve_vcmpeqq_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_EQ (V4BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1932 */
rtx
gen_mve_vcmpgeq_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GE (V4BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1932 */
rtx
gen_mve_vcmpgtq_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_GT (V4BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1932 */
rtx
gen_mve_vcmpleq_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LE (V4BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1932 */
rtx
gen_mve_vcmpltq_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LT (V4BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1932 */
rtx
gen_mve_vcmpneq_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NE (V4BImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1947 */
rtx
gen_mve_vcmulqv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	376));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1947 */
rtx
gen_mve_vcmulq_rot90v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	377));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1947 */
rtx
gen_mve_vcmulq_rot180v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	378));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1947 */
rtx
gen_mve_vcmulq_rot270v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	379));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1947 */
rtx
gen_mve_vcmulqv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	376));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1947 */
rtx
gen_mve_vcmulq_rot90v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	377));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1947 */
rtx
gen_mve_vcmulq_rot180v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	378));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1947 */
rtx
gen_mve_vcmulq_rot270v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	379));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1962 */
rtx
gen_mve_vctp8q_mv16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	435));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1962 */
rtx
gen_mve_vctp16q_mv8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	435));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1962 */
rtx
gen_mve_vctp32q_mv4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	435));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1962 */
rtx
gen_mve_vctp64q_mv2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	435));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1977 */
rtx
gen_mve_vcvtbq_f16_f32v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	559));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1992 */
rtx
gen_mve_vcvttq_f16_f32v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	560));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2007 */
rtx
gen_mve_veorq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2007 */
rtx
gen_mve_veorq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2021 */
rtx
gen_mve_vmaxnmaq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	544));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2021 */
rtx
gen_mve_vmaxnmaq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	544));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2036 */
rtx
gen_mve_vmaxnmavq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	545));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2036 */
rtx
gen_mve_vmaxnmavq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	545));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2051 */
rtx
gen_mve_vmaxnmq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2051 */
rtx
gen_mve_vmaxnmq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2065 */
rtx
gen_mve_vmaxnmvq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	547));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2065 */
rtx
gen_mve_vmaxnmvq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	547));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2080 */
rtx
gen_mve_vminnmaq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	548));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2080 */
rtx
gen_mve_vminnmaq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	548));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2095 */
rtx
gen_mve_vminnmavq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	549));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2095 */
rtx
gen_mve_vminnmavq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	549));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2110 */
rtx
gen_mve_vminnmq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2110 */
rtx
gen_mve_vminnmq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2124 */
rtx
gen_mve_vminnmvq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	551));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2124 */
rtx
gen_mve_vminnmvq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	551));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2139 */
rtx
gen_mve_vmlaldavq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	561));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2139 */
rtx
gen_mve_vmlaldavq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	564));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2139 */
rtx
gen_mve_vmlaldavq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	561));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2139 */
rtx
gen_mve_vmlaldavq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	564));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2154 */
rtx
gen_mve_vmlaldavxq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	563));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2154 */
rtx
gen_mve_vmlaldavxq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	563));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2169 */
rtx
gen_mve_vmlsldavq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	565));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2169 */
rtx
gen_mve_vmlsldavq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	565));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2184 */
rtx
gen_mve_vmlsldavxq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	566));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2184 */
rtx
gen_mve_vmlsldavxq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	566));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2199 */
rtx
gen_mve_vmovnbq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	567));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2199 */
rtx
gen_mve_vmovnbq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	568));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2199 */
rtx
gen_mve_vmovnbq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	567));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2199 */
rtx
gen_mve_vmovnbq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	568));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2214 */
rtx
gen_mve_vmovntq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	570));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2214 */
rtx
gen_mve_vmovntq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	569));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2214 */
rtx
gen_mve_vmovntq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	570));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2214 */
rtx
gen_mve_vmovntq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	569));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2229 */
rtx
gen_mve_vmulq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2229 */
rtx
gen_mve_vmulq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2243 */
rtx
gen_mve_vmulq_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	553));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2243 */
rtx
gen_mve_vmulq_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	553));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2258 */
rtx
gen_mve_vornq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V8HFmode,
	gen_rtx_NOT (V8HFmode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2258 */
rtx
gen_mve_vornq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V4SFmode,
	gen_rtx_NOT (V4SFmode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2272 */
rtx
gen_mve_vorrq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2272 */
rtx
gen_mve_vorrq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2286 */
rtx
gen_mve_vorrq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	572));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2286 */
rtx
gen_mve_vorrq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	571));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2286 */
rtx
gen_mve_vorrq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	572));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2286 */
rtx
gen_mve_vorrq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	571));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2301 */
rtx
gen_mve_vqdmullbq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	573));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2301 */
rtx
gen_mve_vqdmullbq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	573));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2316 */
rtx
gen_mve_vqdmullbq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	574));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2316 */
rtx
gen_mve_vqdmullbq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	574));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2331 */
rtx
gen_mve_vqdmulltq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	575));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2331 */
rtx
gen_mve_vqdmulltq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	575));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2346 */
rtx
gen_mve_vqdmulltq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	576));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2346 */
rtx
gen_mve_vqdmulltq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	576));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2361 */
rtx
gen_mve_vqmovnbq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	577));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2361 */
rtx
gen_mve_vqmovnbq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	578));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2361 */
rtx
gen_mve_vqmovnbq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	577));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2361 */
rtx
gen_mve_vqmovnbq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	578));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2376 */
rtx
gen_mve_vqmovntq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	588));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2376 */
rtx
gen_mve_vqmovntq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	589));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2376 */
rtx
gen_mve_vqmovntq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	588));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2376 */
rtx
gen_mve_vqmovntq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	589));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2391 */
rtx
gen_mve_vqmovunbq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	579));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2391 */
rtx
gen_mve_vqmovunbq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	579));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2406 */
rtx
gen_mve_vqmovuntq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	580));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2406 */
rtx
gen_mve_vqmovuntq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	580));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2421 */
rtx
gen_mve_vrmlaldavhxq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	581));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2436 */
rtx
gen_mve_vrmlsldavhq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	582));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2451 */
rtx
gen_mve_vrmlsldavhxq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	583));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2466 */
rtx
gen_mve_vshllbq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	590));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2466 */
rtx
gen_mve_vshllbq_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	591));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2466 */
rtx
gen_mve_vshllbq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	590));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2466 */
rtx
gen_mve_vshllbq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	591));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2481 */
rtx
gen_mve_vshlltq_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	592));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2481 */
rtx
gen_mve_vshlltq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	593));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2481 */
rtx
gen_mve_vshlltq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	592));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2481 */
rtx
gen_mve_vshlltq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	593));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2496 */
rtx
gen_mve_vsubq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2496 */
rtx
gen_mve_vsubq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2510 */
rtx
gen_mve_vmulltq_poly_pv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	596));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2510 */
rtx
gen_mve_vmulltq_poly_pv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	596));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2525 */
rtx
gen_mve_vmullbq_poly_pv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	597));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2525 */
rtx
gen_mve_vmullbq_poly_pv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	597));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2540 */
rtx
gen_mve_vrmlaldavhq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	594));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2540 */
rtx
gen_mve_vrmlaldavhq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	595));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2555 */
rtx
gen_mve_vbicq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	598));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2555 */
rtx
gen_mve_vbicq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	599));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2555 */
rtx
gen_mve_vbicq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	598));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2555 */
rtx
gen_mve_vbicq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	599));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2570 */
rtx
gen_mve_vcmpeqq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	600));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2570 */
rtx
gen_mve_vcmpeqq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	600));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2585 */
rtx
gen_mve_vcvtaq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	601));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2585 */
rtx
gen_mve_vcvtaq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	602));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2585 */
rtx
gen_mve_vcvtaq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	601));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2585 */
rtx
gen_mve_vcvtaq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	602));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2600 */
rtx
gen_mve_vcvtq_m_to_f_sv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	603));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2600 */
rtx
gen_mve_vcvtq_m_to_f_uv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	604));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2600 */
rtx
gen_mve_vcvtq_m_to_f_sv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	603));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2600 */
rtx
gen_mve_vcvtq_m_to_f_uv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	604));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2615 */
rtx
gen_mve_vqrshrnbq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	605));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2615 */
rtx
gen_mve_vqrshrnbq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	606));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2615 */
rtx
gen_mve_vqrshrnbq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	605));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2615 */
rtx
gen_mve_vqrshrnbq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	606));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2630 */
rtx
gen_mve_vqrshrunbq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	607));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2630 */
rtx
gen_mve_vqrshrunbq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	607));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2645 */
rtx
gen_mve_vrmlaldavhaq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	608));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2645 */
rtx
gen_mve_vrmlaldavhaq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	613));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2661 */
rtx
gen_mve_vabavq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	609));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2661 */
rtx
gen_mve_vabavq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	610));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2661 */
rtx
gen_mve_vabavq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	609));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2661 */
rtx
gen_mve_vabavq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	610));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2661 */
rtx
gen_mve_vabavq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	609));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2661 */
rtx
gen_mve_vabavq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	610));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2705 */
rtx
gen_mve_vshlcq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	611)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		copy_rtx (operand2),
		copy_rtx (operand3),
		copy_rtx (operand4)),
	611))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2705 */
rtx
gen_mve_vshlcq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	612)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		copy_rtx (operand2),
		copy_rtx (operand3),
		copy_rtx (operand4)),
	612))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2705 */
rtx
gen_mve_vshlcq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	611)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		copy_rtx (operand2),
		copy_rtx (operand3),
		copy_rtx (operand4)),
	611))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2705 */
rtx
gen_mve_vshlcq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	612)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		copy_rtx (operand2),
		copy_rtx (operand3),
		copy_rtx (operand4)),
	612))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2705 */
rtx
gen_mve_vshlcq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	611)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		copy_rtx (operand2),
		copy_rtx (operand3),
		copy_rtx (operand4)),
	611))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2705 */
rtx
gen_mve_vshlcq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	612)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		copy_rtx (operand2),
		copy_rtx (operand3),
		copy_rtx (operand4)),
	612))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2722 */
rtx
gen_mve_vabsq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	614));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2722 */
rtx
gen_mve_vabsq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	614));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2722 */
rtx
gen_mve_vabsq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	614));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2738 */
rtx
gen_mve_vaddvaq_p_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	615));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2738 */
rtx
gen_mve_vaddvaq_p_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	616));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2738 */
rtx
gen_mve_vaddvaq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	615));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2738 */
rtx
gen_mve_vaddvaq_p_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	616));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2738 */
rtx
gen_mve_vaddvaq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	615));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2738 */
rtx
gen_mve_vaddvaq_p_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	616));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2754 */
rtx
gen_mve_vclsq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	617));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2754 */
rtx
gen_mve_vclsq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	617));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2754 */
rtx
gen_mve_vclsq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	617));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2770 */
rtx
gen_mve_vclzq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	618));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2770 */
rtx
gen_mve_vclzq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	619));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2770 */
rtx
gen_mve_vclzq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	618));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2770 */
rtx
gen_mve_vclzq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	619));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2770 */
rtx
gen_mve_vclzq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	618));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2770 */
rtx
gen_mve_vclzq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	619));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2786 */
rtx
gen_mve_vcmpcsq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	620));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2786 */
rtx
gen_mve_vcmpcsq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	620));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2786 */
rtx
gen_mve_vcmpcsq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	620));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2802 */
rtx
gen_mve_vcmpcsq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	621));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2802 */
rtx
gen_mve_vcmpcsq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	621));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2802 */
rtx
gen_mve_vcmpcsq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	621));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2818 */
rtx
gen_mve_vcmpeqq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	622));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2818 */
rtx
gen_mve_vcmpeqq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	623));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2818 */
rtx
gen_mve_vcmpeqq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	622));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2818 */
rtx
gen_mve_vcmpeqq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	623));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2818 */
rtx
gen_mve_vcmpeqq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	622));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2818 */
rtx
gen_mve_vcmpeqq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	623));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2834 */
rtx
gen_mve_vcmpeqq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	624));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2834 */
rtx
gen_mve_vcmpeqq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	625));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2834 */
rtx
gen_mve_vcmpeqq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	624));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2834 */
rtx
gen_mve_vcmpeqq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	625));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2834 */
rtx
gen_mve_vcmpeqq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	624));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2834 */
rtx
gen_mve_vcmpeqq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	625));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2850 */
rtx
gen_mve_vcmpgeq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	626));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2850 */
rtx
gen_mve_vcmpgeq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	626));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2850 */
rtx
gen_mve_vcmpgeq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	626));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2866 */
rtx
gen_mve_vcmpgeq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	627));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2866 */
rtx
gen_mve_vcmpgeq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	627));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2866 */
rtx
gen_mve_vcmpgeq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	627));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2882 */
rtx
gen_mve_vcmpgtq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	628));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2882 */
rtx
gen_mve_vcmpgtq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	628));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2882 */
rtx
gen_mve_vcmpgtq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	628));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2898 */
rtx
gen_mve_vcmpgtq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	629));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2898 */
rtx
gen_mve_vcmpgtq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	629));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2898 */
rtx
gen_mve_vcmpgtq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	629));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2914 */
rtx
gen_mve_vcmphiq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	630));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2914 */
rtx
gen_mve_vcmphiq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	630));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2914 */
rtx
gen_mve_vcmphiq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	630));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2930 */
rtx
gen_mve_vcmphiq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	631));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2930 */
rtx
gen_mve_vcmphiq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	631));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2930 */
rtx
gen_mve_vcmphiq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	631));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2946 */
rtx
gen_mve_vcmpleq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	632));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2946 */
rtx
gen_mve_vcmpleq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	632));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2946 */
rtx
gen_mve_vcmpleq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	632));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2962 */
rtx
gen_mve_vcmpleq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	633));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2962 */
rtx
gen_mve_vcmpleq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	633));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2962 */
rtx
gen_mve_vcmpleq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	633));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2978 */
rtx
gen_mve_vcmpltq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	634));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2978 */
rtx
gen_mve_vcmpltq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	634));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2978 */
rtx
gen_mve_vcmpltq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	634));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2994 */
rtx
gen_mve_vcmpltq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	635));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2994 */
rtx
gen_mve_vcmpltq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	635));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2994 */
rtx
gen_mve_vcmpltq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	635));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3010 */
rtx
gen_mve_vcmpneq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	636));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3010 */
rtx
gen_mve_vcmpneq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	637));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3010 */
rtx
gen_mve_vcmpneq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	636));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3010 */
rtx
gen_mve_vcmpneq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	637));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3010 */
rtx
gen_mve_vcmpneq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	636));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3010 */
rtx
gen_mve_vcmpneq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	637));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3026 */
rtx
gen_mve_vcmpneq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	638));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3026 */
rtx
gen_mve_vcmpneq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	639));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3026 */
rtx
gen_mve_vcmpneq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	638));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3026 */
rtx
gen_mve_vcmpneq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	639));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3026 */
rtx
gen_mve_vcmpneq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	638));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3026 */
rtx
gen_mve_vcmpneq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	639));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3042 */
rtx
gen_mve_vdupq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	640));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3042 */
rtx
gen_mve_vdupq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	641));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3042 */
rtx
gen_mve_vdupq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	640));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3042 */
rtx
gen_mve_vdupq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	641));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3042 */
rtx
gen_mve_vdupq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	640));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3042 */
rtx
gen_mve_vdupq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	641));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3058 */
rtx
gen_mve_vmaxaq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	646));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3058 */
rtx
gen_mve_vmaxaq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	646));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3058 */
rtx
gen_mve_vmaxaq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	646));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3074 */
rtx
gen_mve_vmaxavq_p_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	647));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3074 */
rtx
gen_mve_vmaxavq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	647));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3074 */
rtx
gen_mve_vmaxavq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	647));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3090 */
rtx
gen_mve_vmaxvq_p_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	648));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3090 */
rtx
gen_mve_vmaxvq_p_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	649));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3090 */
rtx
gen_mve_vmaxvq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	648));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3090 */
rtx
gen_mve_vmaxvq_p_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	649));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3090 */
rtx
gen_mve_vmaxvq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	648));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3090 */
rtx
gen_mve_vmaxvq_p_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	649));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3106 */
rtx
gen_mve_vminaq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	650));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3106 */
rtx
gen_mve_vminaq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	650));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3106 */
rtx
gen_mve_vminaq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	650));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3122 */
rtx
gen_mve_vminavq_p_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	651));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3122 */
rtx
gen_mve_vminavq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	651));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3122 */
rtx
gen_mve_vminavq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	651));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3138 */
rtx
gen_mve_vminvq_p_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	652));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3138 */
rtx
gen_mve_vminvq_p_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	653));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3138 */
rtx
gen_mve_vminvq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	652));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3138 */
rtx
gen_mve_vminvq_p_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	653));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3138 */
rtx
gen_mve_vminvq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	652));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3138 */
rtx
gen_mve_vminvq_p_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	653));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3154 */
rtx
gen_mve_vmladavaq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	654));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3154 */
rtx
gen_mve_vmladavaq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	655));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3154 */
rtx
gen_mve_vmladavaq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	654));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3154 */
rtx
gen_mve_vmladavaq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	655));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3154 */
rtx
gen_mve_vmladavaq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	654));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3154 */
rtx
gen_mve_vmladavaq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	655));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3170 */
rtx
gen_mve_vmladavq_p_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	656));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3170 */
rtx
gen_mve_vmladavq_p_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	657));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3170 */
rtx
gen_mve_vmladavq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	656));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3170 */
rtx
gen_mve_vmladavq_p_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	657));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3170 */
rtx
gen_mve_vmladavq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	656));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3170 */
rtx
gen_mve_vmladavq_p_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	657));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3186 */
rtx
gen_mve_vmladavxq_p_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	658));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3186 */
rtx
gen_mve_vmladavxq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	658));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3186 */
rtx
gen_mve_vmladavxq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	658));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3202 */
rtx
gen_mve_vmlaq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	659));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3202 */
rtx
gen_mve_vmlaq_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	660));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3202 */
rtx
gen_mve_vmlaq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	659));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3202 */
rtx
gen_mve_vmlaq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	660));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3202 */
rtx
gen_mve_vmlaq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	659));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3202 */
rtx
gen_mve_vmlaq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	660));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3218 */
rtx
gen_mve_vmlasq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	661));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3218 */
rtx
gen_mve_vmlasq_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	662));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3218 */
rtx
gen_mve_vmlasq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	661));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3218 */
rtx
gen_mve_vmlasq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	662));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3218 */
rtx
gen_mve_vmlasq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	661));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3218 */
rtx
gen_mve_vmlasq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	662));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3234 */
rtx
gen_mve_vmlsdavq_p_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	663));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3234 */
rtx
gen_mve_vmlsdavq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	663));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3234 */
rtx
gen_mve_vmlsdavq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	663));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3250 */
rtx
gen_mve_vmlsdavxq_p_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	664));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3250 */
rtx
gen_mve_vmlsdavxq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	664));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3250 */
rtx
gen_mve_vmlsdavxq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	664));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3266 */
rtx
gen_mve_vmvnq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	665));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3266 */
rtx
gen_mve_vmvnq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	666));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3266 */
rtx
gen_mve_vmvnq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	665));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3266 */
rtx
gen_mve_vmvnq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	666));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3266 */
rtx
gen_mve_vmvnq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	665));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3266 */
rtx
gen_mve_vmvnq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	666));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3282 */
rtx
gen_mve_vnegq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	667));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3282 */
rtx
gen_mve_vnegq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	667));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3282 */
rtx
gen_mve_vnegq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	667));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3298 */
rtx
gen_mve_vpselq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	668));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3298 */
rtx
gen_mve_vpselq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	669));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3298 */
rtx
gen_mve_vpselq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	668));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3298 */
rtx
gen_mve_vpselq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	669));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3298 */
rtx
gen_mve_vpselq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	668));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3298 */
rtx
gen_mve_vpselq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	669));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3298 */
rtx
gen_mve_vpselq_sv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	668));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3298 */
rtx
gen_mve_vpselq_uv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	669));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3314 */
rtx
gen_mve_vqabsq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	670));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3314 */
rtx
gen_mve_vqabsq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	670));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3314 */
rtx
gen_mve_vqabsq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	670));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3330 */
rtx
gen_mve_vqdmlahq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	671));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3330 */
rtx
gen_mve_vqdmlahq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	671));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3330 */
rtx
gen_mve_vqdmlahq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	671));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3346 */
rtx
gen_mve_vqdmlashq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	672));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3346 */
rtx
gen_mve_vqdmlashq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	672));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3346 */
rtx
gen_mve_vqdmlashq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	672));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3362 */
rtx
gen_mve_vqnegq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	673));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3362 */
rtx
gen_mve_vqnegq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	673));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3362 */
rtx
gen_mve_vqnegq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	673));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3378 */
rtx
gen_mve_vqrdmladhq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	674));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3378 */
rtx
gen_mve_vqrdmladhq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	674));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3378 */
rtx
gen_mve_vqrdmladhq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	674));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3394 */
rtx
gen_mve_vqrdmladhxq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	675));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3394 */
rtx
gen_mve_vqrdmladhxq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	675));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3394 */
rtx
gen_mve_vqrdmladhxq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	675));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3410 */
rtx
gen_mve_vqrdmlahq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	676));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3410 */
rtx
gen_mve_vqrdmlahq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	676));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3410 */
rtx
gen_mve_vqrdmlahq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	676));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3426 */
rtx
gen_mve_vqrdmlashq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	677));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3426 */
rtx
gen_mve_vqrdmlashq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	677));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3426 */
rtx
gen_mve_vqrdmlashq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	677));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3442 */
rtx
gen_mve_vqrdmlsdhq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	678));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3442 */
rtx
gen_mve_vqrdmlsdhq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	678));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3442 */
rtx
gen_mve_vqrdmlsdhq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	678));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3458 */
rtx
gen_mve_vqrdmlsdhxq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	679));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3458 */
rtx
gen_mve_vqrdmlsdhxq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	679));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3458 */
rtx
gen_mve_vqrdmlsdhxq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	679));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3474 */
rtx
gen_mve_vqrshlq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	680));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3474 */
rtx
gen_mve_vqrshlq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	681));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3474 */
rtx
gen_mve_vqrshlq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	680));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3474 */
rtx
gen_mve_vqrshlq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	681));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3474 */
rtx
gen_mve_vqrshlq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	680));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3474 */
rtx
gen_mve_vqrshlq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	681));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3490 */
rtx
gen_mve_vqshlq_m_r_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	682));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3490 */
rtx
gen_mve_vqshlq_m_r_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	683));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3490 */
rtx
gen_mve_vqshlq_m_r_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	682));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3490 */
rtx
gen_mve_vqshlq_m_r_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	683));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3490 */
rtx
gen_mve_vqshlq_m_r_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	682));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3490 */
rtx
gen_mve_vqshlq_m_r_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	683));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3506 */
rtx
gen_mve_vrev64q_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	684));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3506 */
rtx
gen_mve_vrev64q_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	685));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3506 */
rtx
gen_mve_vrev64q_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	684));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3506 */
rtx
gen_mve_vrev64q_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	685));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3506 */
rtx
gen_mve_vrev64q_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	684));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3506 */
rtx
gen_mve_vrev64q_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	685));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3522 */
rtx
gen_mve_vrshlq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	686));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3522 */
rtx
gen_mve_vrshlq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	687));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3522 */
rtx
gen_mve_vrshlq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	686));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3522 */
rtx
gen_mve_vrshlq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	687));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3522 */
rtx
gen_mve_vrshlq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	686));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3522 */
rtx
gen_mve_vrshlq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	687));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3538 */
rtx
gen_mve_vshlq_m_r_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	688));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3538 */
rtx
gen_mve_vshlq_m_r_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	689));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3538 */
rtx
gen_mve_vshlq_m_r_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	688));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3538 */
rtx
gen_mve_vshlq_m_r_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	689));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3538 */
rtx
gen_mve_vshlq_m_r_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	688));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3538 */
rtx
gen_mve_vshlq_m_r_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	689));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3554 */
rtx
gen_mve_vsliq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	690));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3554 */
rtx
gen_mve_vsliq_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	691));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3554 */
rtx
gen_mve_vsliq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	690));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3554 */
rtx
gen_mve_vsliq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	691));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3554 */
rtx
gen_mve_vsliq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	690));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3554 */
rtx
gen_mve_vsliq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	691));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3570 */
rtx
gen_mve_vsriq_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	692));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3570 */
rtx
gen_mve_vsriq_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	693));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3570 */
rtx
gen_mve_vsriq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	692));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3570 */
rtx
gen_mve_vsriq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	693));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3570 */
rtx
gen_mve_vsriq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	692));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3570 */
rtx
gen_mve_vsriq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	693));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3586 */
rtx
gen_mve_vqdmlsdhxq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	694));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3586 */
rtx
gen_mve_vqdmlsdhxq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	694));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3586 */
rtx
gen_mve_vqdmlsdhxq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	694));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3602 */
rtx
gen_mve_vqdmlsdhq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	695));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3602 */
rtx
gen_mve_vqdmlsdhq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	695));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3602 */
rtx
gen_mve_vqdmlsdhq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	695));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3618 */
rtx
gen_mve_vqdmladhxq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	696));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3618 */
rtx
gen_mve_vqdmladhxq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	696));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3618 */
rtx
gen_mve_vqdmladhxq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	696));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3634 */
rtx
gen_mve_vqdmladhq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	697));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3634 */
rtx
gen_mve_vqdmladhq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	697));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3634 */
rtx
gen_mve_vqdmladhq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	697));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3650 */
rtx
gen_mve_vmlsdavaxq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	698));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3650 */
rtx
gen_mve_vmlsdavaxq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	698));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3650 */
rtx
gen_mve_vmlsdavaxq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	698));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3666 */
rtx
gen_mve_vmlsdavaq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	699));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3666 */
rtx
gen_mve_vmlsdavaq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	699));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3666 */
rtx
gen_mve_vmlsdavaq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	699));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3682 */
rtx
gen_mve_vmladavaxq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	700));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3682 */
rtx
gen_mve_vmladavaxq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	700));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3682 */
rtx
gen_mve_vmladavaxq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	700));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3697 */
rtx
gen_mve_vabsq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	717));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3697 */
rtx
gen_mve_vabsq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	717));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3713 */
rtx
gen_mve_vaddlvaq_p_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	808));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3713 */
rtx
gen_mve_vaddlvaq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	728));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3728 */
rtx
gen_mve_vcmlaqv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	370)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3728 */
rtx
gen_mve_vcmlaq_rot90v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	371)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3728 */
rtx
gen_mve_vcmlaq_rot180v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	372)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3728 */
rtx
gen_mve_vcmlaq_rot270v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	373)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3728 */
rtx
gen_mve_vcmlaqv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	370)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3728 */
rtx
gen_mve_vcmlaq_rot90v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	371)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3728 */
rtx
gen_mve_vcmlaq_rot180v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	372)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3728 */
rtx
gen_mve_vcmlaq_rot270v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	373)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3747 */
rtx
gen_mve_vcmpeqq_m_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	748));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3747 */
rtx
gen_mve_vcmpeqq_m_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	748));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3763 */
rtx
gen_mve_vcmpgeq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	701));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3763 */
rtx
gen_mve_vcmpgeq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	701));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3779 */
rtx
gen_mve_vcmpgeq_m_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	742));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3779 */
rtx
gen_mve_vcmpgeq_m_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	742));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3795 */
rtx
gen_mve_vcmpgtq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	713));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3795 */
rtx
gen_mve_vcmpgtq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	713));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3811 */
rtx
gen_mve_vcmpgtq_m_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	702));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3811 */
rtx
gen_mve_vcmpgtq_m_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	702));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3827 */
rtx
gen_mve_vcmpleq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	730));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3827 */
rtx
gen_mve_vcmpleq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	730));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3843 */
rtx
gen_mve_vcmpleq_m_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	741));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3843 */
rtx
gen_mve_vcmpleq_m_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	741));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3859 */
rtx
gen_mve_vcmpltq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	714));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3859 */
rtx
gen_mve_vcmpltq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	714));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3875 */
rtx
gen_mve_vcmpltq_m_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	724));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3875 */
rtx
gen_mve_vcmpltq_m_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	724));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3891 */
rtx
gen_mve_vcmpneq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	725));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3891 */
rtx
gen_mve_vcmpneq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	725));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3907 */
rtx
gen_mve_vcmpneq_m_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	745));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3907 */
rtx
gen_mve_vcmpneq_m_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	745));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3923 */
rtx
gen_mve_vcvtbq_m_f16_f32v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	791));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3939 */
rtx
gen_mve_vcvtbq_m_f32_f16v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	792));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3955 */
rtx
gen_mve_vcvttq_m_f16_f32v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	793));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3971 */
rtx
gen_mve_vcvttq_m_f32_f16v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	794));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3987 */
rtx
gen_mve_vdupq_m_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	712));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:3987 */
rtx
gen_mve_vdupq_m_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	712));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4003 */
rtx
gen_mve_vfmaq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	706));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4003 */
rtx
gen_mve_vfmaq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	706));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4019 */
rtx
gen_mve_vfmaq_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	719));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4019 */
rtx
gen_mve_vfmaq_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	719));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4035 */
rtx
gen_mve_vfmasq_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	711));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4035 */
rtx
gen_mve_vfmasq_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	711));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4050 */
rtx
gen_mve_vfmsq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	733));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4050 */
rtx
gen_mve_vfmsq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	733));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4066 */
rtx
gen_mve_vmaxnmaq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	749));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4066 */
rtx
gen_mve_vmaxnmaq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	749));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4081 */
rtx
gen_mve_vmaxnmavq_p_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	718));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4081 */
rtx
gen_mve_vmaxnmavq_p_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	718));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4097 */
rtx
gen_mve_vmaxnmvq_p_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	735));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4097 */
rtx
gen_mve_vmaxnmvq_p_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	735));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4112 */
rtx
gen_mve_vminnmaq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	710));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4112 */
rtx
gen_mve_vminnmaq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	710));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4128 */
rtx
gen_mve_vminnmavq_p_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	744));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4128 */
rtx
gen_mve_vminnmavq_p_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	744));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4143 */
rtx
gen_mve_vminnmvq_p_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	734));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4143 */
rtx
gen_mve_vminnmvq_p_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	734));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4159 */
rtx
gen_mve_vmlaldavaq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	771));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4159 */
rtx
gen_mve_vmlaldavaq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	772));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4159 */
rtx
gen_mve_vmlaldavaq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	771));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4159 */
rtx
gen_mve_vmlaldavaq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	772));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4175 */
rtx
gen_mve_vmlaldavaxq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	787));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4175 */
rtx
gen_mve_vmlaldavaxq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	787));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4191 */
rtx
gen_mve_vmlaldavq_p_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	751));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4191 */
rtx
gen_mve_vmlaldavq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	752));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4191 */
rtx
gen_mve_vmlaldavq_p_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	751));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4191 */
rtx
gen_mve_vmlaldavq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	752));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4207 */
rtx
gen_mve_vmlaldavxq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	780));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4207 */
rtx
gen_mve_vmlaldavxq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	780));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4222 */
rtx
gen_mve_vmlsldavaq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	707));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4222 */
rtx
gen_mve_vmlsldavaq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	707));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4238 */
rtx
gen_mve_vmlsldavaxq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	731));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4238 */
rtx
gen_mve_vmlsldavaxq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	731));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4254 */
rtx
gen_mve_vmlsldavq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	703));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4254 */
rtx
gen_mve_vmlsldavq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	703));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4270 */
rtx
gen_mve_vmlsldavxq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	705));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4270 */
rtx
gen_mve_vmlsldavxq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	705));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4285 */
rtx
gen_mve_vmovlbq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	769));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4285 */
rtx
gen_mve_vmovlbq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	770));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4285 */
rtx
gen_mve_vmovlbq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	769));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4285 */
rtx
gen_mve_vmovlbq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	770));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4300 */
rtx
gen_mve_vmovltq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	755));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4300 */
rtx
gen_mve_vmovltq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	756));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4300 */
rtx
gen_mve_vmovltq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	755));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4300 */
rtx
gen_mve_vmovltq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	756));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4315 */
rtx
gen_mve_vmovnbq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	757));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4315 */
rtx
gen_mve_vmovnbq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	758));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4315 */
rtx
gen_mve_vmovnbq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	757));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4315 */
rtx
gen_mve_vmovnbq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	758));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4331 */
rtx
gen_mve_vmovntq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	767));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4331 */
rtx
gen_mve_vmovntq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	768));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4331 */
rtx
gen_mve_vmovntq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	767));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4331 */
rtx
gen_mve_vmovntq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	768));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4347 */
rtx
gen_mve_vmvnq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	783));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4347 */
rtx
gen_mve_vmvnq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	784));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4347 */
rtx
gen_mve_vmvnq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	783));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4347 */
rtx
gen_mve_vmvnq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	784));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4362 */
rtx
gen_mve_vnegq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	739));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4362 */
rtx
gen_mve_vnegq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	739));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4378 */
rtx
gen_mve_vorrq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	761));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4378 */
rtx
gen_mve_vorrq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	762));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4378 */
rtx
gen_mve_vorrq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	761));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4378 */
rtx
gen_mve_vorrq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	762));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4393 */
rtx
gen_mve_vpselq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	736));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4393 */
rtx
gen_mve_vpselq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	736));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4409 */
rtx
gen_mve_vqmovnbq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	753));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4409 */
rtx
gen_mve_vqmovnbq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	754));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4409 */
rtx
gen_mve_vqmovnbq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	753));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4409 */
rtx
gen_mve_vqmovnbq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	754));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4425 */
rtx
gen_mve_vqmovntq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	781));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4425 */
rtx
gen_mve_vqmovntq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	782));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4425 */
rtx
gen_mve_vqmovntq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	781));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4425 */
rtx
gen_mve_vqmovntq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	782));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4441 */
rtx
gen_mve_vqmovunbq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	729));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4441 */
rtx
gen_mve_vqmovunbq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	729));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4457 */
rtx
gen_mve_vqmovuntq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	737));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4457 */
rtx
gen_mve_vqmovuntq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	737));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4473 */
rtx
gen_mve_vqrshrntq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	765));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4473 */
rtx
gen_mve_vqrshrntq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	766));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4473 */
rtx
gen_mve_vqrshrntq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	765));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4473 */
rtx
gen_mve_vqrshrntq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	766));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4489 */
rtx
gen_mve_vqrshruntq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	709));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4489 */
rtx
gen_mve_vqrshruntq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	709));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4505 */
rtx
gen_mve_vqshrnbq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	773));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4505 */
rtx
gen_mve_vqshrnbq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	774));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4505 */
rtx
gen_mve_vqshrnbq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	773));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4505 */
rtx
gen_mve_vqshrnbq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	774));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4521 */
rtx
gen_mve_vqshrntq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	785));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4521 */
rtx
gen_mve_vqshrntq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	786));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4521 */
rtx
gen_mve_vqshrntq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	785));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4521 */
rtx
gen_mve_vqshrntq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	786));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4537 */
rtx
gen_mve_vqshrunbq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	708));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4537 */
rtx
gen_mve_vqshrunbq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	708));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4553 */
rtx
gen_mve_vqshruntq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	716));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4553 */
rtx
gen_mve_vqshruntq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	716));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4569 */
rtx
gen_mve_vrev32q_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	721));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4585 */
rtx
gen_mve_vrev32q_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	763));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4585 */
rtx
gen_mve_vrev32q_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	764));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4585 */
rtx
gen_mve_vrev32q_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	763));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4585 */
rtx
gen_mve_vrev32q_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	764));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4601 */
rtx
gen_mve_vrev64q_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	738));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4601 */
rtx
gen_mve_vrev64q_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	738));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4617 */
rtx
gen_mve_vrmlaldavhaxq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	704));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4633 */
rtx
gen_mve_vrmlaldavhxq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	747));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4649 */
rtx
gen_mve_vrmlsldavhaxq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	723));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4665 */
rtx
gen_mve_vrmlsldavhq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	715));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4681 */
rtx
gen_mve_vrmlsldavhxq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	720));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4697 */
rtx
gen_mve_vrndaq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	726));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4697 */
rtx
gen_mve_vrndaq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	726));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4713 */
rtx
gen_mve_vrndmq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	740));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4713 */
rtx
gen_mve_vrndmq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	740));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4729 */
rtx
gen_mve_vrndnq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	743));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4729 */
rtx
gen_mve_vrndnq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	743));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4745 */
rtx
gen_mve_vrndpq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	727));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4745 */
rtx
gen_mve_vrndpq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	727));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4761 */
rtx
gen_mve_vrndxq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	732));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4761 */
rtx
gen_mve_vrndxq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	732));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4777 */
rtx
gen_mve_vrshrnbq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	777));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4777 */
rtx
gen_mve_vrshrnbq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	778));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4777 */
rtx
gen_mve_vrshrnbq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	777));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4777 */
rtx
gen_mve_vrshrnbq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	778));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4793 */
rtx
gen_mve_vrshrntq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	759));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4793 */
rtx
gen_mve_vrshrntq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	760));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4793 */
rtx
gen_mve_vrshrntq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	759));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4793 */
rtx
gen_mve_vrshrntq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	760));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4809 */
rtx
gen_mve_vshrnbq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	775));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4809 */
rtx
gen_mve_vshrnbq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	776));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4809 */
rtx
gen_mve_vshrnbq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	775));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4809 */
rtx
gen_mve_vshrnbq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	776));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4825 */
rtx
gen_mve_vshrntq_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	789));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4825 */
rtx
gen_mve_vshrntq_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	790));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4825 */
rtx
gen_mve_vshrntq_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	789));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4825 */
rtx
gen_mve_vshrntq_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	790));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4841 */
rtx
gen_mve_vcvtmq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	795));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4841 */
rtx
gen_mve_vcvtmq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	796));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4841 */
rtx
gen_mve_vcvtmq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	795));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4841 */
rtx
gen_mve_vcvtmq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	796));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4857 */
rtx
gen_mve_vcvtpq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	798));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4857 */
rtx
gen_mve_vcvtpq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	799));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4857 */
rtx
gen_mve_vcvtpq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	798));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4857 */
rtx
gen_mve_vcvtpq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	799));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4873 */
rtx
gen_mve_vcvtnq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	797));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4873 */
rtx
gen_mve_vcvtnq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	801));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4873 */
rtx
gen_mve_vcvtnq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	797));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4873 */
rtx
gen_mve_vcvtnq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	801));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4889 */
rtx
gen_mve_vcvtq_m_n_from_f_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	800));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4889 */
rtx
gen_mve_vcvtq_m_n_from_f_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	809));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4889 */
rtx
gen_mve_vcvtq_m_n_from_f_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	800));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4889 */
rtx
gen_mve_vcvtq_m_n_from_f_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	809));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4906 */
rtx
gen_mve_vrev16q_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	802));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4906 */
rtx
gen_mve_vrev16q_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	803));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4922 */
rtx
gen_mve_vcvtq_m_from_f_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	805));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4922 */
rtx
gen_mve_vcvtq_m_from_f_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	806));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4922 */
rtx
gen_mve_vcvtq_m_from_f_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	805));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4922 */
rtx
gen_mve_vcvtq_m_from_f_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	806));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4938 */
rtx
gen_mve_vrmlaldavhq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	746));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4938 */
rtx
gen_mve_vrmlaldavhq_p_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	807));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4954 */
rtx
gen_mve_vrmlsldavhaq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	722));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4970 */
rtx
gen_mve_vabavq_p_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	811));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4970 */
rtx
gen_mve_vabavq_p_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	812));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4970 */
rtx
gen_mve_vabavq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	811));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4970 */
rtx
gen_mve_vabavq_p_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	812));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4970 */
rtx
gen_mve_vabavq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	811));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4970 */
rtx
gen_mve_vabavq_p_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	812));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4987 */
rtx
gen_mve_vqshluq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	810));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4987 */
rtx
gen_mve_vqshluq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	810));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:4987 */
rtx
gen_mve_vqshluq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	810));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5004 */
rtx
gen_mve_vshlq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	813));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5004 */
rtx
gen_mve_vshlq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	814));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5004 */
rtx
gen_mve_vshlq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	813));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5004 */
rtx
gen_mve_vshlq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	814));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5004 */
rtx
gen_mve_vshlq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	813));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5004 */
rtx
gen_mve_vshlq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	814));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5021 */
rtx
gen_mve_vsriq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	815));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5021 */
rtx
gen_mve_vsriq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	816));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5021 */
rtx
gen_mve_vsriq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	815));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5021 */
rtx
gen_mve_vsriq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	816));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5021 */
rtx
gen_mve_vsriq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	815));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5021 */
rtx
gen_mve_vsriq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	816));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5038 */
rtx
gen_mve_vsubq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	817));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5038 */
rtx
gen_mve_vsubq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	818));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5038 */
rtx
gen_mve_vsubq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	817));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5038 */
rtx
gen_mve_vsubq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	818));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5038 */
rtx
gen_mve_vsubq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	817));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5038 */
rtx
gen_mve_vsubq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	818));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5055 */
rtx
gen_mve_vcvtq_m_n_to_f_uv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	819));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5055 */
rtx
gen_mve_vcvtq_m_n_to_f_sv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	820));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5055 */
rtx
gen_mve_vcvtq_m_n_to_f_uv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	819));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5055 */
rtx
gen_mve_vcvtq_m_n_to_f_sv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	820));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5071 */
rtx
gen_mve_vabdq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	540));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5071 */
rtx
gen_mve_vabdq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	541));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5071 */
rtx
gen_mve_vabdq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	540));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5071 */
rtx
gen_mve_vabdq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	541));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5071 */
rtx
gen_mve_vabdq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	540));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5071 */
rtx
gen_mve_vabdq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	541));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5088 */
rtx
gen_mve_vaddq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	865));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5088 */
rtx
gen_mve_vaddq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	866));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5088 */
rtx
gen_mve_vaddq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	865));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5088 */
rtx
gen_mve_vaddq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	866));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5088 */
rtx
gen_mve_vaddq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	865));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5088 */
rtx
gen_mve_vaddq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	866));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5105 */
rtx
gen_mve_vaddq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	889));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5105 */
rtx
gen_mve_vaddq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	911));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5105 */
rtx
gen_mve_vaddq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	889));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5105 */
rtx
gen_mve_vaddq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	911));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5105 */
rtx
gen_mve_vaddq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	889));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5105 */
rtx
gen_mve_vaddq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	911));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5122 */
rtx
gen_mve_vandq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	879));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5122 */
rtx
gen_mve_vandq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	880));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5122 */
rtx
gen_mve_vandq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	879));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5122 */
rtx
gen_mve_vandq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	880));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5122 */
rtx
gen_mve_vandq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	879));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5122 */
rtx
gen_mve_vandq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	880));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5139 */
rtx
gen_mve_vbicq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	830));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5139 */
rtx
gen_mve_vbicq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	831));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5139 */
rtx
gen_mve_vbicq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	830));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5139 */
rtx
gen_mve_vbicq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	831));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5139 */
rtx
gen_mve_vbicq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	830));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5139 */
rtx
gen_mve_vbicq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	831));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5156 */
rtx
gen_mve_vbrsrq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	894));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5156 */
rtx
gen_mve_vbrsrq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	826));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5156 */
rtx
gen_mve_vbrsrq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	894));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5156 */
rtx
gen_mve_vbrsrq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	826));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5156 */
rtx
gen_mve_vbrsrq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	894));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5156 */
rtx
gen_mve_vbrsrq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	826));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5173 */
rtx
gen_mve_vcaddq_rot270_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	850));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5173 */
rtx
gen_mve_vcaddq_rot270_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	851));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5173 */
rtx
gen_mve_vcaddq_rot270_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	850));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5173 */
rtx
gen_mve_vcaddq_rot270_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	851));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5173 */
rtx
gen_mve_vcaddq_rot270_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	850));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5173 */
rtx
gen_mve_vcaddq_rot270_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	851));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5190 */
rtx
gen_mve_vcaddq_rot90_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	905));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5190 */
rtx
gen_mve_vcaddq_rot90_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	906));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5190 */
rtx
gen_mve_vcaddq_rot90_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	905));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5190 */
rtx
gen_mve_vcaddq_rot90_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	906));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5190 */
rtx
gen_mve_vcaddq_rot90_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	905));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5190 */
rtx
gen_mve_vcaddq_rot90_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	906));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5207 */
rtx
gen_mve_veorq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	915));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5207 */
rtx
gen_mve_veorq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	916));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5207 */
rtx
gen_mve_veorq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	915));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5207 */
rtx
gen_mve_veorq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	916));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5207 */
rtx
gen_mve_veorq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	915));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5207 */
rtx
gen_mve_veorq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	916));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5224 */
rtx
gen_mve_vhaddq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	912));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5224 */
rtx
gen_mve_vhaddq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	919));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5224 */
rtx
gen_mve_vhaddq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	912));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5224 */
rtx
gen_mve_vhaddq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	919));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5224 */
rtx
gen_mve_vhaddq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	912));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5224 */
rtx
gen_mve_vhaddq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	919));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5241 */
rtx
gen_mve_vhaddq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	833));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5241 */
rtx
gen_mve_vhaddq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	829));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5241 */
rtx
gen_mve_vhaddq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	833));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5241 */
rtx
gen_mve_vhaddq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	829));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5241 */
rtx
gen_mve_vhaddq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	833));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5241 */
rtx
gen_mve_vhaddq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	829));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5258 */
rtx
gen_mve_vhsubq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	881));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5258 */
rtx
gen_mve_vhsubq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	882));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5258 */
rtx
gen_mve_vhsubq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	881));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5258 */
rtx
gen_mve_vhsubq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	882));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5258 */
rtx
gen_mve_vhsubq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	881));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5258 */
rtx
gen_mve_vhsubq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	882));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5275 */
rtx
gen_mve_vhsubq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	917));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5275 */
rtx
gen_mve_vhsubq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	918));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5275 */
rtx
gen_mve_vhsubq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	917));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5275 */
rtx
gen_mve_vhsubq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	918));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5275 */
rtx
gen_mve_vhsubq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	917));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5275 */
rtx
gen_mve_vhsubq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	918));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5292 */
rtx
gen_mve_vmaxq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	868));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5292 */
rtx
gen_mve_vmaxq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	847));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5292 */
rtx
gen_mve_vmaxq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	868));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5292 */
rtx
gen_mve_vmaxq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	847));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5292 */
rtx
gen_mve_vmaxq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	868));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5292 */
rtx
gen_mve_vmaxq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	847));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5309 */
rtx
gen_mve_vminq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	876));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5309 */
rtx
gen_mve_vminq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	877));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5309 */
rtx
gen_mve_vminq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	876));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5309 */
rtx
gen_mve_vminq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	877));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5309 */
rtx
gen_mve_vminq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	876));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5309 */
rtx
gen_mve_vminq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	877));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5326 */
rtx
gen_mve_vmladavaq_p_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	900));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5326 */
rtx
gen_mve_vmladavaq_p_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	901));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5326 */
rtx
gen_mve_vmladavaq_p_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	900));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5326 */
rtx
gen_mve_vmladavaq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	901));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5326 */
rtx
gen_mve_vmladavaq_p_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	900));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5326 */
rtx
gen_mve_vmladavaq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	901));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5343 */
rtx
gen_mve_vmlaq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	835));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5343 */
rtx
gen_mve_vmlaq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	838));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5343 */
rtx
gen_mve_vmlaq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	835));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5343 */
rtx
gen_mve_vmlaq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	838));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5343 */
rtx
gen_mve_vmlaq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	835));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5343 */
rtx
gen_mve_vmlaq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	838));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5360 */
rtx
gen_mve_vmlasq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	845));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5360 */
rtx
gen_mve_vmlasq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	846));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5360 */
rtx
gen_mve_vmlasq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	845));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5360 */
rtx
gen_mve_vmlasq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	846));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5360 */
rtx
gen_mve_vmlasq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	845));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5360 */
rtx
gen_mve_vmlasq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	846));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5377 */
rtx
gen_mve_vmulhq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	883));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5377 */
rtx
gen_mve_vmulhq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	884));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5377 */
rtx
gen_mve_vmulhq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	883));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5377 */
rtx
gen_mve_vmulhq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	884));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5377 */
rtx
gen_mve_vmulhq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	883));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5377 */
rtx
gen_mve_vmulhq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	884));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5394 */
rtx
gen_mve_vmullbq_int_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	885));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5394 */
rtx
gen_mve_vmullbq_int_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	886));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5394 */
rtx
gen_mve_vmullbq_int_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	885));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5394 */
rtx
gen_mve_vmullbq_int_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	886));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5394 */
rtx
gen_mve_vmullbq_int_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	885));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5394 */
rtx
gen_mve_vmullbq_int_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	886));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5411 */
rtx
gen_mve_vmulltq_int_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	841));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5411 */
rtx
gen_mve_vmulltq_int_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	842));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5411 */
rtx
gen_mve_vmulltq_int_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	841));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5411 */
rtx
gen_mve_vmulltq_int_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	842));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5411 */
rtx
gen_mve_vmulltq_int_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	841));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5411 */
rtx
gen_mve_vmulltq_int_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	842));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5428 */
rtx
gen_mve_vmulq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	832));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5428 */
rtx
gen_mve_vmulq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	843));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5428 */
rtx
gen_mve_vmulq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	832));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5428 */
rtx
gen_mve_vmulq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	843));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5428 */
rtx
gen_mve_vmulq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	832));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5428 */
rtx
gen_mve_vmulq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	843));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5445 */
rtx
gen_mve_vmulq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	857));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5445 */
rtx
gen_mve_vmulq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	858));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5445 */
rtx
gen_mve_vmulq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	857));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5445 */
rtx
gen_mve_vmulq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	858));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5445 */
rtx
gen_mve_vmulq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	857));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5445 */
rtx
gen_mve_vmulq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	858));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5462 */
rtx
gen_mve_vornq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	907));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5462 */
rtx
gen_mve_vornq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	908));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5462 */
rtx
gen_mve_vornq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	907));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5462 */
rtx
gen_mve_vornq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	908));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5462 */
rtx
gen_mve_vornq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	907));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5462 */
rtx
gen_mve_vornq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	908));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5479 */
rtx
gen_mve_vorrq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	870));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5479 */
rtx
gen_mve_vorrq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	871));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5479 */
rtx
gen_mve_vorrq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	870));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5479 */
rtx
gen_mve_vorrq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	871));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5479 */
rtx
gen_mve_vorrq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	870));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5479 */
rtx
gen_mve_vorrq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	871));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5496 */
rtx
gen_mve_vqaddq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	914));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5496 */
rtx
gen_mve_vqaddq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	891));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5496 */
rtx
gen_mve_vqaddq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	914));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5496 */
rtx
gen_mve_vqaddq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	891));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5496 */
rtx
gen_mve_vqaddq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	914));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5496 */
rtx
gen_mve_vqaddq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	891));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5513 */
rtx
gen_mve_vqaddq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	821));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5513 */
rtx
gen_mve_vqaddq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	822));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5513 */
rtx
gen_mve_vqaddq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	821));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5513 */
rtx
gen_mve_vqaddq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	822));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5513 */
rtx
gen_mve_vqaddq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	821));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5513 */
rtx
gen_mve_vqaddq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	822));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5530 */
rtx
gen_mve_vqdmlahq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	898));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5530 */
rtx
gen_mve_vqdmlahq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	898));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5530 */
rtx
gen_mve_vqdmlahq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	898));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5547 */
rtx
gen_mve_vqdmlashq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	859));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5547 */
rtx
gen_mve_vqdmlashq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	859));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5547 */
rtx
gen_mve_vqdmlashq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	859));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5564 */
rtx
gen_mve_vqrdmlahq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	869));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5564 */
rtx
gen_mve_vqrdmlahq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	869));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5564 */
rtx
gen_mve_vqrdmlahq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	869));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5581 */
rtx
gen_mve_vqrdmlashq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	860));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5581 */
rtx
gen_mve_vqrdmlashq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	860));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5581 */
rtx
gen_mve_vqrdmlashq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	860));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5598 */
rtx
gen_mve_vqrshlq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	873));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5598 */
rtx
gen_mve_vqrshlq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	852));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5598 */
rtx
gen_mve_vqrshlq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	873));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5598 */
rtx
gen_mve_vqrshlq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	852));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5598 */
rtx
gen_mve_vqrshlq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	873));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5598 */
rtx
gen_mve_vqrshlq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	852));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5615 */
rtx
gen_mve_vqshlq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	909));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5615 */
rtx
gen_mve_vqshlq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	910));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5615 */
rtx
gen_mve_vqshlq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	909));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5615 */
rtx
gen_mve_vqshlq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	910));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5615 */
rtx
gen_mve_vqshlq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	909));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5615 */
rtx
gen_mve_vqshlq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	910));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5632 */
rtx
gen_mve_vqshlq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	903));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5632 */
rtx
gen_mve_vqshlq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	904));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5632 */
rtx
gen_mve_vqshlq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	903));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5632 */
rtx
gen_mve_vqshlq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	904));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5632 */
rtx
gen_mve_vqshlq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	903));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5632 */
rtx
gen_mve_vqshlq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	904));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5649 */
rtx
gen_mve_vqsubq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	839));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5649 */
rtx
gen_mve_vqsubq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	840));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5649 */
rtx
gen_mve_vqsubq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	839));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5649 */
rtx
gen_mve_vqsubq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	840));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5649 */
rtx
gen_mve_vqsubq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	839));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5649 */
rtx
gen_mve_vqsubq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	840));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5666 */
rtx
gen_mve_vqsubq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	836));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5666 */
rtx
gen_mve_vqsubq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	837));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5666 */
rtx
gen_mve_vqsubq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	836));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5666 */
rtx
gen_mve_vqsubq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	837));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5666 */
rtx
gen_mve_vqsubq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	836));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5666 */
rtx
gen_mve_vqsubq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	837));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5683 */
rtx
gen_mve_vrhaddq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	854));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5683 */
rtx
gen_mve_vrhaddq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	856));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5683 */
rtx
gen_mve_vrhaddq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	854));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5683 */
rtx
gen_mve_vrhaddq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	856));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5683 */
rtx
gen_mve_vrhaddq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	854));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5683 */
rtx
gen_mve_vrhaddq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	856));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5700 */
rtx
gen_mve_vrmulhq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	874));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5700 */
rtx
gen_mve_vrmulhq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	875));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5700 */
rtx
gen_mve_vrmulhq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	874));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5700 */
rtx
gen_mve_vrmulhq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	875));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5700 */
rtx
gen_mve_vrmulhq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	874));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5700 */
rtx
gen_mve_vrmulhq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	875));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5717 */
rtx
gen_mve_vrshlq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	861));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5717 */
rtx
gen_mve_vrshlq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	862));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5717 */
rtx
gen_mve_vrshlq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	861));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5717 */
rtx
gen_mve_vrshlq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	862));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5717 */
rtx
gen_mve_vrshlq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	861));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5717 */
rtx
gen_mve_vrshlq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	862));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5734 */
rtx
gen_mve_vrshrq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	823));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5734 */
rtx
gen_mve_vrshrq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	863));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5734 */
rtx
gen_mve_vrshrq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	823));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5734 */
rtx
gen_mve_vrshrq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	863));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5734 */
rtx
gen_mve_vrshrq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	823));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5734 */
rtx
gen_mve_vrshrq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	863));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5751 */
rtx
gen_mve_vshlq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	896));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5751 */
rtx
gen_mve_vshlq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	899));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5751 */
rtx
gen_mve_vshlq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	896));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5751 */
rtx
gen_mve_vshlq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	899));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5751 */
rtx
gen_mve_vshlq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	896));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5751 */
rtx
gen_mve_vshlq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	899));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5768 */
rtx
gen_mve_vshrq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	888));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5768 */
rtx
gen_mve_vshrq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	855));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5768 */
rtx
gen_mve_vshrq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	888));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5768 */
rtx
gen_mve_vshrq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	855));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5768 */
rtx
gen_mve_vshrq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	888));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5768 */
rtx
gen_mve_vshrq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	855));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5785 */
rtx
gen_mve_vsliq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	890));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5785 */
rtx
gen_mve_vsliq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	902));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5785 */
rtx
gen_mve_vsliq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	890));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5785 */
rtx
gen_mve_vsliq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	902));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5785 */
rtx
gen_mve_vsliq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	890));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5785 */
rtx
gen_mve_vsliq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	902));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5802 */
rtx
gen_mve_vsubq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	824));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5802 */
rtx
gen_mve_vsubq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	825));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5802 */
rtx
gen_mve_vsubq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	824));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5802 */
rtx
gen_mve_vsubq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	825));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5802 */
rtx
gen_mve_vsubq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	824));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5802 */
rtx
gen_mve_vsubq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	825));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5819 */
rtx
gen_mve_vhcaddq_rot270_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	930));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5819 */
rtx
gen_mve_vhcaddq_rot270_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	930));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5819 */
rtx
gen_mve_vhcaddq_rot270_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	930));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5836 */
rtx
gen_mve_vhcaddq_rot90_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	920));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5836 */
rtx
gen_mve_vhcaddq_rot90_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	920));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5836 */
rtx
gen_mve_vhcaddq_rot90_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	920));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5853 */
rtx
gen_mve_vmladavaxq_p_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	925));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5853 */
rtx
gen_mve_vmladavaxq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	925));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5853 */
rtx
gen_mve_vmladavaxq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	925));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5870 */
rtx
gen_mve_vmlsdavaq_p_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	933));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5870 */
rtx
gen_mve_vmlsdavaq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	933));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5870 */
rtx
gen_mve_vmlsdavaq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	933));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5887 */
rtx
gen_mve_vmlsdavaxq_p_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	928));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5887 */
rtx
gen_mve_vmlsdavaxq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	928));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5887 */
rtx
gen_mve_vmlsdavaxq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	928));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5904 */
rtx
gen_mve_vqdmladhq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	935));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5904 */
rtx
gen_mve_vqdmladhq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	935));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5904 */
rtx
gen_mve_vqdmladhq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	935));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5921 */
rtx
gen_mve_vqdmladhxq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	926));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5921 */
rtx
gen_mve_vqdmladhxq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	926));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5921 */
rtx
gen_mve_vqdmladhxq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	926));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5938 */
rtx
gen_mve_vqdmlsdhq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	931));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5938 */
rtx
gen_mve_vqdmlsdhq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	931));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5938 */
rtx
gen_mve_vqdmlsdhq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	931));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5955 */
rtx
gen_mve_vqdmlsdhxq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	932));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5955 */
rtx
gen_mve_vqdmlsdhxq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	932));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5955 */
rtx
gen_mve_vqdmlsdhxq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	932));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5972 */
rtx
gen_mve_vqdmulhq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	929));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5972 */
rtx
gen_mve_vqdmulhq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	929));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5972 */
rtx
gen_mve_vqdmulhq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	929));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5989 */
rtx
gen_mve_vqdmulhq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	924));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5989 */
rtx
gen_mve_vqdmulhq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	924));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:5989 */
rtx
gen_mve_vqdmulhq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	924));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6006 */
rtx
gen_mve_vqrdmladhq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	934));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6006 */
rtx
gen_mve_vqrdmladhq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	934));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6006 */
rtx
gen_mve_vqrdmladhq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	934));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6023 */
rtx
gen_mve_vqrdmladhxq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	923));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6023 */
rtx
gen_mve_vqrdmladhxq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	923));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6023 */
rtx
gen_mve_vqrdmladhxq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	923));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6040 */
rtx
gen_mve_vqrdmlsdhq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	921));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6040 */
rtx
gen_mve_vqrdmlsdhq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	921));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6040 */
rtx
gen_mve_vqrdmlsdhq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	921));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6057 */
rtx
gen_mve_vqrdmlsdhxq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	922));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6057 */
rtx
gen_mve_vqrdmlsdhxq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	922));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6057 */
rtx
gen_mve_vqrdmlsdhxq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	922));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6074 */
rtx
gen_mve_vqrdmulhq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	959));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6074 */
rtx
gen_mve_vqrdmulhq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	959));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6074 */
rtx
gen_mve_vqrdmulhq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	959));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6091 */
rtx
gen_mve_vqrdmulhq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	927));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6091 */
rtx
gen_mve_vqrdmulhq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	927));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6091 */
rtx
gen_mve_vqrdmulhq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	927));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6108 */
rtx
gen_mve_vmlaldavaq_p_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	936));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6108 */
rtx
gen_mve_vmlaldavaq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	937));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6108 */
rtx
gen_mve_vmlaldavaq_p_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	936));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6108 */
rtx
gen_mve_vmlaldavaq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	937));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6125 */
rtx
gen_mve_vmlaldavaxq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	955));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6125 */
rtx
gen_mve_vmlaldavaxq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	955));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6142 */
rtx
gen_mve_vqrshrnbq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	938));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6142 */
rtx
gen_mve_vqrshrnbq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	939));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6142 */
rtx
gen_mve_vqrshrnbq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	938));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6142 */
rtx
gen_mve_vqrshrnbq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	939));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6159 */
rtx
gen_mve_vqrshrntq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	940));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6159 */
rtx
gen_mve_vqrshrntq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	956));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6159 */
rtx
gen_mve_vqrshrntq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	940));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6159 */
rtx
gen_mve_vqrshrntq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	956));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6176 */
rtx
gen_mve_vqshrnbq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	941));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6176 */
rtx
gen_mve_vqshrnbq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	942));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6176 */
rtx
gen_mve_vqshrnbq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	941));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6176 */
rtx
gen_mve_vqshrnbq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	942));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6193 */
rtx
gen_mve_vqshrntq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	943));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6193 */
rtx
gen_mve_vqshrntq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	957));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6193 */
rtx
gen_mve_vqshrntq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	943));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6193 */
rtx
gen_mve_vqshrntq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	957));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6210 */
rtx
gen_mve_vrmlaldavhaq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	960));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6227 */
rtx
gen_mve_vrshrnbq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	944));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6227 */
rtx
gen_mve_vrshrnbq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	945));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6227 */
rtx
gen_mve_vrshrnbq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	944));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6227 */
rtx
gen_mve_vrshrnbq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	945));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6244 */
rtx
gen_mve_vrshrntq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	946));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6244 */
rtx
gen_mve_vrshrntq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	958));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6244 */
rtx
gen_mve_vrshrntq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	946));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6244 */
rtx
gen_mve_vrshrntq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	958));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6261 */
rtx
gen_mve_vshllbq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	947));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6261 */
rtx
gen_mve_vshllbq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	948));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6261 */
rtx
gen_mve_vshllbq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	947));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6261 */
rtx
gen_mve_vshllbq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	948));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6278 */
rtx
gen_mve_vshlltq_m_n_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	949));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6278 */
rtx
gen_mve_vshlltq_m_n_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	950));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6278 */
rtx
gen_mve_vshlltq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	949));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6278 */
rtx
gen_mve_vshlltq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	950));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6295 */
rtx
gen_mve_vshrnbq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	951));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6295 */
rtx
gen_mve_vshrnbq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	952));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6295 */
rtx
gen_mve_vshrnbq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	951));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6295 */
rtx
gen_mve_vshrnbq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	952));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6312 */
rtx
gen_mve_vshrntq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	953));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6312 */
rtx
gen_mve_vshrntq_m_n_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	954));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6312 */
rtx
gen_mve_vshrntq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	953));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6312 */
rtx
gen_mve_vshrntq_m_n_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	954));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6329 */
rtx
gen_mve_vmlsldavaq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	961));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6329 */
rtx
gen_mve_vmlsldavaq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	961));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6346 */
rtx
gen_mve_vmlsldavaxq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	962));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6346 */
rtx
gen_mve_vmlsldavaxq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	962));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6363 */
rtx
gen_mve_vmullbq_poly_m_pv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	963));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6363 */
rtx
gen_mve_vmullbq_poly_m_pv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	963));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6380 */
rtx
gen_mve_vmulltq_poly_m_pv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	964));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6380 */
rtx
gen_mve_vmulltq_poly_m_pv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	964));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6397 */
rtx
gen_mve_vqdmullbq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	965));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6397 */
rtx
gen_mve_vqdmullbq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	965));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6414 */
rtx
gen_mve_vqdmullbq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	966));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6414 */
rtx
gen_mve_vqdmullbq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	966));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6431 */
rtx
gen_mve_vqdmulltq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	967));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6431 */
rtx
gen_mve_vqdmulltq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	967));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6448 */
rtx
gen_mve_vqdmulltq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	968));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6448 */
rtx
gen_mve_vqdmulltq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	968));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6465 */
rtx
gen_mve_vqrshrunbq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	969));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6465 */
rtx
gen_mve_vqrshrunbq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	969));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6482 */
rtx
gen_mve_vqrshruntq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	976));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6482 */
rtx
gen_mve_vqrshruntq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	976));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6499 */
rtx
gen_mve_vqshrunbq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	970));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6499 */
rtx
gen_mve_vqshrunbq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	970));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6516 */
rtx
gen_mve_vqshruntq_m_n_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	971));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6516 */
rtx
gen_mve_vqshruntq_m_n_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	971));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6533 */
rtx
gen_mve_vrmlaldavhaq_p_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	972));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6550 */
rtx
gen_mve_vrmlaldavhaxq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	973));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6567 */
rtx
gen_mve_vrmlsldavhaq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	974));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6584 */
rtx
gen_mve_vrmlsldavhaxq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	975));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6600 */
rtx
gen_mve_vabdq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	893));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6600 */
rtx
gen_mve_vabdq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	893));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6617 */
rtx
gen_mve_vaddq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	913));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6617 */
rtx
gen_mve_vaddq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	913));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6634 */
rtx
gen_mve_vaddq_m_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	864));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6634 */
rtx
gen_mve_vaddq_m_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	864));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6651 */
rtx
gen_mve_vandq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	878));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6651 */
rtx
gen_mve_vandq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	878));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6668 */
rtx
gen_mve_vbicq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	828));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6668 */
rtx
gen_mve_vbicq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	828));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6685 */
rtx
gen_mve_vbrsrq_m_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	892));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6685 */
rtx
gen_mve_vbrsrq_m_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	892));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6702 */
rtx
gen_mve_vcaddq_rot270_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	849));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6702 */
rtx
gen_mve_vcaddq_rot270_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	849));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6719 */
rtx
gen_mve_vcaddq_rot90_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	887));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6719 */
rtx
gen_mve_vcaddq_rot90_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	887));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6736 */
rtx
gen_mve_vcmlaq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	977));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6736 */
rtx
gen_mve_vcmlaq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	977));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6753 */
rtx
gen_mve_vcmlaq_rot180_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	978));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6753 */
rtx
gen_mve_vcmlaq_rot180_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	978));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6770 */
rtx
gen_mve_vcmlaq_rot270_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	979));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6770 */
rtx
gen_mve_vcmlaq_rot270_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	979));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6787 */
rtx
gen_mve_vcmlaq_rot90_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	980));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6787 */
rtx
gen_mve_vcmlaq_rot90_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	980));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6804 */
rtx
gen_mve_vcmulq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	981));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6804 */
rtx
gen_mve_vcmulq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	981));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6821 */
rtx
gen_mve_vcmulq_rot180_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	982));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6821 */
rtx
gen_mve_vcmulq_rot180_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	982));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6838 */
rtx
gen_mve_vcmulq_rot270_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	983));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6838 */
rtx
gen_mve_vcmulq_rot270_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	983));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6855 */
rtx
gen_mve_vcmulq_rot90_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	984));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6855 */
rtx
gen_mve_vcmulq_rot90_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	984));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6872 */
rtx
gen_mve_veorq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	895));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6872 */
rtx
gen_mve_veorq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	895));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6889 */
rtx
gen_mve_vfmaq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	985));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6889 */
rtx
gen_mve_vfmaq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	985));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6906 */
rtx
gen_mve_vfmaq_m_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	986));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6906 */
rtx
gen_mve_vfmaq_m_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	986));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6923 */
rtx
gen_mve_vfmasq_m_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	987));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6923 */
rtx
gen_mve_vfmasq_m_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	987));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6940 */
rtx
gen_mve_vfmsq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	988));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6940 */
rtx
gen_mve_vfmsq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	988));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6957 */
rtx
gen_mve_vmaxnmq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	989));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6957 */
rtx
gen_mve_vmaxnmq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	989));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6974 */
rtx
gen_mve_vminnmq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	990));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6974 */
rtx
gen_mve_vminnmq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	990));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6991 */
rtx
gen_mve_vmulq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	853));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:6991 */
rtx
gen_mve_vmulq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	853));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7008 */
rtx
gen_mve_vmulq_m_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	844));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7008 */
rtx
gen_mve_vmulq_m_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	844));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7025 */
rtx
gen_mve_vornq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	834));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7025 */
rtx
gen_mve_vornq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	834));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7042 */
rtx
gen_mve_vorrq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	872));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7042 */
rtx
gen_mve_vorrq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	872));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7059 */
rtx
gen_mve_vsubq_m_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	991));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7059 */
rtx
gen_mve_vsubq_m_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	991));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7076 */
rtx
gen_mve_vsubq_m_n_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	827));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7076 */
rtx
gen_mve_vsubq_m_n_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	827));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7093 */
rtx
gen_mve_vstrbq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	996));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7093 */
rtx
gen_mve_vstrbq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	997));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7093 */
rtx
gen_mve_vstrbq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	996));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7093 */
rtx
gen_mve_vstrbq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	997));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7093 */
rtx
gen_mve_vstrbq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4QImode,
	gen_rtvec (1,
		operand1),
	996));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7093 */
rtx
gen_mve_vstrbq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4QImode,
	gen_rtvec (1,
		operand1),
	997));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7126 */
rtx
gen_mve_vstrbq_scatter_offset_sv16qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	994));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7126 */
rtx
gen_mve_vstrbq_scatter_offset_uv16qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	995));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7126 */
rtx
gen_mve_vstrbq_scatter_offset_sv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	994));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7126 */
rtx
gen_mve_vstrbq_scatter_offset_uv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	995));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7126 */
rtx
gen_mve_vstrbq_scatter_offset_sv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	994));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7126 */
rtx
gen_mve_vstrbq_scatter_offset_uv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	995));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7140 */
rtx
gen_mve_vstrwq_scatter_base_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	992));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7140 */
rtx
gen_mve_vstrwq_scatter_base_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	993));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7162 */
rtx
gen_mve_vldrbq_gather_offset_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	998));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7162 */
rtx
gen_mve_vldrbq_gather_offset_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	999));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7162 */
rtx
gen_mve_vldrbq_gather_offset_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	998));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7162 */
rtx
gen_mve_vldrbq_gather_offset_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	999));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7162 */
rtx
gen_mve_vldrbq_gather_offset_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	998));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7162 */
rtx
gen_mve_vldrbq_gather_offset_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	999));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7185 */
rtx
gen_mve_vldrbq_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	1000));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7185 */
rtx
gen_mve_vldrbq_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	1001));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7185 */
rtx
gen_mve_vldrbq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	1000));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7185 */
rtx
gen_mve_vldrbq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	1001));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7185 */
rtx
gen_mve_vldrbq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	1000));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7185 */
rtx
gen_mve_vldrbq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	1001));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7207 */
rtx
gen_mve_vldrwq_gather_base_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1002));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7207 */
rtx
gen_mve_vldrwq_gather_base_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1003));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7244 */
rtx
gen_mve_vstrbq_scatter_offset_p_sv16qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	994));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7244 */
rtx
gen_mve_vstrbq_scatter_offset_p_uv16qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	995));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7244 */
rtx
gen_mve_vstrbq_scatter_offset_p_sv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	994));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7244 */
rtx
gen_mve_vstrbq_scatter_offset_p_uv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	995));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7244 */
rtx
gen_mve_vstrbq_scatter_offset_p_sv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	994));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7244 */
rtx
gen_mve_vstrbq_scatter_offset_p_uv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	995));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7259 */
rtx
gen_mve_vstrwq_scatter_base_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	992));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7259 */
rtx
gen_mve_vstrwq_scatter_base_p_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	993));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7279 */
rtx
gen_mve_vstrbq_p_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand0),
	996));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7279 */
rtx
gen_mve_vstrbq_p_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand0),
	997));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7279 */
rtx
gen_mve_vstrbq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand0),
	996));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7279 */
rtx
gen_mve_vstrbq_p_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand0),
	997));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7279 */
rtx
gen_mve_vstrbq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand0),
	996));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7279 */
rtx
gen_mve_vstrbq_p_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand0),
	997));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7300 */
rtx
gen_mve_vldrbq_gather_offset_z_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	998));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7300 */
rtx
gen_mve_vldrbq_gather_offset_z_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	999));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7300 */
rtx
gen_mve_vldrbq_gather_offset_z_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	998));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7300 */
rtx
gen_mve_vldrbq_gather_offset_z_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	999));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7300 */
rtx
gen_mve_vldrbq_gather_offset_z_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	998));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7300 */
rtx
gen_mve_vldrbq_gather_offset_z_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	999));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7325 */
rtx
gen_mve_vldrbq_z_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1000));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7325 */
rtx
gen_mve_vldrbq_z_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1001));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7325 */
rtx
gen_mve_vldrbq_z_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1000));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7325 */
rtx
gen_mve_vldrbq_z_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1001));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7325 */
rtx
gen_mve_vldrbq_z_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1000));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7325 */
rtx
gen_mve_vldrbq_z_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1001));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7348 */
rtx
gen_mve_vldrwq_gather_base_z_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1002));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7348 */
rtx
gen_mve_vldrwq_gather_base_z_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1003));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7369 */
rtx
gen_mve_vldrhq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	1007));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7388 */
rtx
gen_mve_vldrhq_gather_offset_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1008));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7388 */
rtx
gen_mve_vldrhq_gather_offset_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1009));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7388 */
rtx
gen_mve_vldrhq_gather_offset_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1008));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7388 */
rtx
gen_mve_vldrhq_gather_offset_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1009));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7411 */
rtx
gen_mve_vldrhq_gather_offset_z_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1008));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7411 */
rtx
gen_mve_vldrhq_gather_offset_z_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1009));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7411 */
rtx
gen_mve_vldrhq_gather_offset_z_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1008));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7411 */
rtx
gen_mve_vldrhq_gather_offset_z_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1009));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7436 */
rtx
gen_mve_vldrhq_gather_shifted_offset_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1010));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7436 */
rtx
gen_mve_vldrhq_gather_shifted_offset_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1011));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7436 */
rtx
gen_mve_vldrhq_gather_shifted_offset_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1010));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7436 */
rtx
gen_mve_vldrhq_gather_shifted_offset_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1011));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7459 */
rtx
gen_mve_vldrhq_gather_shifted_offset_z_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1010));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7459 */
rtx
gen_mve_vldrhq_gather_shifted_offset_z_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1011));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7459 */
rtx
gen_mve_vldrhq_gather_shifted_offset_z_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1010));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7459 */
rtx
gen_mve_vldrhq_gather_shifted_offset_z_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1011));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7484 */
rtx
gen_mve_vldrhq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	1012));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7484 */
rtx
gen_mve_vldrhq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	1013));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7484 */
rtx
gen_mve_vldrhq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	1012));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7484 */
rtx
gen_mve_vldrhq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	1013));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7506 */
rtx
gen_mve_vldrhq_z_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	1007));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7526 */
rtx
gen_mve_vldrhq_z_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1012));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7526 */
rtx
gen_mve_vldrhq_z_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1013));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7526 */
rtx
gen_mve_vldrhq_z_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1012));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7526 */
rtx
gen_mve_vldrhq_z_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1013));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7549 */
rtx
gen_mve_vldrwq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	1014));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7568 */
rtx
gen_mve_vldrwq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	1015));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7568 */
rtx
gen_mve_vldrwq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	1016));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7587 */
rtx
gen_mve_vldrwq_z_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	1014));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7607 */
rtx
gen_mve_vldrwq_z_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1015));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7607 */
rtx
gen_mve_vldrwq_z_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1016));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7647 */
rtx
gen_mve_vldrdq_gather_base_sv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1017));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7647 */
rtx
gen_mve_vldrdq_gather_base_uv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1018));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7667 */
rtx
gen_mve_vldrdq_gather_base_z_sv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1017));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7667 */
rtx
gen_mve_vldrdq_gather_base_z_uv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1018));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7688 */
rtx
gen_mve_vldrdq_gather_offset_sv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1019));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7688 */
rtx
gen_mve_vldrdq_gather_offset_uv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1020));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7708 */
rtx
gen_mve_vldrdq_gather_offset_z_sv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1019));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7708 */
rtx
gen_mve_vldrdq_gather_offset_z_uv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1020));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7729 */
rtx
gen_mve_vldrdq_gather_shifted_offset_sv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1021));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7729 */
rtx
gen_mve_vldrdq_gather_shifted_offset_uv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1022));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7749 */
rtx
gen_mve_vldrdq_gather_shifted_offset_z_sv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1021));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7749 */
rtx
gen_mve_vldrdq_gather_shifted_offset_z_uv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1022));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7770 */
rtx
gen_mve_vldrhq_gather_offset_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	1023));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7790 */
rtx
gen_mve_vldrhq_gather_offset_z_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1023));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7812 */
rtx
gen_mve_vldrhq_gather_shifted_offset_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	1024));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7832 */
rtx
gen_mve_vldrhq_gather_shifted_offset_z_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1024));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7854 */
rtx
gen_mve_vldrwq_gather_base_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	1025));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7874 */
rtx
gen_mve_vldrwq_gather_base_z_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1025));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7895 */
rtx
gen_mve_vldrwq_gather_offset_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	1026));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7915 */
rtx
gen_mve_vldrwq_gather_offset_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1027));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7915 */
rtx
gen_mve_vldrwq_gather_offset_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1028));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7935 */
rtx
gen_mve_vldrwq_gather_offset_z_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1026));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7957 */
rtx
gen_mve_vldrwq_gather_offset_z_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1027));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7957 */
rtx
gen_mve_vldrwq_gather_offset_z_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1028));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7979 */
rtx
gen_mve_vldrwq_gather_shifted_offset_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	1029));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7999 */
rtx
gen_mve_vldrwq_gather_shifted_offset_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1030));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7999 */
rtx
gen_mve_vldrwq_gather_shifted_offset_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1031));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8019 */
rtx
gen_mve_vldrwq_gather_shifted_offset_z_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1029));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8041 */
rtx
gen_mve_vldrwq_gather_shifted_offset_z_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1030));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8041 */
rtx
gen_mve_vldrwq_gather_shifted_offset_z_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1031));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8063 */
rtx
gen_mve_vstrhq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	1032));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8082 */
rtx
gen_mve_vstrhq_p_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand0),
	1032));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8103 */
rtx
gen_mve_vstrhq_p_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand0),
	1098));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8103 */
rtx
gen_mve_vstrhq_p_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand0),
	1036));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8103 */
rtx
gen_mve_vstrhq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand0),
	1098));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8103 */
rtx
gen_mve_vstrhq_p_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand0),
	1036));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8142 */
rtx
gen_mve_vstrhq_scatter_offset_p_sv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1035));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8142 */
rtx
gen_mve_vstrhq_scatter_offset_p_uv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1095));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8142 */
rtx
gen_mve_vstrhq_scatter_offset_p_sv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1035));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8142 */
rtx
gen_mve_vstrhq_scatter_offset_p_uv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1095));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8171 */
rtx
gen_mve_vstrhq_scatter_offset_sv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1035));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8171 */
rtx
gen_mve_vstrhq_scatter_offset_uv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1095));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8171 */
rtx
gen_mve_vstrhq_scatter_offset_sv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1035));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8171 */
rtx
gen_mve_vstrhq_scatter_offset_uv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1095));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8202 */
rtx
gen_mve_vstrhq_scatter_shifted_offset_p_sv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1096));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8202 */
rtx
gen_mve_vstrhq_scatter_shifted_offset_p_uv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1097));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8202 */
rtx
gen_mve_vstrhq_scatter_shifted_offset_p_sv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1096));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8202 */
rtx
gen_mve_vstrhq_scatter_shifted_offset_p_uv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1097));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8232 */
rtx
gen_mve_vstrhq_scatter_shifted_offset_sv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1096));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8232 */
rtx
gen_mve_vstrhq_scatter_shifted_offset_uv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1097));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8232 */
rtx
gen_mve_vstrhq_scatter_shifted_offset_sv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1096));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8232 */
rtx
gen_mve_vstrhq_scatter_shifted_offset_uv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1097));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8246 */
rtx
gen_mve_vstrhq_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	1098));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8246 */
rtx
gen_mve_vstrhq_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	1036));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8246 */
rtx
gen_mve_vstrhq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	1098));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8246 */
rtx
gen_mve_vstrhq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	1036));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8265 */
rtx
gen_mve_vstrwq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	1039));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8284 */
rtx
gen_mve_vstrwq_p_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand0),
	1039));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8305 */
rtx
gen_mve_vstrwq_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand0),
	1037));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8305 */
rtx
gen_mve_vstrwq_p_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand0),
	1038));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8326 */
rtx
gen_mve_vstrwq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	1037));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8326 */
rtx
gen_mve_vstrwq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	1038));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8365 */
rtx
gen_mve_vstrdq_scatter_base_p_sv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1041));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8365 */
rtx
gen_mve_vstrdq_scatter_base_p_uv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1042));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8388 */
rtx
gen_mve_vstrdq_scatter_base_sv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1041));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8388 */
rtx
gen_mve_vstrdq_scatter_base_uv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1042));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8426 */
rtx
gen_mve_vstrdq_scatter_offset_p_sv2di_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1043));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8426 */
rtx
gen_mve_vstrdq_scatter_offset_p_uv2di_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1044));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8455 */
rtx
gen_mve_vstrdq_scatter_offset_sv2di_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1043));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8455 */
rtx
gen_mve_vstrdq_scatter_offset_uv2di_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1044));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8486 */
rtx
gen_mve_vstrdq_scatter_shifted_offset_p_sv2di_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1045));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8486 */
rtx
gen_mve_vstrdq_scatter_shifted_offset_p_uv2di_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1046));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8516 */
rtx
gen_mve_vstrdq_scatter_shifted_offset_sv2di_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1045));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8516 */
rtx
gen_mve_vstrdq_scatter_shifted_offset_uv2di_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1046));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8544 */
rtx
gen_mve_vstrhq_scatter_offset_fv8hf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1051));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8574 */
rtx
gen_mve_vstrhq_scatter_offset_p_fv8hf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1051));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8603 */
rtx
gen_mve_vstrhq_scatter_shifted_offset_fv8hf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1052));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8634 */
rtx
gen_mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1052));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8649 */
rtx
gen_mve_vstrwq_scatter_base_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1053));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8671 */
rtx
gen_mve_vstrwq_scatter_base_p_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1053));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8708 */
rtx
gen_mve_vstrwq_scatter_offset_fv4sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1054));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8738 */
rtx
gen_mve_vstrwq_scatter_offset_p_fv4sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1054));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8769 */
rtx
gen_mve_vstrwq_scatter_offset_p_sv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1047));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8769 */
rtx
gen_mve_vstrwq_scatter_offset_p_uv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1048));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8798 */
rtx
gen_mve_vstrwq_scatter_offset_sv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1047));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8798 */
rtx
gen_mve_vstrwq_scatter_offset_uv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1048));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8826 */
rtx
gen_mve_vstrwq_scatter_shifted_offset_fv4sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1055));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8857 */
rtx
gen_mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1055));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8889 */
rtx
gen_mve_vstrwq_scatter_shifted_offset_p_sv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1049));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8889 */
rtx
gen_mve_vstrwq_scatter_shifted_offset_p_uv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	1050));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8919 */
rtx
gen_mve_vstrwq_scatter_shifted_offset_sv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1049));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8919 */
rtx
gen_mve_vstrwq_scatter_shifted_offset_uv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	1050));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8933 */
rtx
gen_mve_vaddqv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8933 */
rtx
gen_mve_vaddqv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8933 */
rtx
gen_mve_vaddqv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8947 */
rtx
gen_mve_vaddq_fv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8947 */
rtx
gen_mve_vaddq_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8978 */
rtx
gen_mve_vidupq_uv16qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	1060)),
		gen_rtx_SET (operand1,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand2),
	operand4))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8978 */
rtx
gen_mve_vidupq_uv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	1060)),
		gen_rtx_SET (operand1,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand2),
	operand4))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8978 */
rtx
gen_mve_vidupq_uv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	1060)),
		gen_rtx_SET (operand1,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand2),
	operand4))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9012 */
rtx
gen_mve_vidupq_m_wb_uv16qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand3,
		operand4,
		operand5),
	1061)),
		gen_rtx_SET (operand2,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand3),
	operand6))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9012 */
rtx
gen_mve_vidupq_m_wb_uv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand3,
		operand4,
		operand5),
	1061)),
		gen_rtx_SET (operand2,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand3),
	operand6))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9012 */
rtx
gen_mve_vidupq_m_wb_uv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand3,
		operand4,
		operand5),
	1061)),
		gen_rtx_SET (operand2,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand3),
	operand6))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9046 */
rtx
gen_mve_vddupq_uv16qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	1056)),
		gen_rtx_SET (operand1,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand2),
	operand4))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9046 */
rtx
gen_mve_vddupq_uv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	1056)),
		gen_rtx_SET (operand1,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand2),
	operand4))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9046 */
rtx
gen_mve_vddupq_uv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	1056)),
		gen_rtx_SET (operand1,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand2),
	operand4))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9080 */
rtx
gen_mve_vddupq_m_wb_uv16qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand3,
		operand4,
		operand5),
	1057)),
		gen_rtx_SET (operand2,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand3),
	operand6))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9080 */
rtx
gen_mve_vddupq_m_wb_uv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand1,
		operand3,
		operand4,
		operand5),
	1057)),
		gen_rtx_SET (operand2,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand3),
	operand6))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9080 */
rtx
gen_mve_vddupq_m_wb_uv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand3,
		operand4,
		operand5),
	1057)),
		gen_rtx_SET (operand2,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand3),
	operand6))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9132 */
rtx
gen_mve_vdwdupq_wb_uv16qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand2,
		gen_rtx_SUBREG (SImode,
	operand3,
	4),
		operand4),
	1058)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		copy_rtx (operand2),
		gen_rtx_SUBREG (SImode,
	copy_rtx (operand3),
	4),
		copy_rtx (operand4)),
	1058))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9132 */
rtx
gen_mve_vdwdupq_wb_uv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand2,
		gen_rtx_SUBREG (SImode,
	operand3,
	4),
		operand4),
	1058)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		copy_rtx (operand2),
		gen_rtx_SUBREG (SImode,
	copy_rtx (operand3),
	4),
		copy_rtx (operand4)),
	1058))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9132 */
rtx
gen_mve_vdwdupq_wb_uv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		gen_rtx_SUBREG (SImode,
	operand3,
	4),
		operand4),
	1058)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		copy_rtx (operand2),
		gen_rtx_SUBREG (SImode,
	copy_rtx (operand3),
	4),
		copy_rtx (operand4)),
	1058))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9190 */
rtx
gen_mve_vdwdupq_m_wb_uv16qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (5,
		operand2,
		operand3,
		gen_rtx_SUBREG (SImode,
	operand4,
	4),
		operand5,
		operand6),
	1059)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (5,
		copy_rtx (operand2),
		copy_rtx (operand3),
		gen_rtx_SUBREG (SImode,
	copy_rtx (operand4),
	4),
		copy_rtx (operand5),
		copy_rtx (operand6)),
	1059))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9190 */
rtx
gen_mve_vdwdupq_m_wb_uv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (5,
		operand2,
		operand3,
		gen_rtx_SUBREG (SImode,
	operand4,
	4),
		operand5,
		operand6),
	1059)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (5,
		copy_rtx (operand2),
		copy_rtx (operand3),
		gen_rtx_SUBREG (SImode,
	copy_rtx (operand4),
	4),
		copy_rtx (operand5),
		copy_rtx (operand6)),
	1059))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9190 */
rtx
gen_mve_vdwdupq_m_wb_uv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (5,
		operand2,
		operand3,
		gen_rtx_SUBREG (SImode,
	operand4,
	4),
		operand5,
		operand6),
	1059)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (5,
		copy_rtx (operand2),
		copy_rtx (operand3),
		gen_rtx_SUBREG (SImode,
	copy_rtx (operand4),
	4),
		copy_rtx (operand5),
		copy_rtx (operand6)),
	1059))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9249 */
rtx
gen_mve_viwdupq_wb_uv16qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand2,
		gen_rtx_SUBREG (SImode,
	operand3,
	4),
		operand4),
	1062)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		copy_rtx (operand2),
		gen_rtx_SUBREG (SImode,
	copy_rtx (operand3),
	4),
		copy_rtx (operand4)),
	1062))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9249 */
rtx
gen_mve_viwdupq_wb_uv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand2,
		gen_rtx_SUBREG (SImode,
	operand3,
	4),
		operand4),
	1062)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		copy_rtx (operand2),
		gen_rtx_SUBREG (SImode,
	copy_rtx (operand3),
	4),
		copy_rtx (operand4)),
	1062))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9249 */
rtx
gen_mve_viwdupq_wb_uv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		gen_rtx_SUBREG (SImode,
	operand3,
	4),
		operand4),
	1062)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		copy_rtx (operand2),
		gen_rtx_SUBREG (SImode,
	copy_rtx (operand3),
	4),
		copy_rtx (operand4)),
	1062))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9307 */
rtx
gen_mve_viwdupq_m_wb_uv16qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (5,
		operand2,
		operand3,
		gen_rtx_SUBREG (SImode,
	operand4,
	4),
		operand5,
		operand6),
	1063)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (5,
		copy_rtx (operand2),
		copy_rtx (operand3),
		gen_rtx_SUBREG (SImode,
	copy_rtx (operand4),
	4),
		copy_rtx (operand5),
		copy_rtx (operand6)),
	1063))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9307 */
rtx
gen_mve_viwdupq_m_wb_uv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (5,
		operand2,
		operand3,
		gen_rtx_SUBREG (SImode,
	operand4,
	4),
		operand5,
		operand6),
	1063)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (5,
		copy_rtx (operand2),
		copy_rtx (operand3),
		gen_rtx_SUBREG (SImode,
	copy_rtx (operand4),
	4),
		copy_rtx (operand5),
		copy_rtx (operand6)),
	1063))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9307 */
rtx
gen_mve_viwdupq_m_wb_uv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (5,
		operand2,
		operand3,
		gen_rtx_SUBREG (SImode,
	operand4,
	4),
		operand5,
		operand6),
	1063)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (5,
		copy_rtx (operand2),
		copy_rtx (operand3),
		gen_rtx_SUBREG (SImode,
	copy_rtx (operand4),
	4),
		copy_rtx (operand5),
		copy_rtx (operand6)),
	1063))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9331 */
rtx
gen_mve_vstrwq_scatter_base_wb_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1064)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	1064))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9331 */
rtx
gen_mve_vstrwq_scatter_base_wb_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1065)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	1065))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9356 */
rtx
gen_mve_vstrwq_scatter_base_wb_p_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	1064)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	1064))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9356 */
rtx
gen_mve_vstrwq_scatter_base_wb_p_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	1065)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	1065))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9382 */
rtx
gen_mve_vstrwq_scatter_base_wb_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1068)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	1068))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9407 */
rtx
gen_mve_vstrwq_scatter_base_wb_p_fv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	1068)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	1068))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9433 */
rtx
gen_mve_vstrdq_scatter_base_wb_sv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1070)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	1070))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9433 */
rtx
gen_mve_vstrdq_scatter_base_wb_uv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	1071)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	1071))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9458 */
rtx
gen_mve_vstrdq_scatter_base_wb_p_sv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	1070)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	1070))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9458 */
rtx
gen_mve_vstrdq_scatter_base_wb_p_uv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	1071)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	1071))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9512 */
rtx
gen_mve_vldrwq_gather_base_wb_sv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	1066)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		copy_rtx (operand2),
		copy_rtx (operand3)),
	1066))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9512 */
rtx
gen_mve_vldrwq_gather_base_wb_uv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	1067)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		copy_rtx (operand2),
		copy_rtx (operand3)),
	1067))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9567 */
rtx
gen_mve_vldrwq_gather_base_wb_z_sv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	1066)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		copy_rtx (operand2),
		copy_rtx (operand3)),
	1066))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9567 */
rtx
gen_mve_vldrwq_gather_base_wb_z_uv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	1067)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		copy_rtx (operand2),
		copy_rtx (operand3)),
	1067))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9620 */
rtx
gen_mve_vldrwq_gather_base_wb_fv4sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	1069)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		copy_rtx (operand2),
		copy_rtx (operand3)),
	1069))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9676 */
rtx
gen_mve_vldrwq_gather_base_wb_z_fv4sf_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	1069)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		copy_rtx (operand2),
		copy_rtx (operand3)),
	1069))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9730 */
rtx
gen_mve_vldrdq_gather_base_wb_sv2di_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	1072)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		copy_rtx (operand2),
		copy_rtx (operand3)),
	1072))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9730 */
rtx
gen_mve_vldrdq_gather_base_wb_uv2di_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	1073)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		copy_rtx (operand2),
		copy_rtx (operand3)),
	1073))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9783 */
rtx
gen_get_fpscr_nzcvqc (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		gen_rtx_REG (SImode,
	101)),
	120));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9790 */
rtx
gen_set_fpscr_nzcvqc (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_REG (SImode,
	101),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		operand0),
	29));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9801 */
rtx
gen_mve_vldrdq_gather_base_wb_z_sv2di_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (4,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	1072)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		copy_rtx (operand2),
		copy_rtx (operand3)),
	1072))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9801 */
rtx
gen_mve_vldrdq_gather_base_wb_z_uv2di_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (4,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	1073)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		copy_rtx (operand2),
		copy_rtx (operand3)),
	1073))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9825 */
rtx
gen_mve_vadciq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	1087)),
		gen_rtx_SET (gen_rtx_REG (SImode,
	101),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		const0_rtx),
	1087))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9825 */
rtx
gen_mve_vadciq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	1089)),
		gen_rtx_SET (gen_rtx_REG (SImode,
	101),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		const0_rtx),
	1089))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9844 */
rtx
gen_mve_vadciq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1086)),
		gen_rtx_SET (gen_rtx_REG (SImode,
	101),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		const0_rtx),
	1086))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9844 */
rtx
gen_mve_vadciq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1088)),
		gen_rtx_SET (gen_rtx_REG (SImode,
	101),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		const0_rtx),
	1088))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9861 */
rtx
gen_mve_vadcq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	1075)),
		gen_rtx_SET (gen_rtx_REG (SImode,
	101),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		gen_rtx_REG (SImode,
	101)),
	1075))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9861 */
rtx
gen_mve_vadcq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	1077)),
		gen_rtx_SET (gen_rtx_REG (SImode,
	101),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		gen_rtx_REG (SImode,
	101)),
	1077))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9880 */
rtx
gen_mve_vadcq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1074)),
		gen_rtx_SET (gen_rtx_REG (SImode,
	101),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		gen_rtx_REG (SImode,
	101)),
	1074))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9880 */
rtx
gen_mve_vadcq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1076)),
		gen_rtx_SET (gen_rtx_REG (SImode,
	101),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		gen_rtx_REG (SImode,
	101)),
	1076))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9898 */
rtx
gen_mve_vsbciq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	1080)),
		gen_rtx_SET (gen_rtx_REG (SImode,
	101),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		const0_rtx),
	1080))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9898 */
rtx
gen_mve_vsbciq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	1081)),
		gen_rtx_SET (gen_rtx_REG (SImode,
	101),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		const0_rtx),
	1081))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9917 */
rtx
gen_mve_vsbciq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1078)),
		gen_rtx_SET (gen_rtx_REG (SImode,
	101),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		const0_rtx),
	1078))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9917 */
rtx
gen_mve_vsbciq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1079)),
		gen_rtx_SET (gen_rtx_REG (SImode,
	101),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		const0_rtx),
	1079))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9934 */
rtx
gen_mve_vsbcq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	1084)),
		gen_rtx_SET (gen_rtx_REG (SImode,
	101),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		gen_rtx_REG (SImode,
	101)),
	1084))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9934 */
rtx
gen_mve_vsbcq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	1085)),
		gen_rtx_SET (gen_rtx_REG (SImode,
	101),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		gen_rtx_REG (SImode,
	101)),
	1085))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9953 */
rtx
gen_mve_vsbcq_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1082)),
		gen_rtx_SET (gen_rtx_REG (SImode,
	101),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		gen_rtx_REG (SImode,
	101)),
	1082))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9953 */
rtx
gen_mve_vsbcq_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1083)),
		gen_rtx_SET (gen_rtx_REG (SImode,
	101),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		gen_rtx_REG (SImode,
	101)),
	1083))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9970 */
rtx
gen_mve_vst2qv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	1092));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9970 */
rtx
gen_mve_vst2qv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	1092));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9970 */
rtx
gen_mve_vst2qv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	1092));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9970 */
rtx
gen_mve_vst2qv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	1092));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9970 */
rtx
gen_mve_vst2qv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	1092));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9998 */
rtx
gen_mve_vld2qv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	1090));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9998 */
rtx
gen_mve_vld2qv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	1090));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9998 */
rtx
gen_mve_vld2qv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	1090));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9998 */
rtx
gen_mve_vld2qv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	1090));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9998 */
rtx
gen_mve_vld2qv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	1090));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10026 */
rtx
gen_mve_vld4qv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	1091));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10026 */
rtx
gen_mve_vld4qv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	1091));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10026 */
rtx
gen_mve_vld4qv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	1091));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10026 */
rtx
gen_mve_vld4qv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	1091));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10026 */
rtx
gen_mve_vld4qv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (XImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	1091));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10057 */
rtx
gen_mve_vec_extractv16qiqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10057 */
rtx
gen_mve_vec_extractv8hihi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10057 */
rtx
gen_mve_vec_extractv4sisi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10057 */
rtx
gen_mve_vec_extractv8hfhf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (HFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10057 */
rtx
gen_mve_vec_extractv4sfsf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10075 */
rtx
gen_mve_vec_extractv2didi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (DImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10134 */
rtx
gen_mve_vec_setv16qi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V16QImode,
	gen_rtx_VEC_DUPLICATE (V16QImode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10134 */
rtx
gen_mve_vec_setv8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V8HImode,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10134 */
rtx
gen_mve_vec_setv8hf_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V8HFmode,
	gen_rtx_VEC_DUPLICATE (V8HFmode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10134 */
rtx
gen_mve_vec_setv4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V4SImode,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10134 */
rtx
gen_mve_vec_setv4sf_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10153 */
rtx
gen_mve_vec_setv2di_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V2DImode,
	gen_rtx_VEC_DUPLICATE (V2DImode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10176 */
rtx
gen_mve_uqrshll_sat64_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1105));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10176 */
rtx
gen_mve_uqrshll_sat48_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1106));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10188 */
rtx
gen_mve_sqrshrl_sat64_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1107));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10188 */
rtx
gen_mve_sqrshrl_sat48_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1108));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10200 */
rtx
gen_mve_uqrshl_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1104));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10212 */
rtx
gen_mve_sqrshr_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1103));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10224 */
rtx
gen_mve_uqshll_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_ASHIFT (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10235 */
rtx
gen_mve_urshrl_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1102));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10247 */
rtx
gen_mve_uqshl_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_ASHIFT (SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10258 */
rtx
gen_mve_urshr_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1101));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10270 */
rtx
gen_mve_sqshl_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10281 */
rtx
gen_mve_srshr_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1100));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10293 */
rtx
gen_mve_srshrl_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	1099));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10305 */
rtx
gen_mve_sqshll_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10348 */
rtx
gen_mve_vshlcq_m_sv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand2,
		operand3,
		operand4,
		operand5),
	1094)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		copy_rtx (operand2),
		copy_rtx (operand3),
		copy_rtx (operand4),
		copy_rtx (operand5)),
	1094))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10348 */
rtx
gen_mve_vshlcq_m_uv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand2,
		operand3,
		operand4,
		operand5),
	1093)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		copy_rtx (operand2),
		copy_rtx (operand3),
		copy_rtx (operand4),
		copy_rtx (operand5)),
	1093))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10348 */
rtx
gen_mve_vshlcq_m_sv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand2,
		operand3,
		operand4,
		operand5),
	1094)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		copy_rtx (operand2),
		copy_rtx (operand3),
		copy_rtx (operand4),
		copy_rtx (operand5)),
	1094))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10348 */
rtx
gen_mve_vshlcq_m_uv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (4,
		operand2,
		operand3,
		operand4,
		operand5),
	1093)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		copy_rtx (operand2),
		copy_rtx (operand3),
		copy_rtx (operand4),
		copy_rtx (operand5)),
	1093))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10348 */
rtx
gen_mve_vshlcq_m_sv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand2,
		operand3,
		operand4,
		operand5),
	1094)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		copy_rtx (operand2),
		copy_rtx (operand3),
		copy_rtx (operand4),
		copy_rtx (operand5)),
	1094))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10348 */
rtx
gen_mve_vshlcq_m_uv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand2,
		operand3,
		operand4,
		operand5),
	1093)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (4,
		copy_rtx (operand2),
		copy_rtx (operand3),
		copy_rtx (operand4),
		copy_rtx (operand5)),
	1093))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10369 */
rtx
gen_arm_vcx1qv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	104));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10379 */
rtx
gen_arm_vcx1qav16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	105));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10390 */
rtx
gen_arm_vcx2qv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	104));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10401 */
rtx
gen_arm_vcx2qav16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	105));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10413 */
rtx
gen_arm_vcx3qv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	104));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10425 */
rtx
gen_arm_vcx3qav16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (5,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5),
	105));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10438 */
rtx
gen_arm_vcx1q_p_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	104));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10438 */
rtx
gen_arm_vcx1qa_p_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	105));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10451 */
rtx
gen_arm_vcx2q_p_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (5,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5),
	104));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10451 */
rtx
gen_arm_vcx2qa_p_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (5,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5),
	105));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10465 */
rtx
gen_arm_vcx3q_p_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (6,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5,
		operand6),
	104));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10465 */
rtx
gen_arm_vcx3qa_p_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (6,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5,
		operand6),
	105));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:477 */
rtx
gen_adddi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 484 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  if (TARGET_THUMB1)
    {
      if (!REG_P (operands[2]))
	operands[2] = force_reg (DImode, operands[2]);
    }
  else
    {
      rtx lo_result, hi_result, lo_dest, hi_dest;
      rtx lo_op1, hi_op1, lo_op2, hi_op2;
      arm_decompose_di_binop (operands[1], operands[2], &lo_op1, &hi_op1,
			      &lo_op2, &hi_op2);
      lo_result = lo_dest = gen_lowpart (SImode, operands[0]);
      hi_result = hi_dest = gen_highpart (SImode, operands[0]);

      if (lo_op2 == const0_rtx)
	{
	  lo_dest = lo_op1;
	  if (!arm_add_operand (hi_op2, SImode))
	    hi_op2 = force_reg (SImode, hi_op2);
	  /* Assume hi_op2 won't also be zero.  */
	  emit_insn (gen_addsi3 (hi_dest, hi_op1, hi_op2));
	}
      else
	{
	  if (!arm_add_operand (lo_op2, SImode))
	    lo_op2 = force_reg (SImode, lo_op2);
	  if (!arm_not_operand (hi_op2, SImode))
	    hi_op2 = force_reg (SImode, hi_op2);

	  emit_insn (gen_addsi3_compare_op1 (lo_dest, lo_op1, lo_op2));
	  rtx carry = gen_rtx_LTU (SImode, gen_rtx_REG (CC_Cmode, CC_REGNUM),
				   const0_rtx);
	  if (hi_op2 == const0_rtx)
	    emit_insn (gen_add0si3_carryin (hi_dest, hi_op1, carry));
	  else
	    emit_insn (gen_addsi3_carryin (hi_dest, hi_op1, hi_op2, carry));
	}

      if (lo_result != lo_dest)
	emit_move_insn (lo_result, lo_dest);
      if (hi_result != hi_dest)
	emit_move_insn (gen_highpart (SImode, operands[0]), hi_dest);
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	operand2)),
		gen_hard_reg_clobber (CCmode, 100))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:532 */
rtx
gen_addvsi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 538 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  if (CONST_INT_P (operands[2]))
    emit_insn (gen_addsi3_compareV_imm (operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_addsi3_compareV_reg (operands[0], operands[1], operands[2]));
  arm_gen_unlikely_cbranch (NE, CC_Vmode, operands[3]);

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:548 */
rtx
gen_addvdi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 554 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  rtx lo_result, hi_result;
  rtx lo_op1, hi_op1, lo_op2, hi_op2;
  arm_decompose_di_binop (operands[1], operands[2], &lo_op1, &hi_op1,
			  &lo_op2, &hi_op2);
  lo_result = gen_lowpart (SImode, operands[0]);
  hi_result = gen_highpart (SImode, operands[0]);

  if (lo_op2 == const0_rtx)
    {
      emit_move_insn (lo_result, lo_op1);
      if (!arm_add_operand (hi_op2, SImode))
	hi_op2 = force_reg (SImode, hi_op2);

      emit_insn (gen_addvsi4 (hi_result, hi_op1, hi_op2, operands[3]));
    }
  else
    {
      if (!arm_add_operand (lo_op2, SImode))
	lo_op2 = force_reg (SImode, lo_op2);
      if (!arm_not_operand (hi_op2, SImode))
	hi_op2 = force_reg (SImode, hi_op2);

      emit_insn (gen_addsi3_compare_op1 (lo_result, lo_op1, lo_op2));

      if (hi_op2 == const0_rtx)
        emit_insn (gen_addsi3_cin_vout_0 (hi_result, hi_op1));
      else if (CONST_INT_P (hi_op2))
        emit_insn (gen_addsi3_cin_vout_imm (hi_result, hi_op1, hi_op2));
      else
        emit_insn (gen_addsi3_cin_vout_reg (hi_result, hi_op1, hi_op2));

      arm_gen_unlikely_cbranch (NE, CC_Vmode, operands[3]);
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:592 */
rtx
gen_addsi3_cin_vout_reg (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 606 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    operands[3] = gen_rtx_REG (CC_Vmode, CC_REGNUM);
    rtx ccin = gen_rtx_REG (CC_Cmode, CC_REGNUM);
    operands[4] = gen_rtx_LTU (DImode, ccin, const0_rtx);
    operands[5] = gen_rtx_LTU (SImode, ccin, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand3,
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_PLUS (DImode,
	gen_rtx_PLUS (DImode,
	operand4,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1)),
	gen_rtx_SIGN_EXTEND (DImode,
	operand2)),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_PLUS (SImode,
	gen_rtx_PLUS (SImode,
	operand5,
	copy_rtx (operand1)),
	copy_rtx (operand2))))),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand5),
	copy_rtx (operand1)),
	copy_rtx (operand2))))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:638 */
rtx
gen_addsi3_cin_vout_imm (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 652 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    operands[3] = gen_rtx_REG (CC_Vmode, CC_REGNUM);
    rtx ccin = gen_rtx_REG (CC_Cmode, CC_REGNUM);
    operands[4] = gen_rtx_LTU (DImode, ccin, const0_rtx);
    operands[5] = gen_rtx_LTU (SImode, ccin, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand3,
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_PLUS (DImode,
	gen_rtx_PLUS (DImode,
	operand4,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1)),
	operand2),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_PLUS (SImode,
	gen_rtx_PLUS (SImode,
	operand5,
	copy_rtx (operand1)),
	copy_rtx (operand2))))),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand5),
	copy_rtx (operand1)),
	copy_rtx (operand2))))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:682 */
rtx
gen_addsi3_cin_vout_0 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 692 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    operands[2] = gen_rtx_REG (CC_Vmode, CC_REGNUM);
    rtx ccin = gen_rtx_REG (CC_Cmode, CC_REGNUM);
    operands[3] = gen_rtx_LTU (DImode, ccin, const0_rtx);
    operands[4] = gen_rtx_LTU (SImode, ccin, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand2,
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_PLUS (DImode,
	operand3,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1)),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_PLUS (SImode,
	operand4,
	copy_rtx (operand1))))),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand4),
	copy_rtx (operand1))))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:716 */
rtx
gen_uaddvsi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 722 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  emit_insn (gen_addsi3_compare_op1 (operands[0], operands[1], operands[2]));
  arm_gen_unlikely_cbranch (LTU, CC_Cmode, operands[3]);

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:729 */
rtx
gen_uaddvdi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 735 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  rtx lo_result, hi_result;
  rtx lo_op1, hi_op1, lo_op2, hi_op2;
  arm_decompose_di_binop (operands[1], operands[2], &lo_op1, &hi_op1,
			  &lo_op2, &hi_op2);
  lo_result = gen_lowpart (SImode, operands[0]);
  hi_result = gen_highpart (SImode, operands[0]);

  if (lo_op2 == const0_rtx)
    {
      emit_move_insn (lo_result, lo_op1);
      if (!arm_add_operand (hi_op2, SImode))
	hi_op2 = force_reg (SImode, hi_op2);

      emit_insn (gen_uaddvsi4 (hi_result, hi_op1, hi_op2, operands[3]));
    }
  else
    {
      if (!arm_add_operand (lo_op2, SImode))
	lo_op2 = force_reg (SImode, lo_op2);
      if (!arm_not_operand (hi_op2, SImode))
	hi_op2 = force_reg (SImode, hi_op2);

      emit_insn (gen_addsi3_compare_op1 (lo_result, lo_op1, lo_op2));

      if (hi_op2 == const0_rtx)
        emit_insn (gen_addsi3_cin_cout_0 (hi_result, hi_op1));
      else if (CONST_INT_P (hi_op2))
        emit_insn (gen_addsi3_cin_cout_imm (hi_result, hi_op1, hi_op2));
      else
        emit_insn (gen_addsi3_cin_cout_reg (hi_result, hi_op1, hi_op2));

      arm_gen_unlikely_cbranch (GEU, CC_ADCmode, operands[3]);
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:773 */
rtx
gen_addsi3_cin_cout_reg (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 786 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    operands[3] = gen_rtx_REG (CC_ADCmode, CC_REGNUM);
    rtx ccin = gen_rtx_REG (CC_Cmode, CC_REGNUM);
    operands[4] = gen_rtx_LTU (DImode, ccin, const0_rtx);
    operands[5] = gen_rtx_LTU (SImode, ccin, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand3,
	gen_rtx_COMPARE (CC_ADCmode,
	gen_rtx_PLUS (DImode,
	gen_rtx_PLUS (DImode,
	operand4,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1)),
	gen_rtx_ZERO_EXTEND (DImode,
	operand2)),
	GEN_INT (4294967296L))),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_PLUS (SImode,
	operand5,
	copy_rtx (operand1)),
	copy_rtx (operand2))))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:816 */
rtx
gen_addsi3_cin_cout_imm (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[7];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    operands[3] = gen_rtx_REG (CC_ADCmode, CC_REGNUM);
    rtx ccin = gen_rtx_REG (CC_Cmode, CC_REGNUM);
    operands[4] = gen_rtx_LTU (DImode, ccin, const0_rtx);
    operands[5] = gen_rtx_LTU (SImode, ccin, const0_rtx);
    operands[6] = GEN_INT (UINTVAL (operands[2]) & 0xffffffff);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
    operand6 = operands[6];
    (void) operand6;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand3,
	gen_rtx_COMPARE (CC_ADCmode,
	gen_rtx_PLUS (DImode,
	gen_rtx_PLUS (DImode,
	operand4,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1)),
	operand6),
	GEN_INT (4294967296L))),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_PLUS (SImode,
	operand5,
	copy_rtx (operand1)),
	operand2)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:859 */
rtx
gen_addsi3_cin_cout_0 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 869 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    operands[2] = gen_rtx_REG (CC_ADCmode, CC_REGNUM);
    rtx ccin = gen_rtx_REG (CC_Cmode, CC_REGNUM);
    operands[3] = gen_rtx_LTU (DImode, ccin, const0_rtx);
    operands[4] = gen_rtx_LTU (SImode, ccin, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand2,
	gen_rtx_COMPARE (CC_ADCmode,
	gen_rtx_PLUS (DImode,
	operand3,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1)),
	GEN_INT (4294967296L))),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	operand4,
	copy_rtx (operand1))))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:891 */
rtx
gen_addsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 896 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  if (TARGET_32BIT && CONST_INT_P (operands[2]))
    {
      arm_split_constant (PLUS, SImode, NULL_RTX,
	                  INTVAL (operands[2]), operands[0], operands[1],
			  optimize && can_create_pseudo_p ());
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:909 */
extern rtx_insn *gen_peephole2_1 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_1 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[3] = peep2_find_free_register (0, 0, "r", SImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_1 (arm.md:909)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 920 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	operand2));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	operand1,
	copy_rtx (operand3))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:926 */
extern rtx_insn *gen_split_1 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1 (arm.md:926)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 953 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  arm_split_constant (PLUS, SImode, curr_insn,
	              INTVAL (operands[2]), operands[0],
		      operands[1], 0);
  DONE;
  
#undef DONE
#undef FAIL
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	const0_rtx));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1065 */
extern rtx_insn *gen_peephole2_2 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_2 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[2] = peep2_find_free_register (0, 0, "l", SImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_2 (arm.md:1065)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	100),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_PLUS (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand0),
	gen_rtx_SIGN_EXTEND (DImode,
	operand1)),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand0),
	copy_rtx (operand1))))),
		gen_rtx_SET (operand2,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand0),
	copy_rtx (operand1))))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1085 */
extern rtx_insn *gen_peephole2_3 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_3 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_3 (arm.md:1085)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	100),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_PLUS (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand0),
	gen_rtx_SIGN_EXTEND (DImode,
	operand1)),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand0),
	copy_rtx (operand1))))),
		gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_PLUS (SImode,
	copy_rtx (operand0),
	copy_rtx (operand1))))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1191 */
extern rtx_insn *gen_peephole2_4 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_4 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_4 (arm.md:1191)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1212 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
operands[2] = gen_rtx_REG (CCmode, CC_REGNUM);
   operands[3] = gen_rtx_fmt_ee ((GET_CODE (operands[3]) == NE
				  ? GEU : LTU),
				 VOIDmode, 
				 operands[2], const0_rtx);
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand2,
	gen_rtx_COMPARE (CCmode,
	operand1,
	const1_rtx)),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	constm1_rtx)))), true);
  emit_jump_insn (gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), GET_MODE (operand3),
		copy_rtx (operand2),
		const0_rtx),
	operand4,
	operand5)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1397 */
rtx
gen_subvsi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1403 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  if (CONST_INT_P (operands[1]) && CONST_INT_P (operands[2]))
    {
      /* If both operands are constants we can decide the result statically.  */
      wi::overflow_type overflow;
      wide_int val = wi::sub (rtx_mode_t (operands[1], SImode),
			      rtx_mode_t (operands[2], SImode),
			      SIGNED, &overflow);
      emit_move_insn (operands[0], GEN_INT (val.to_shwi ()));
      if (overflow != wi::OVF_NONE)
	emit_jump_insn (gen_jump (operands[3]));
      DONE;
    }
  else if (CONST_INT_P (operands[2]))
    {
      operands[2] = GEN_INT (-INTVAL (operands[2]));
      /* Special case for INT_MIN.  */
      if (INTVAL (operands[2]) == 0x80000000)
	emit_insn (gen_subvsi3_intmin (operands[0], operands[1]));
      else
	emit_insn (gen_addsi3_compareV_imm (operands[0], operands[1],
					  operands[2]));
    }
  else if (CONST_INT_P (operands[1]))
    emit_insn (gen_subvsi3_imm1 (operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_subvsi3 (operands[0], operands[1], operands[2]));

  arm_gen_unlikely_cbranch (NE, CC_Vmode, operands[3]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1435 */
rtx
gen_subvdi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1441 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  rtx lo_result, hi_result;
  rtx lo_op1, hi_op1, lo_op2, hi_op2;
  lo_result = gen_lowpart (SImode, operands[0]);
  hi_result = gen_highpart (SImode, operands[0]);
  machine_mode mode = CCmode;

  if (CONST_INT_P (operands[1]) && CONST_INT_P (operands[2]))
    {
      /* If both operands are constants we can decide the result statically.  */
      wi::overflow_type overflow;
      wide_int val = wi::sub (rtx_mode_t (operands[1], DImode),
			      rtx_mode_t (operands[2], DImode),
			      SIGNED, &overflow);
      emit_move_insn (operands[0], GEN_INT (val.to_shwi ()));
      if (overflow != wi::OVF_NONE)
	emit_jump_insn (gen_jump (operands[3]));
      DONE;
    }
  else if (CONST_INT_P (operands[1]))
    {
      arm_decompose_di_binop (operands[2], operands[1], &lo_op2, &hi_op2,
			      &lo_op1, &hi_op1);
      if (const_ok_for_arm (INTVAL (lo_op1)))
	{
	  emit_insn (gen_rsb_imm_compare (lo_result, lo_op1, lo_op2,
					  GEN_INT (~UINTVAL (lo_op1))));
	  /* We could potentially use RSC here in Arm state, but not
	     in Thumb, so it's probably not worth the effort of handling
	     this.  */
	  hi_op1 = force_reg (SImode, hi_op1);
	  mode = CC_RSBmode;
	  goto highpart;
	}
      operands[1] = force_reg (DImode, operands[1]);
    }

  arm_decompose_di_binop (operands[1], operands[2], &lo_op1, &hi_op1,
			  &lo_op2, &hi_op2);
  if (lo_op2 == const0_rtx)
    {
      emit_move_insn (lo_result, lo_op1);
      if (!arm_add_operand (hi_op2, SImode))
        hi_op2 = force_reg (SImode, hi_op2);
      emit_insn (gen_subvsi4 (hi_result, hi_op1, hi_op2, operands[3]));
      DONE;
    }

  if (CONST_INT_P (lo_op2) && !arm_addimm_operand (lo_op2, SImode))
    lo_op2 = force_reg (SImode, lo_op2);
  if (CONST_INT_P (lo_op2))
    emit_insn (gen_cmpsi2_addneg (lo_result, lo_op1, lo_op2,
				  gen_int_mode (-INTVAL (lo_op2), SImode)));
  else
    emit_insn (gen_subsi3_compare1 (lo_result, lo_op1, lo_op2));

 highpart:
  if (!arm_not_operand (hi_op2, SImode))
    hi_op2 = force_reg (SImode, hi_op2);
  rtx ccreg = gen_rtx_REG (mode, CC_REGNUM);
  if (CONST_INT_P (hi_op2))
    emit_insn (gen_subvsi3_borrow_imm (hi_result, hi_op1, hi_op2,
				       gen_rtx_LTU (SImode, ccreg, const0_rtx),
				       gen_rtx_LTU (DImode, ccreg,
						    const0_rtx)));
  else
    emit_insn (gen_subvsi3_borrow (hi_result, hi_op1, hi_op2,
				   gen_rtx_LTU (SImode, ccreg, const0_rtx),
				   gen_rtx_LTU (DImode, ccreg, const0_rtx)));
  arm_gen_unlikely_cbranch (NE, CC_Vmode, operands[3]);

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1515 */
rtx
gen_usubvsi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1521 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  machine_mode mode = CCmode;
  if (CONST_INT_P (operands[1]) && CONST_INT_P (operands[2]))
    {
      /* If both operands are constants we can decide the result statically.  */
      wi::overflow_type overflow;
      wide_int val = wi::sub (rtx_mode_t (operands[1], SImode),
			      rtx_mode_t (operands[2], SImode),
			      UNSIGNED, &overflow);
      emit_move_insn (operands[0], GEN_INT (val.to_shwi ()));
      if (overflow != wi::OVF_NONE)
	emit_jump_insn (gen_jump (operands[3]));
      DONE;
    }
  else if (CONST_INT_P (operands[2]))
    emit_insn (gen_cmpsi2_addneg (operands[0], operands[1], operands[2],
				  gen_int_mode (-INTVAL (operands[2]),
						SImode)));
  else if (CONST_INT_P (operands[1]))
    {
      mode = CC_RSBmode;
      emit_insn (gen_rsb_imm_compare (operands[0], operands[1], operands[2],
				      GEN_INT (~UINTVAL (operands[1]))));
    }
  else
    emit_insn (gen_subsi3_compare1 (operands[0], operands[1], operands[2]));
  arm_gen_unlikely_cbranch (LTU, mode, operands[3]);

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1552 */
rtx
gen_usubvdi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1558 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  rtx lo_result, hi_result;
  rtx lo_op1, hi_op1, lo_op2, hi_op2;
  lo_result = gen_lowpart (SImode, operands[0]);
  hi_result = gen_highpart (SImode, operands[0]);
  machine_mode mode = CCmode;

  if (CONST_INT_P (operands[1]) && CONST_INT_P (operands[2]))
    {
      /* If both operands are constants we can decide the result statically.  */
      wi::overflow_type overflow;
      wide_int val = wi::sub (rtx_mode_t (operands[1], DImode),
			      rtx_mode_t (operands[2], DImode),
			      UNSIGNED, &overflow);
      emit_move_insn (operands[0], GEN_INT (val.to_shwi ()));
      if (overflow != wi::OVF_NONE)
	emit_jump_insn (gen_jump (operands[3]));
      DONE;
    }
  else if (CONST_INT_P (operands[1]))
    {
      arm_decompose_di_binop (operands[2], operands[1], &lo_op2, &hi_op2,
			      &lo_op1, &hi_op1);
      if (const_ok_for_arm (INTVAL (lo_op1)))
	{
	  emit_insn (gen_rsb_imm_compare (lo_result, lo_op1, lo_op2,
					  GEN_INT (~UINTVAL (lo_op1))));
	  /* We could potentially use RSC here in Arm state, but not
	     in Thumb, so it's probably not worth the effort of handling
	     this.  */
	  hi_op1 = force_reg (SImode, hi_op1);
	  mode = CC_RSBmode;
	  goto highpart;
	}
      operands[1] = force_reg (DImode, operands[1]);
    }

  arm_decompose_di_binop (operands[1], operands[2], &lo_op1, &hi_op1,
			  &lo_op2, &hi_op2);
  if (lo_op2 == const0_rtx)
    {
      emit_move_insn (lo_result, lo_op1);
      if (!arm_add_operand (hi_op2, SImode))
        hi_op2 = force_reg (SImode, hi_op2);
      emit_insn (gen_usubvsi4 (hi_result, hi_op1, hi_op2, operands[3]));
      DONE;
    }

  if (CONST_INT_P (lo_op2) && !arm_addimm_operand (lo_op2, SImode))
    lo_op2 = force_reg (SImode, lo_op2);
  if (CONST_INT_P (lo_op2))
    emit_insn (gen_cmpsi2_addneg (lo_result, lo_op1, lo_op2,
				  gen_int_mode (-INTVAL (lo_op2), SImode)));
  else
    emit_insn (gen_subsi3_compare1 (lo_result, lo_op1, lo_op2));

 highpart:
  if (!arm_not_operand (hi_op2, SImode))
    hi_op2 = force_reg (SImode, hi_op2);
  rtx ccreg = gen_rtx_REG (mode, CC_REGNUM);
  if (CONST_INT_P (hi_op2))
    emit_insn (gen_usubvsi3_borrow_imm (hi_result, hi_op1, hi_op2,
					GEN_INT (UINTVAL (hi_op2) & 0xffffffff),
					gen_rtx_LTU (SImode, ccreg, const0_rtx),
					gen_rtx_LTU (DImode, ccreg,
						     const0_rtx)));
  else
    emit_insn (gen_usubvsi3_borrow (hi_result, hi_op1, hi_op2,
				    gen_rtx_LTU (SImode, ccreg, const0_rtx),
				    gen_rtx_LTU (DImode, ccreg, const0_rtx)));
  arm_gen_unlikely_cbranch (LTU, CC_Bmode, operands[3]);

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1875 */
extern rtx_insn *gen_split_2 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2 (arm.md:1875)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1884 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[1] = GEN_INT (~(INTVAL (operands[1]) - 1));

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	operand1));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NOT (SImode,
	gen_rtx_ASHIFT (SImode,
	copy_rtx (operand3),
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1888 */
rtx
gen_addsf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1893 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"


#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (SFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1896 */
rtx
gen_adddf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1901 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"


#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (DFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1904 */
rtx
gen_subdi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1911 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  if (TARGET_THUMB1)
    {
      if (!REG_P (operands[1]))
	operands[1] = force_reg (DImode, operands[1]);
    }
  else
    {
      rtx lo_result, hi_result, lo_dest, hi_dest;
      rtx lo_op1, hi_op1, lo_op2, hi_op2;
      rtx condition;

      /* Since operands[1] may be an integer, pass it second, so that
	 any necessary simplifications will be done on the decomposed
	 constant.  */
      arm_decompose_di_binop (operands[2], operands[1], &lo_op2, &hi_op2,
			      &lo_op1, &hi_op1);
      lo_result = lo_dest = gen_lowpart (SImode, operands[0]);
      hi_result = hi_dest = gen_highpart (SImode, operands[0]);

      if (!arm_rhs_operand (lo_op1, SImode))
	lo_op1 = force_reg (SImode, lo_op1);

      if ((TARGET_THUMB2 && ! s_register_operand (hi_op1, SImode))
	  || !arm_rhs_operand (hi_op1, SImode))
	hi_op1 = force_reg (SImode, hi_op1);

      rtx cc_reg;
      if (lo_op1 == const0_rtx)
	{
	  cc_reg = gen_rtx_REG (CC_RSBmode, CC_REGNUM);
	  emit_insn (gen_negsi2_0compare (lo_dest, lo_op2));
	}
      else if (CONST_INT_P (lo_op1))
	{
	  cc_reg = gen_rtx_REG (CC_RSBmode, CC_REGNUM);
	  emit_insn (gen_rsb_imm_compare (lo_dest, lo_op1, lo_op2, 
					  GEN_INT (~UINTVAL (lo_op1))));
	}
      else
	{
	  cc_reg = gen_rtx_REG (CCmode, CC_REGNUM);
	  emit_insn (gen_subsi3_compare (lo_dest, lo_op1, lo_op2));
	}

      condition = gen_rtx_LTU (SImode, cc_reg, const0_rtx);

      if (hi_op1 == const0_rtx)
        emit_insn (gen_negsi2_carryin (hi_dest, hi_op2, condition));
      else
	emit_insn (gen_subsi3_carryin (hi_dest, hi_op1, hi_op2, condition));

      if (lo_result != lo_dest)
	emit_move_insn (lo_result, lo_dest);

      if (hi_result != hi_dest)
	emit_move_insn (hi_result, hi_dest);

      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand1,
	operand2)),
		gen_hard_reg_clobber (CCmode, 100))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:1974 */
rtx
gen_subsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1979 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  if (CONST_INT_P (operands[1]))
    {
      if (TARGET_32BIT)
        {
	  if (DONT_EARLY_SPLIT_CONSTANT (INTVAL (operands[1]), MINUS))
	    operands[1] = force_reg (SImode, operands[1]);
	  else
	    {
	      arm_split_constant (MINUS, SImode, NULL_RTX,
				  INTVAL (operands[1]), operands[0],
				  operands[2],
				  optimize && can_create_pseudo_p ());
	      DONE;
	    }
	}
      else /* TARGET_THUMB1 */
        operands[1] = force_reg (SImode, operands[1]);
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2002 */
extern rtx_insn *gen_split_3 (rtx_insn *, rtx *);
rtx_insn *
gen_split_3 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_3 (arm.md:2002)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2020 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  arm_split_constant (MINUS, SImode, curr_insn,
                      INTVAL (operands[1]), operands[0], operands[2], 0);
  DONE;
  
#undef DONE
#undef FAIL
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	const0_rtx));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2032 */
extern rtx_insn *gen_peephole2_5 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_5 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[3] = peep2_find_free_register (0, 0, "r", SImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_5 (arm.md:2032)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2042 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	operand1));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand3),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2201 */
rtx
gen_subsf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2206 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"


#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (SFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2209 */
rtx
gen_subdf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2214 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"


#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (DFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2220 */
rtx
gen_mulhi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2225 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    rtx result = gen_reg_rtx (SImode);
    emit_insn (gen_mulhisi3 (result, operands[1], operands[2]));
    emit_move_insn (operands[0], gen_lowpart (HImode, result));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2234 */
rtx
gen_mulsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (SImode,
	operand2,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2406 */
rtx
gen_mulsidi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2412 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
      emit_insn (gen_smull (gen_lowpart (SImode, operands[0]),
			       gen_highpart (SImode, operands[0]),
			       operands[1], operands[2]));
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1),
	gen_rtx_SIGN_EXTEND (DImode,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2406 */
rtx
gen_umulsidi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2412 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
      emit_insn (gen_umull (gen_lowpart (SImode, operands[0]),
			       gen_highpart (SImode, operands[0]),
			       operands[1], operands[2]));
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1),
	gen_rtx_ZERO_EXTEND (DImode,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2437 */
rtx
gen_maddsidi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2445 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
      emit_insn (gen_smlal (gen_lowpart (SImode, operands[0]),
			       gen_lowpart (SImode, operands[3]),
			       gen_highpart (SImode, operands[0]),
			       gen_highpart (SImode, operands[3]),
			       operands[1], operands[2]));
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1),
	gen_rtx_SIGN_EXTEND (DImode,
	operand2)),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2437 */
rtx
gen_umaddsidi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2445 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
      emit_insn (gen_umlal (gen_lowpart (SImode, operands[0]),
			       gen_lowpart (SImode, operands[3]),
			       gen_highpart (SImode, operands[0]),
			       gen_highpart (SImode, operands[3]),
			       operands[1], operands[2]));
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1),
	gen_rtx_ZERO_EXTEND (DImode,
	operand2)),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2478 */
rtx
gen_smulsi3_highpart (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (SImode,
	gen_rtx_LSHIFTRT (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1),
	gen_rtx_SIGN_EXTEND (DImode,
	operand2)),
	const_int_rtx[MAX_SAVED_CONST_INT + (32)]))),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2478 */
rtx
gen_umulsi3_highpart (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (SImode,
	gen_rtx_LSHIFTRT (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1),
	gen_rtx_ZERO_EXTEND (DImode,
	operand2)),
	const_int_rtx[MAX_SAVED_CONST_INT + (32)]))),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2560 */
rtx
gen_maddhisi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2568 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    /* If this function reads the Q bit from ACLE intrinsics break up the
       multiplication and accumulation as an overflow during accumulation will
       clobber the Q flag.  */
    if (ARM_Q_BIT_READ)
      {
	rtx tmp = gen_reg_rtx (SImode);
	emit_insn (gen_mulhisi3 (tmp, operands[1], operands[2]));
	emit_insn (gen_addsi3 (operands[0], tmp, operands[3]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_MULT (SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand1),
	gen_rtx_SIGN_EXTEND (SImode,
	operand2)),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2610 */
rtx
gen_arm_smlabb (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2616 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    rtx mult1 = gen_lowpart (HImode, operands[1]);
    rtx mult2 = gen_lowpart (HImode, operands[2]);
    if (ARM_Q_BIT_READ)
      emit_insn (gen_arm_smlabb_setq (operands[0], mult1, mult2, operands[3]));
    else
      emit_insn (gen_maddhisi4 (operands[0], mult1, mult2, operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2658 */
rtx
gen_arm_smlatb (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2664 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    rtx mult2 = gen_lowpart (HImode, operands[2]);
    if (ARM_Q_BIT_READ)
      emit_insn (gen_arm_smlatb_setq (operands[0], operands[1],
				      mult2, operands[3]));
    else
      emit_insn (gen_maddhisi4tb (operands[0], operands[1],
				  mult2, operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2708 */
rtx
gen_arm_smlatt (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2714 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    if (ARM_Q_BIT_READ)
      emit_insn (gen_arm_smlatt_setq (operands[0], operands[1],
				      operands[2], operands[3]));
    else
      emit_insn (gen_maddhisi4tt (operands[0], operands[1],
				  operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2784 */
rtx
gen_arm_smlawb (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2792 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    if (ARM_Q_BIT_READ)
      emit_insn (gen_arm_smlawb_setq_insn (operands[0], operands[1],
					       operands[2], operands[3]));
    else
      emit_insn (gen_arm_smlawb_insn (operands[0], operands[1],
					  operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	79)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2784 */
rtx
gen_arm_smlawt (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2792 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    if (ARM_Q_BIT_READ)
      emit_insn (gen_arm_smlawt_setq_insn (operands[0], operands[1],
					       operands[2], operands[3]));
    else
      emit_insn (gen_arm_smlawt_insn (operands[0], operands[1],
					  operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	80)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2803 */
rtx
gen_mulsf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2808 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"


#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (SFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2811 */
rtx
gen_muldf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2816 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"


#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (DFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2821 */
rtx
gen_divsf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_DIV (SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2828 */
rtx
gen_divdf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_DIV (DFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2840 */
rtx
gen_anddi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2845 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
      rtx low  = simplify_gen_binary (AND, SImode,
				      gen_lowpart (SImode, operands[1]),
				      gen_lowpart (SImode, operands[2]));
      rtx high = simplify_gen_binary (AND, SImode,
				      gen_highpart (SImode, operands[1]),
				      gen_highpart_mode (SImode, DImode,
							 operands[2]));

      emit_insn (gen_rtx_SET (gen_lowpart (SImode, operands[0]), low));
      emit_insn (gen_rtx_SET (gen_highpart (SImode, operands[0]), high));
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (DImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2840 */
rtx
gen_iordi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2845 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
      rtx low  = simplify_gen_binary (IOR, SImode,
				      gen_lowpart (SImode, operands[1]),
				      gen_lowpart (SImode, operands[2]));
      rtx high = simplify_gen_binary (IOR, SImode,
				      gen_highpart (SImode, operands[1]),
				      gen_highpart_mode (SImode, DImode,
							 operands[2]));

      emit_insn (gen_rtx_SET (gen_lowpart (SImode, operands[0]), low));
      emit_insn (gen_rtx_SET (gen_highpart (SImode, operands[0]), high));
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (DImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2840 */
rtx
gen_xordi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2845 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
      rtx low  = simplify_gen_binary (XOR, SImode,
				      gen_lowpart (SImode, operands[1]),
				      gen_lowpart (SImode, operands[2]));
      rtx high = simplify_gen_binary (XOR, SImode,
				      gen_highpart (SImode, operands[1]),
				      gen_highpart_mode (SImode, DImode,
							 operands[2]));

      emit_insn (gen_rtx_SET (gen_lowpart (SImode, operands[0]), low));
      emit_insn (gen_rtx_SET (gen_highpart (SImode, operands[0]), high));
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (DImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2860 */
rtx
gen_one_cmpldi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2864 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
      rtx low  = simplify_gen_unary (NOT, SImode,
				     gen_lowpart (SImode, operands[1]),
				     SImode);
      rtx high = simplify_gen_unary (NOT, SImode,
				     gen_highpart_mode (SImode, DImode,
							operands[1]),
				     SImode);

      emit_insn (gen_rtx_SET (gen_lowpart (SImode, operands[0]), low));
      emit_insn (gen_rtx_SET (gen_highpart (SImode, operands[0]), high));
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NOT (DImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2883 */
extern rtx_insn *gen_split_4 (rtx_insn *, rtx *);
rtx_insn *
gen_split_4 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_4 (arm.md:2883)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2892 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    operands[3] = gen_highpart (SImode, operands[0]);
    operands[0] = gen_lowpart (SImode, operands[0]);
    operands[4] = gen_highpart (SImode, operands[1]);
    operands[1] = gen_lowpart (SImode, operands[1]);
    operands[5] = gen_highpart (SImode, operands[2]);
    operands[2] = gen_lowpart (SImode, operands[2]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand6), SImode,
		operand1,
		operand2)));
  emit_insn (gen_rtx_SET (operand3,
	gen_rtx_fmt_ee (GET_CODE (operand6), SImode,
		operand4,
		operand5)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2905 */
extern rtx_insn *gen_split_5 (rtx_insn *, rtx *);
rtx_insn *
gen_split_5 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_5 (arm.md:2905)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2911 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    operands[2] = gen_highpart (SImode, operands[0]);
    operands[0] = gen_lowpart (SImode, operands[0]);
    operands[3] = gen_highpart (SImode, operands[1]);
    operands[1] = gen_lowpart (SImode, operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NOT (SImode,
	operand1)));
  emit_insn (gen_rtx_SET (operand2,
	gen_rtx_NOT (SImode,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2920 */
rtx
gen_andsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2925 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  if (TARGET_32BIT)
    {
      if (CONST_INT_P (operands[2]))
        {
	  if (INTVAL (operands[2]) == 255 && arm_arch6)
	    {
	      operands[1] = convert_to_mode (QImode, operands[1], 1);
	      emit_insn (gen_thumb2_zero_extendqisi2_v6 (operands[0],
							 operands[1]));
	      DONE;
	    }
	  else if (DONT_EARLY_SPLIT_CONSTANT (INTVAL (operands[2]), AND))
	    operands[2] = force_reg (SImode, operands[2]);
	  else
	    {
	      arm_split_constant (AND, SImode, NULL_RTX,
				  INTVAL (operands[2]), operands[0],
				  operands[1],
				  optimize && can_create_pseudo_p ());

	      DONE;
	    }
        }
    }
  else /* TARGET_THUMB1 */
    {
      if (!CONST_INT_P (operands[2]))
        {
          rtx tmp = force_reg (SImode, operands[2]);
	  if (rtx_equal_p (operands[0], operands[1]))
	    operands[2] = tmp;
	  else
	    {
              operands[2] = operands[1];
              operands[1] = tmp;
	    }
        }
      else
        {
          int i;
	  
          if (((unsigned HOST_WIDE_INT) ~INTVAL (operands[2])) < 256)
  	    {
	      operands[2] = force_reg (SImode,
				       GEN_INT (~INTVAL (operands[2])));
	      
	      emit_insn (gen_thumb1_bicsi3 (operands[0], operands[2], operands[1]));
	      
	      DONE;
	    }

          for (i = 9; i <= 31; i++)
	    {
	      if ((HOST_WIDE_INT_1 << i) - 1 == INTVAL (operands[2]))
	        {
	          emit_insn (gen_extzv (operands[0], operands[1], GEN_INT (i),
			 	        const0_rtx));
	          DONE;
	        }
	      else if ((HOST_WIDE_INT_1 << i) - 1
		       == ~INTVAL (operands[2]))
	        {
	          rtx shift = GEN_INT (i);
	          rtx reg = gen_reg_rtx (SImode);
		
	          emit_insn (gen_lshrsi3 (reg, operands[1], shift));
	          emit_insn (gen_ashlsi3 (operands[0], reg, shift));
		  
	          DONE;
	        }
	    }

          operands[2] = force_reg (SImode, operands[2]);
        }
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3005 */
extern rtx_insn *gen_split_6 (rtx_insn *, rtx *);
rtx_insn *
gen_split_6 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_6 (arm.md:3005)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3026 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  arm_split_constant  (AND, SImode, curr_insn,
	               INTVAL (operands[2]), operands[0], operands[1], 0);
  DONE;
  
#undef DONE
#undef FAIL
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	const0_rtx));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3094 */
extern rtx_insn *gen_split_7 (rtx_insn *, rtx *);
rtx_insn *
gen_split_7 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_7 (arm.md:3094)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3120 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[2] = GEN_INT (((1 << INTVAL (operands[2])) - 1)
			 << INTVAL (operands[3])); 
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	100),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_AND (SImode,
	operand1,
	operand2),
	const0_rtx)),
		gen_rtx_SET (operand0,
	gen_rtx_AND (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2))))), true);
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_IF_THEN_ELSE (SImode,
	gen_rtx_EQ (VOIDmode,
	gen_rtx_REG (CC_NZmode,
	100),
	const0_rtx),
	copy_rtx (operand0),
	const1_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3132 */
extern rtx_insn *gen_split_8 (rtx_insn *, rtx *);
rtx_insn *
gen_split_8 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_8 (arm.md:3132)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3150 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[2] = GEN_INT (32 - INTVAL (operands[2]));
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	100),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_ASHIFT (SImode,
	operand1,
	operand2),
	const0_rtx)),
		gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2))))), true);
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_IF_THEN_ELSE (SImode,
	gen_rtx_EQ (VOIDmode,
	gen_rtx_REG (CC_NZmode,
	100),
	const0_rtx),
	copy_rtx (operand0),
	const1_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3158 */
extern rtx_insn *gen_split_9 (rtx_insn *, rtx *);
rtx_insn *
gen_split_9 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_9 (arm.md:3158)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3188 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[2] = GEN_INT (((1 << INTVAL (operands[2])) - 1)
			 << INTVAL (operands[3])); 
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	100),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_AND (SImode,
	operand1,
	operand2),
	const0_rtx)),
		gen_rtx_SET (operand0,
	gen_rtx_AND (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2))))), true);
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_IF_THEN_ELSE (SImode,
	gen_rtx_EQ (VOIDmode,
	gen_rtx_REG (CC_NZmode,
	100),
	const0_rtx),
	copy_rtx (operand0),
	operand4)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3197 */
extern rtx_insn *gen_split_10 (rtx_insn *, rtx *);
rtx_insn *
gen_split_10 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_10 (arm.md:3197)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3217 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[2] = GEN_INT (32 - INTVAL (operands[2]));
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	100),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_ASHIFT (SImode,
	operand1,
	operand2),
	const0_rtx)),
		gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2))))), true);
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_IF_THEN_ELSE (SImode,
	gen_rtx_EQ (VOIDmode,
	gen_rtx_REG (CC_NZmode,
	100),
	const0_rtx),
	copy_rtx (operand0),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3226 */
extern rtx_insn *gen_split_11 (rtx_insn *, rtx *);
rtx_insn *
gen_split_11 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_11 (arm.md:3226)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3240 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
     HOST_WIDE_INT temp = INTVAL (operands[3]);

     operands[3] = GEN_INT (32 - temp - INTVAL (operands[4]));
     operands[4] = GEN_INT (32 - temp);
   }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand6,
	gen_rtx_ASHIFT (SImode,
	operand2,
	operand3)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), GET_MODE (operand1),
		gen_rtx_LSHIFTRT (SImode,
	copy_rtx (operand6),
	operand4),
		operand5)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3248 */
extern rtx_insn *gen_split_12 (rtx_insn *, rtx *);
rtx_insn *
gen_split_12 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_12 (arm.md:3248)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3262 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
     HOST_WIDE_INT temp = INTVAL (operands[3]);

     operands[3] = GEN_INT (32 - temp - INTVAL (operands[4]));
     operands[4] = GEN_INT (32 - temp);
   }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand6,
	gen_rtx_ASHIFT (SImode,
	operand2,
	operand3)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), GET_MODE (operand1),
		gen_rtx_ASHIFTRT (SImode,
	copy_rtx (operand6),
	operand4),
		operand5)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3279 */
rtx
gen_insv (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3285 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    int start_bit = INTVAL (operands[2]);
    int width = INTVAL (operands[1]);
    HOST_WIDE_INT mask = (HOST_WIDE_INT_1 << width) - 1;
    rtx target, subtarget;

    if (arm_arch_thumb2)
      {
        if (unaligned_access && MEM_P (operands[0])
	    && s_register_operand (operands[3], GET_MODE (operands[3]))
	    && (width == 16 || width == 32) && (start_bit % BITS_PER_UNIT) == 0)
	  {
	    rtx base_addr;

	    if (BYTES_BIG_ENDIAN)
	      start_bit = GET_MODE_BITSIZE (GET_MODE (operands[3])) - width
			  - start_bit;

	    if (width == 32)
	      {
	        base_addr = adjust_address (operands[0], SImode,
					    start_bit / BITS_PER_UNIT);
		emit_insn (gen_unaligned_storesi (base_addr, operands[3]));
	      }
	    else
	      {
	        rtx tmp = gen_reg_rtx (HImode);

	        base_addr = adjust_address (operands[0], HImode,
					    start_bit / BITS_PER_UNIT);
		emit_move_insn (tmp, gen_lowpart (HImode, operands[3]));
		emit_insn (gen_unaligned_storehi (base_addr, tmp));
	      }
	    DONE;
	  }
	else if (s_register_operand (operands[0], GET_MODE (operands[0])))
	  {
	    bool use_bfi = TRUE;

	    if (CONST_INT_P (operands[3]))
	      {
		HOST_WIDE_INT val = INTVAL (operands[3]) & mask;

		if (val == 0)
		  {
		    emit_insn (gen_insv_zero (operands[0], operands[1],
					      operands[2]));
		    DONE;
		  }

		/* See if the set can be done with a single orr instruction.  */
		if (val == mask && const_ok_for_arm (val << start_bit))
		  use_bfi = FALSE;
	      }

	    if (use_bfi)
	      {
		if (!REG_P (operands[3]))
		  operands[3] = force_reg (SImode, operands[3]);

		emit_insn (gen_insv_t2 (operands[0], operands[1], operands[2],
					operands[3]));
		DONE;
	      }
	  }
	else
	  FAIL;
      }

    if (!s_register_operand (operands[0], GET_MODE (operands[0])))
      FAIL;

    target = copy_rtx (operands[0]);
    /* Avoid using a subreg as a subtarget, and avoid writing a paradoxical 
       subreg as the final target.  */
    if (GET_CODE (target) == SUBREG)
      {
	subtarget = gen_reg_rtx (SImode);
	if (GET_MODE_SIZE (GET_MODE (SUBREG_REG (target)))
	    < GET_MODE_SIZE (SImode))
	  target = SUBREG_REG (target);
      }
    else
      subtarget = target;    

    if (CONST_INT_P (operands[3]))
      {
	/* Since we are inserting a known constant, we may be able to
	   reduce the number of bits that we have to clear so that
	   the mask becomes simple.  */
	/* ??? This code does not check to see if the new mask is actually
	   simpler.  It may not be.  */
	rtx op1 = gen_reg_rtx (SImode);
	/* ??? Truncate operand3 to fit in the bitfield.  See comment before
	   start of this pattern.  */
	HOST_WIDE_INT op3_value = mask & INTVAL (operands[3]);
	HOST_WIDE_INT mask2 = ((mask & ~op3_value) << start_bit);

	emit_insn (gen_andsi3 (op1, operands[0],
			       gen_int_mode (~mask2, SImode)));
	emit_insn (gen_iorsi3 (subtarget, op1,
			       gen_int_mode (op3_value << start_bit, SImode)));
      }
    else if (start_bit == 0
	     && !(const_ok_for_arm (mask)
		  || const_ok_for_arm (~mask)))
      {
	/* A Trick, since we are setting the bottom bits in the word,
	   we can shift operand[3] up, operand[0] down, OR them together
	   and rotate the result back again.  This takes 3 insns, and
	   the third might be mergeable into another op.  */
	/* The shift up copes with the possibility that operand[3] is
           wider than the bitfield.  */
	rtx op0 = gen_reg_rtx (SImode);
	rtx op1 = gen_reg_rtx (SImode);

	emit_insn (gen_ashlsi3 (op0, operands[3], GEN_INT (32 - width)));
	emit_insn (gen_lshrsi3 (op1, operands[0], operands[1]));
	emit_insn (gen_iorsi3  (op1, op1, op0));
	emit_insn (gen_rotlsi3 (subtarget, op1, operands[1]));
      }
    else if ((width + start_bit == 32)
	     && !(const_ok_for_arm (mask)
		  || const_ok_for_arm (~mask)))
      {
	/* Similar trick, but slightly less efficient.  */

	rtx op0 = gen_reg_rtx (SImode);
	rtx op1 = gen_reg_rtx (SImode);

	emit_insn (gen_ashlsi3 (op0, operands[3], GEN_INT (32 - width)));
	emit_insn (gen_ashlsi3 (op1, operands[0], operands[1]));
	emit_insn (gen_lshrsi3 (op1, op1, operands[1]));
	emit_insn (gen_iorsi3 (subtarget, op1, op0));
      }
    else
      {
	rtx op0 = gen_int_mode (mask, SImode);
	rtx op1 = gen_reg_rtx (SImode);
	rtx op2 = gen_reg_rtx (SImode);

	if (!(const_ok_for_arm (mask) || const_ok_for_arm (~mask)))
	  {
	    rtx tmp = gen_reg_rtx (SImode);

	    emit_insn (gen_movsi (tmp, op0));
	    op0 = tmp;
	  }

	/* Mask out any bits in operand[3] that are not needed.  */
	   emit_insn (gen_andsi3 (op1, operands[3], op0));

	if (CONST_INT_P (op0)
	    && (const_ok_for_arm (mask << start_bit)
		|| const_ok_for_arm (~(mask << start_bit))))
	  {
	    op0 = gen_int_mode (~(mask << start_bit), SImode);
	    emit_insn (gen_andsi3 (op2, operands[0], op0));
	  }
	else
	  {
	    if (CONST_INT_P (op0))
	      {
		rtx tmp = gen_reg_rtx (SImode);

		emit_insn (gen_movsi (tmp, op0));
		op0 = tmp;
	      }

	    if (start_bit != 0)
	      emit_insn (gen_ashlsi3 (op0, op0, operands[2]));
	    
	    emit_insn (gen_andsi_notsi_si (op2, operands[0], op0));
	  }

	if (start_bit != 0)
          emit_insn (gen_ashlsi3 (op1, op1, operands[2]));

	emit_insn (gen_iorsi3 (subtarget, op1, op2));
      }

    if (subtarget != target)
      {
	/* If TARGET is still a SUBREG, then it must be wider than a word,
	   so we must be careful only to set the subword we were asked to.  */
	if (GET_CODE (target) == SUBREG)
	  emit_move_insn (target, subtarget);
	else
	  emit_move_insn (target, gen_lowpart (GET_MODE (target), subtarget));
      }

    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (gen_rtx_ZERO_EXTRACT (VOIDmode,
	operand0,
	operand1,
	operand2),
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3481 */
extern rtx_insn *gen_split_13 (rtx_insn *, rtx *);
rtx_insn *
gen_split_13 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_13 (arm.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3490 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    /* Convert back to a normal AND operation, so that we can take advantage
       of BIC and AND when appropriate; we'll still emit BFC if that's the
       right thing to do.  */
    unsigned HOST_WIDE_INT width = UINTVAL (operands[1]);
    unsigned HOST_WIDE_INT lsb = UINTVAL (operands[2]);
    unsigned HOST_WIDE_INT mask = (HOST_WIDE_INT_1U << width) - 1;

    operands[1] = gen_int_mode (~(mask << lsb), SImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (SImode,
	copy_rtx (operand0),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3683 */
rtx
gen_iorsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3688 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  if (CONST_INT_P (operands[2]))
    {
      if (TARGET_32BIT)
        {
	  if (DONT_EARLY_SPLIT_CONSTANT (INTVAL (operands[2]), IOR))
	    operands[2] = force_reg (SImode, operands[2]);
	  else
	    {
	      arm_split_constant (IOR, SImode, NULL_RTX,
				  INTVAL (operands[2]), operands[0],
				  operands[1],
				  optimize && can_create_pseudo_p ());
	      DONE;
	    }
	}
      else /* TARGET_THUMB1 */
        {
          rtx tmp = force_reg (SImode, operands[2]);
	  if (rtx_equal_p (operands[0], operands[1]))
	    operands[2] = tmp;
	  else
	    {
              operands[2] = operands[1];
              operands[1] = tmp;
	    }
        }
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3719 */
extern rtx_insn *gen_split_14 (rtx_insn *, rtx *);
rtx_insn *
gen_split_14 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_14 (arm.md:3719)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3735 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  arm_split_constant (IOR, SImode, curr_insn,
                      INTVAL (operands[2]), operands[0], operands[1], 0);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	const0_rtx));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3747 */
extern rtx_insn *gen_peephole2_6 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_6 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[3] = peep2_find_free_register (0, 0, "r", SImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_6 (arm.md:3747)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	operand2));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (SImode,
	operand1,
	copy_rtx (operand3))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3791 */
rtx
gen_xorsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3796 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
if (CONST_INT_P (operands[2]))
    {
      if (TARGET_32BIT)
        {
	  if (DONT_EARLY_SPLIT_CONSTANT (INTVAL (operands[2]), XOR))
	    operands[2] = force_reg (SImode, operands[2]);
	  else
	    {
	      arm_split_constant (XOR, SImode, NULL_RTX,
				  INTVAL (operands[2]), operands[0],
				  operands[1],
				  optimize && can_create_pseudo_p ());
	      DONE;
	    }
	}
      else /* TARGET_THUMB1 */
        {
          rtx tmp = force_reg (SImode, operands[2]);
	  if (rtx_equal_p (operands[0], operands[1]))
	    operands[2] = tmp;
	  else
	    {
              operands[2] = operands[1];
              operands[1] = tmp;
	    }
        }
    }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3825 */
extern rtx_insn *gen_split_15 (rtx_insn *, rtx *);
rtx_insn *
gen_split_15 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_15 (arm.md:3825)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3839 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  arm_split_constant (XOR, SImode, curr_insn,
                      INTVAL (operands[2]), operands[0], operands[1], 0);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	const0_rtx));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3878 */
extern rtx_insn *gen_split_16 (rtx_insn *, rtx *);
rtx_insn *
gen_split_16 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_16 (arm.md:3878)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3888 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand4,
	gen_rtx_AND (SImode,
	gen_rtx_IOR (SImode,
	operand1,
	operand2),
	gen_rtx_NOT (SImode,
	operand3))));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NOT (SImode,
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3891 */
extern rtx_insn *gen_split_17 (rtx_insn *, rtx *);
rtx_insn *
gen_split_17 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_17 (arm.md:3891)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3901 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
     /* If operands[3] is a constant make sure to fold the NOT into it
	to avoid creating a NOT of a CONST_INT.  */
    rtx not_rtx = simplify_gen_unary (NOT, SImode, operands[3], SImode);
    if (CONST_INT_P (not_rtx))
      {
	operands[4] = operands[0];
	operands[5] = not_rtx;
      }
    else
      {
	operands[5] = operands[0];
	operands[4] = not_rtx;
      }
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (SImode,
	operand1,
	operand2)));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_AND (SImode,
	operand4,
	operand5)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3924 */
extern rtx_insn *gen_split_18 (rtx_insn *, rtx *);
rtx_insn *
gen_split_18 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx operand8;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_18 (arm.md:3924)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3946 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[4] = GEN_INT (32 - (INTVAL (operands[3]) + INTVAL (operands[4])));

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  operand8 = operands[8];
  (void) operand8;
  emit_insn (gen_rtx_SET (operand8,
	gen_rtx_fmt_ee (GET_CODE (operand1), GET_MODE (operand1),
		gen_rtx_ASHIFT (SImode,
	operand2,
	operand4),
		operand5)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), GET_MODE (operand1),
		gen_rtx_LSHIFTRT (SImode,
	copy_rtx (operand8),
	operand6),
		operand7)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3950 */
extern rtx_insn *gen_split_19 (rtx_insn *, rtx *);
rtx_insn *
gen_split_19 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx operand8;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_19 (arm.md:3950)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3972 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[4] = GEN_INT (32 - (INTVAL (operands[3]) + INTVAL (operands[4])));

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  operand8 = operands[8];
  (void) operand8;
  emit_insn (gen_rtx_SET (operand8,
	gen_rtx_fmt_ee (GET_CODE (operand1), GET_MODE (operand1),
		gen_rtx_ASHIFT (SImode,
	operand2,
	operand4),
		operand5)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), GET_MODE (operand1),
		gen_rtx_LSHIFTRT (SImode,
	copy_rtx (operand8),
	operand6),
		operand7)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3976 */
extern rtx_insn *gen_split_20 (rtx_insn *, rtx *);
rtx_insn *
gen_split_20 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx operand8;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_20 (arm.md:3976)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3998 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[4] = GEN_INT (32 - (INTVAL (operands[3]) + INTVAL (operands[4])));

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  operand8 = operands[8];
  (void) operand8;
  emit_insn (gen_rtx_SET (operand8,
	gen_rtx_fmt_ee (GET_CODE (operand1), GET_MODE (operand1),
		gen_rtx_ASHIFT (SImode,
	operand2,
	operand4),
		operand5)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), GET_MODE (operand1),
		gen_rtx_ASHIFTRT (SImode,
	copy_rtx (operand8),
	operand6),
		operand7)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4002 */
extern rtx_insn *gen_split_21 (rtx_insn *, rtx *);
rtx_insn *
gen_split_21 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx operand8;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_21 (arm.md:4002)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4024 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[4] = GEN_INT (32 - (INTVAL (operands[3]) + INTVAL (operands[4])));

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  operand8 = operands[8];
  (void) operand8;
  emit_insn (gen_rtx_SET (operand8,
	gen_rtx_fmt_ee (GET_CODE (operand1), GET_MODE (operand1),
		gen_rtx_ASHIFT (SImode,
	operand2,
	operand4),
		operand5)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), GET_MODE (operand1),
		gen_rtx_ASHIFTRT (SImode,
	copy_rtx (operand8),
	operand6),
		operand7)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4031 */
rtx
gen_smaxsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4038 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  if (operands[2] == const0_rtx || operands[2] == constm1_rtx)
    {
      /* No need for a clobber of the condition code register here.  */
      emit_insn (gen_rtx_SET (operands[0],
			      gen_rtx_SMAX (SImode, operands[1],
					    operands[2])));
      DONE;
    }

#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_SMAX (SImode,
	operand1,
	operand2)),
		gen_hard_reg_clobber (CCmode, 100))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4069 */
extern rtx_insn *gen_split_22 (rtx_insn *, rtx *);
rtx_insn *
gen_split_22 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_22 (arm.md:4069)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4085 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand2)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	gen_rtx_GE (SImode,
	gen_rtx_REG (CCmode,
	100),
	const0_rtx),
	copy_rtx (operand1),
	copy_rtx (operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4091 */
rtx
gen_sminsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4098 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  if (operands[2] == const0_rtx)
    {
      /* No need for a clobber of the condition code register here.  */
      emit_insn (gen_rtx_SET (operands[0],
			      gen_rtx_SMIN (SImode, operands[1],
					    operands[2])));
      DONE;
    }

#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_SMIN (SImode,
	operand1,
	operand2)),
		gen_hard_reg_clobber (CCmode, 100))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4119 */
extern rtx_insn *gen_split_23 (rtx_insn *, rtx *);
rtx_insn *
gen_split_23 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_23 (arm.md:4119)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4135 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand2)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	gen_rtx_LT (SImode,
	gen_rtx_REG (CCmode,
	100),
	const0_rtx),
	copy_rtx (operand1),
	copy_rtx (operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4141 */
rtx
gen_umaxsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UMAX (SImode,
	operand1,
	operand2)),
		gen_hard_reg_clobber (CCmode, 100)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4151 */
extern rtx_insn *gen_split_24 (rtx_insn *, rtx *);
rtx_insn *
gen_split_24 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_24 (arm.md:4151)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4168 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand2)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	gen_rtx_GEU (SImode,
	gen_rtx_REG (CCmode,
	100),
	const0_rtx),
	copy_rtx (operand1),
	copy_rtx (operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4174 */
rtx
gen_uminsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UMIN (SImode,
	operand1,
	operand2)),
		gen_hard_reg_clobber (CCmode, 100)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4184 */
extern rtx_insn *gen_split_25 (rtx_insn *, rtx *);
rtx_insn *
gen_split_25 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_25 (arm.md:4184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4201 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand2)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	gen_rtx_LTU (SImode,
	gen_rtx_REG (CCmode,
	100),
	const0_rtx),
	copy_rtx (operand1),
	copy_rtx (operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4279 */
extern rtx_insn *gen_split_26 (rtx_insn *, rtx *);
rtx_insn *
gen_split_26 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_26 (arm.md:4279)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4301 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]),
                                           operands[2], operands[3]);
  enum rtx_code rc = minmax_code (operands[4]);
  operands[4] = gen_rtx_fmt_ee (rc, VOIDmode,
                                operands[2], operands[3]);

  if (mode == CCFPmode || mode == CCFPEmode)
    rc = reverse_condition_maybe_unordered (rc);
  else
    rc = reverse_condition (rc);
  operands[5] = gen_rtx_fmt_ee (rc, SImode, operands[2], operands[3]);
  if (CONST_INT_P (operands[3]))
    operands[6] = plus_constant (SImode, operands[1], -INTVAL (operands[3]));
  else
    operands[6] = gen_rtx_MINUS (SImode, operands[1], operands[3]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_COMPARE (CCmode,
	operand2,
	operand3)));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand4), GET_MODE (operand4),
		gen_rtx_REG (CCmode,
	100),
		const0_rtx),
	gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	operand1,
	copy_rtx (operand2)))));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand5), GET_MODE (operand5),
		gen_rtx_REG (CCmode,
	100),
		const0_rtx),
	gen_rtx_SET (copy_rtx (operand0),
	operand6)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4327 */
rtx
gen_arm_qadd (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4332 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    if (ARM_Q_BIT_READ)
      emit_insn (gen_arm_qadd_setq_insn (operands[0],
					    operands[1], operands[2]));
    else
      emit_insn (gen_arm_qadd_insn (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4327 */
rtx
gen_arm_qsub (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4332 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    if (ARM_Q_BIT_READ)
      emit_insn (gen_arm_qsub_setq_insn (operands[0],
					    operands[1], operands[2]));
    else
      emit_insn (gen_arm_qsub_insn (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4357 */
rtx
gen_arm_ssat (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4362 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    HOST_WIDE_INT val = INTVAL (operands[2]);
    /* The builtin checking code should have ensured the right
       range for the immediate.  */
    gcc_assert (IN_RANGE (val, 1, 32));
    HOST_WIDE_INT upper_bound = (HOST_WIDE_INT_1 << (val - 1)) - 1;
    HOST_WIDE_INT lower_bound = -upper_bound - 1;
    rtx up_rtx = gen_int_mode (upper_bound, SImode);
    rtx lo_rtx = gen_int_mode (lower_bound, SImode);
    if (ARM_Q_BIT_READ)
      emit_insn (gen_satsi_smin_setq (operands[0], lo_rtx,
				      up_rtx, operands[1]));
    else
      emit_insn (gen_satsi_smin (operands[0], lo_rtx, up_rtx, operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4380 */
rtx
gen_arm_usat (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4385 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    HOST_WIDE_INT val = INTVAL (operands[2]);
    /* The builtin checking code should have ensured the right
       range for the immediate.  */
    gcc_assert (IN_RANGE (val, 0, 31));
    HOST_WIDE_INT upper_bound = (HOST_WIDE_INT_1 << val) - 1;
    rtx up_rtx = gen_int_mode (upper_bound, SImode);
    rtx lo_rtx = CONST0_RTX (SImode);
    if (ARM_Q_BIT_READ)
      emit_insn (gen_satsi_smin_setq (operands[0], lo_rtx, up_rtx,
				      operands[1]));
    else
      emit_insn (gen_satsi_smin (operands[0], lo_rtx, up_rtx, operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4422 */
rtx
gen_arm_saturation_occurred (rtx operand0)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[1];
    operands[0] = operand0;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4425 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    rtx apsr = gen_reg_rtx (SImode);
    emit_insn (gen_arm_get_apsr (apsr));
    emit_insn (gen_extzv (operands[0], apsr, CONST1_RTX (SImode),
	       gen_int_mode (27, SImode)));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
  }
  emit (operand0, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4435 */
rtx
gen_arm_set_saturation (rtx operand0)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[1];
    operands[0] = operand0;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4438 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    rtx apsr = gen_reg_rtx (SImode);
    emit_insn (gen_arm_get_apsr (apsr));
    rtx to_insert = gen_reg_rtx (SImode);
    if (CONST_INT_P (operands[0]))
      emit_move_insn (to_insert, operands[0] == CONST0_RTX (SImode)
				 ? CONST0_RTX (SImode) : CONST1_RTX (SImode));
    else
      {
        rtx cmp = gen_rtx_NE (SImode, operands[0], CONST0_RTX (SImode));
        emit_insn (gen_cstoresi4 (to_insert, cmp, operands[0],
				  CONST0_RTX (SImode)));
      }
    emit_insn (gen_insv (apsr, CONST1_RTX (SImode),
	       gen_int_mode (27, SImode), to_insert));
    emit_insn (gen_arm_set_apsr (apsr));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
  }
  emit (operand0, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4580 */
rtx
gen_ashldi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4585 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  if (TARGET_HAVE_MVE && !BYTES_BIG_ENDIAN)
    {
      if (!reg_or_int_operand (operands[2], SImode))
        operands[2] = force_reg (SImode, operands[2]);

      /* Armv8.1-M Mainline double shifts are not expanded.  */
      if (arm_reg_or_long_shift_imm (operands[2], GET_MODE (operands[2]))
	  && (REG_P (operands[2]) || INTVAL(operands[2]) != 32))
        {
	  if (!reg_overlap_mentioned_p(operands[0], operands[1]))
	    emit_insn (gen_movdi (operands[0], operands[1]));

	  emit_insn (gen_thumb2_lsll (operands[0], operands[2]));
	  DONE;
	}
    }

  arm_emit_coreregs_64bit_shift (ASHIFT, operands[0], operands[1],
				 operands[2], gen_reg_rtx (SImode),
				 gen_reg_rtx (SImode));
  DONE;

#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (DImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4609 */
rtx
gen_ashlsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4614 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  if (CONST_INT_P (operands[2])
      && (UINTVAL (operands[2])) > 31)
    {
      emit_insn (gen_movsi (operands[0], const0_rtx));
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4624 */
rtx
gen_ashrdi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4629 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  /* Armv8.1-M Mainline double shifts are not expanded.  */
  if (TARGET_HAVE_MVE && !BYTES_BIG_ENDIAN
      && arm_reg_or_long_shift_imm (operands[2], GET_MODE (operands[2])))
    {
      if (!reg_overlap_mentioned_p(operands[0], operands[1]))
	emit_insn (gen_movdi (operands[0], operands[1]));

      emit_insn (gen_thumb2_asrl (operands[0], operands[2]));
      DONE;
    }

  arm_emit_coreregs_64bit_shift (ASHIFTRT, operands[0], operands[1],
				 operands[2], gen_reg_rtx (SImode),
				 gen_reg_rtx (SImode));
  DONE;

#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (DImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4647 */
rtx
gen_ashrsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4652 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  if (CONST_INT_P (operands[2])
      && UINTVAL (operands[2]) > 31)
    operands[2] = GEN_INT (31);
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4659 */
rtx
gen_lshrdi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4664 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  /* Armv8.1-M Mainline double shifts are not expanded.  */
  if (TARGET_HAVE_MVE && !BYTES_BIG_ENDIAN
    && long_shift_imm (operands[2], GET_MODE (operands[2])))
    {
      if (!reg_overlap_mentioned_p(operands[0], operands[1]))
        emit_insn (gen_movdi (operands[0], operands[1]));

      emit_insn (gen_thumb2_lsrl (operands[0], operands[2]));
      DONE;
    }

  arm_emit_coreregs_64bit_shift (LSHIFTRT, operands[0], operands[1],
				 operands[2], gen_reg_rtx (SImode),
				 gen_reg_rtx (SImode));
  DONE;

#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (DImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4682 */
rtx
gen_lshrsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4687 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  if (CONST_INT_P (operands[2])
      && (UINTVAL (operands[2])) > 31)
    {
      emit_insn (gen_movsi (operands[0], const0_rtx));
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4697 */
rtx
gen_rotlsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4702 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  if (CONST_INT_P (operands[2]))
    operands[2] = GEN_INT ((32 - INTVAL (operands[2])) % 32);
  else
    {
      rtx reg = gen_reg_rtx (SImode);
      emit_insn (gen_subsi3 (reg, GEN_INT (32), operands[2]));
      operands[2] = reg;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ROTATERT (SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4714 */
rtx
gen_rotrsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4719 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  if (TARGET_32BIT)
    {
      if (CONST_INT_P (operands[2])
          && UINTVAL (operands[2]) > 31)
        operands[2] = GEN_INT (INTVAL (operands[2]) % 32);
    }
  else /* TARGET_THUMB1 */
    {
      if (CONST_INT_P (operands [2]))
        operands [2] = force_reg (SImode, operands[2]);
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ROTATERT (SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4824 */
rtx
gen_extzv (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4830 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    HOST_WIDE_INT lshift = 32 - INTVAL (operands[2]) - INTVAL (operands[3]);
    HOST_WIDE_INT rshift = 32 - INTVAL (operands[2]);
    
    if (arm_arch_thumb2)
      {
	HOST_WIDE_INT width = INTVAL (operands[2]);
	HOST_WIDE_INT bitpos = INTVAL (operands[3]);

	if (unaligned_access && MEM_P (operands[1])
	    && (width == 16 || width == 32) && (bitpos % BITS_PER_UNIT) == 0)
	  {
	    rtx base_addr;

	    if (BYTES_BIG_ENDIAN)
	      bitpos = GET_MODE_BITSIZE (GET_MODE (operands[0])) - width
		       - bitpos;

	    if (width == 32)
              {
		base_addr = adjust_address (operands[1], SImode,
					    bitpos / BITS_PER_UNIT);
		emit_insn (gen_unaligned_loadsi (operands[0], base_addr));
              }
	    else
              {
		rtx dest = operands[0];
		rtx tmp = gen_reg_rtx (SImode);

		/* We may get a paradoxical subreg here.  Strip it off.  */
		if (GET_CODE (dest) == SUBREG
		    && GET_MODE (dest) == SImode
		    && GET_MODE (SUBREG_REG (dest)) == HImode)
		  dest = SUBREG_REG (dest);

		if (GET_MODE_BITSIZE (GET_MODE (dest)) != width)
		  FAIL;

		base_addr = adjust_address (operands[1], HImode,
					    bitpos / BITS_PER_UNIT);
		emit_insn (gen_unaligned_loadhiu (tmp, base_addr));
		emit_move_insn (gen_lowpart (SImode, dest), tmp);
	      }
	    DONE;
	  }
	else if (s_register_operand (operands[1], GET_MODE (operands[1])))
	  {
	    emit_insn (gen_extzv_t2 (operands[0], operands[1], operands[2],
				     operands[3]));
	    DONE;
	  }
	else
	  FAIL;
      }
    
    if (!s_register_operand (operands[1], GET_MODE (operands[1])))
      FAIL;

    operands[3] = GEN_INT (rshift);
    
    if (lshift == 0)
      {
        emit_insn (gen_lshrsi3 (operands[0], operands[1], operands[3]));
        DONE;
      }
      
    emit_insn (gen_extzv_t1 (operands[0], operands[1], GEN_INT (lshift),
			     operands[3], gen_reg_rtx (SImode)));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTRACT (VOIDmode,
	operand1,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4905 */
rtx
gen_extzv_t1 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  emit_insn (gen_rtx_SET (operand4,
	gen_rtx_ASHIFT (SImode,
	operand1,
	operand2)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (SImode,
	copy_rtx (operand4),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4915 */
rtx
gen_extv (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4921 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  HOST_WIDE_INT width = INTVAL (operands[2]);
  HOST_WIDE_INT bitpos = INTVAL (operands[3]);

  if (unaligned_access && MEM_P (operands[1]) && (width == 16 || width == 32)
      && (bitpos % BITS_PER_UNIT)  == 0)
    {
      rtx base_addr;
      
      if (BYTES_BIG_ENDIAN)
	bitpos = GET_MODE_BITSIZE (GET_MODE (operands[0])) - width - bitpos;
      
      if (width == 32)
        {
	  base_addr = adjust_address (operands[1], SImode,
				      bitpos / BITS_PER_UNIT);
	  emit_insn (gen_unaligned_loadsi (operands[0], base_addr));
        }
      else
        {
	  rtx dest = operands[0];
	  rtx tmp = gen_reg_rtx (SImode);
	  
	  /* We may get a paradoxical subreg here.  Strip it off.  */
	  if (GET_CODE (dest) == SUBREG
	      && GET_MODE (dest) == SImode
	      && GET_MODE (SUBREG_REG (dest)) == HImode)
	    dest = SUBREG_REG (dest);
	  
	  if (GET_MODE_BITSIZE (GET_MODE (dest)) != width)
	    FAIL;
	  
	  base_addr = adjust_address (operands[1], HImode,
				      bitpos / BITS_PER_UNIT);
	  emit_insn (gen_unaligned_loadhis (tmp, base_addr));
	  emit_move_insn (gen_lowpart (SImode, dest), tmp);
	}

      DONE;
    }
  else if (!s_register_operand (operands[1], GET_MODE (operands[1])))
    FAIL;
  else if (GET_MODE (operands[0]) == SImode
	   && GET_MODE (operands[1]) == SImode)
    {
      emit_insn (gen_extv_regsi (operands[0], operands[1], operands[2],
				 operands[3]));
      DONE;
    }

  FAIL;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTRACT (VOIDmode,
	operand1,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:4976 */
rtx
gen_extv_regsi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4982 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTRACT (SImode,
	operand1,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5144 */
rtx
gen_negvsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5149 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  emit_insn (gen_subvsi4 (operands[0], const0_rtx, operands[1],
			      operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5144 */
rtx
gen_negvdi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5149 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  emit_insn (gen_subvdi4 (operands[0], const0_rtx, operands[1],
			      operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5155 */
rtx
gen_negsi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5206 */
rtx
gen_negsf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5213 */
rtx
gen_negdf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (DFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5224 */
rtx
gen_abssi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5230 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  if (TARGET_THUMB1)
    operands[2] = gen_rtx_SCRATCH (SImode);
  else
    operands[2] = gen_rtx_REG (CCmode, CC_REGNUM);

#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_ABS (SImode,
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	operand2))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5237 */
extern rtx_insn *gen_split_27 (rtx_insn *, rtx *);
rtx_insn *
gen_split_27 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_27 (arm.md:5237)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5245 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
   /* if (which_alternative == 0) */
   if (REGNO(operands[0]) == REGNO(operands[1]))
     {
      /* Emit the pattern:
         cmp\t%0, #0\n\trsblt\t%0, %0, #0
         [(set (reg:CC CC_REGNUM)
               (compare:CC (match_dup 0) (const_int 0)))
          (cond_exec (lt:CC (reg:CC CC_REGNUM) (const_int 0))
                     (set (match_dup 0) (minus:SI (const_int 0) (match_dup 1))))]
      */
      emit_insn (gen_rtx_SET (gen_rtx_REG (CCmode, CC_REGNUM),
                              gen_rtx_COMPARE (CCmode, operands[0], const0_rtx)));
      emit_insn (gen_rtx_COND_EXEC (VOIDmode,
                                    (gen_rtx_LT (SImode,
                                                 gen_rtx_REG (CCmode, CC_REGNUM),
                                                 const0_rtx)),
                                    (gen_rtx_SET (operands[0],
                                                  (gen_rtx_MINUS (SImode,
                                                                  const0_rtx,
                                                                  operands[1]))))));
      DONE;
     }
   else
     {
      /* Emit the pattern:
         alt1: eor%?\t%0, %1, %1, asr #31\n\tsub%?\t%0, %0, %1, asr #31
         [(set (match_dup 0)
               (xor:SI (match_dup 1)
                       (ashiftrt:SI (match_dup 1) (const_int 31))))
          (set (match_dup 0)
               (minus:SI (match_dup 0)
                      (ashiftrt:SI (match_dup 1) (const_int 31))))]
      */
      emit_insn (gen_rtx_SET (operands[0],
                              gen_rtx_XOR (SImode,
                                           gen_rtx_ASHIFTRT (SImode,
                                                             operands[1],
                                                             GEN_INT (31)),
                                           operands[1])));
      emit_insn (gen_rtx_SET (operands[0],
                              gen_rtx_MINUS (SImode,
                                             operands[0],
                                             gen_rtx_ASHIFTRT (SImode,
                                                               operands[1],
                                                               GEN_INT (31)))));
      DONE;
     }
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5301 */
extern rtx_insn *gen_split_28 (rtx_insn *, rtx *);
rtx_insn *
gen_split_28 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_28 (arm.md:5301)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5309 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
   /* if (which_alternative == 0) */
   if (REGNO (operands[0]) == REGNO (operands[1]))
     {
      /* Emit the pattern:
         cmp\t%0, #0\n\trsbgt\t%0, %0, #0
      */
      emit_insn (gen_rtx_SET (gen_rtx_REG (CCmode, CC_REGNUM),
                              gen_rtx_COMPARE (CCmode, operands[0], const0_rtx)));
      emit_insn (gen_rtx_COND_EXEC (VOIDmode,
                                    gen_rtx_GT (SImode,
                                                gen_rtx_REG (CCmode, CC_REGNUM),
                                                const0_rtx),
                                    gen_rtx_SET (operands[0],
                                                 (gen_rtx_MINUS (SImode,
                                                                 const0_rtx,
                                                                 operands[1])))));
     }
   else
     {
      /* Emit the pattern:
         eor%?\t%0, %1, %1, asr #31\n\trsb%?\t%0, %0, %1, asr #31
      */
      emit_insn (gen_rtx_SET (operands[0],
                              gen_rtx_XOR (SImode,
                                           gen_rtx_ASHIFTRT (SImode,
                                                             operands[1],
                                                             GEN_INT (31)),
                                           operands[1])));
      emit_insn (gen_rtx_SET (operands[0],
                              gen_rtx_MINUS (SImode,
                                             gen_rtx_ASHIFTRT (SImode,
                                                               operands[1],
                                                               GEN_INT (31)),
                                             operands[0])));
     }
   DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5354 */
rtx
gen_abssf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5360 */
rtx
gen_absdf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (DFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5366 */
rtx
gen_sqrtsf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SQRT (SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5372 */
rtx
gen_sqrtdf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SQRT (DFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5378 */
rtx
gen_one_cmplsi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5422 */
rtx
gen_floatsihf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5426 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    rtx op1 = gen_reg_rtx (SFmode);
    expand_float (op1, operands[1], 0);
    op1 = convert_to_mode (HFmode, op1, 0);
    emit_move_insn (operands[0], op1);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_FLOAT (HFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5436 */
rtx
gen_floatdihf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5440 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    rtx op1 = gen_reg_rtx (SFmode);
    expand_float (op1, operands[1], 0);
    op1 = convert_to_mode (HFmode, op1, 0);
    emit_move_insn (operands[0], op1);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_FLOAT (HFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5450 */
rtx
gen_floatsisf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5454 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"


#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_FLOAT (SFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5457 */
rtx
gen_floatsidf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5461 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"


#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_FLOAT (DFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5464 */
rtx
gen_fix_trunchfsi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5468 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    rtx op1 = convert_to_mode (SFmode, operands[1], 0);
    expand_fix (operands[0], op1, 0);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_FIX (HFmode,
	operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5476 */
rtx
gen_fix_trunchfdi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5480 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    rtx op1 = convert_to_mode (SFmode, operands[1], 0);
    expand_fix (operands[0], op1, 0);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_FIX (DImode,
	gen_rtx_FIX (HFmode,
	operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5488 */
rtx
gen_fix_truncsfsi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5492 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"


#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_FIX (SFmode,
	operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5495 */
rtx
gen_fix_truncdfsi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5499 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"


#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_FIX (DFmode,
	operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5504 */
rtx
gen_truncdfsf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT_TRUNCATE (SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5519 */
rtx
gen_truncdfhf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5525 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  /* We don't have a direct instruction for this, so we must be in
     an unsafe math mode, and going via SFmode.  */

  if (!(TARGET_32BIT && TARGET_FP16_TO_DOUBLE))
    {
      rtx op1;
      op1 = convert_to_mode (SFmode, operands[1], 0);
      op1 = convert_to_mode (HFmode, op1, 0);
      emit_move_insn (operands[0], op1);
      DONE;
    }
  /* Otherwise, we will pick this up as a single instruction with
     no intermediary rounding.  */
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_FLOAT_TRUNCATE (HFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5544 */
rtx
gen_zero_extendqidi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5548 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    rtx res_lo, res_hi, op0_lo, op0_hi;
    res_lo = gen_lowpart (SImode, operands[0]);
    res_hi = gen_highpart (SImode, operands[0]);
    if (can_create_pseudo_p ())
      {
	op0_lo = QImode == SImode ? operands[1] : gen_reg_rtx (SImode);
	op0_hi = gen_reg_rtx (SImode);
      }
    else
      {
	op0_lo = QImode == SImode ? operands[1] : res_lo;
	op0_hi = res_hi;
      }
    if (QImode != SImode)
      emit_insn (gen_rtx_SET (op0_lo,
			      gen_rtx_ZERO_EXTEND (SImode, operands[1])));
    emit_insn (gen_movsi (op0_hi, const0_rtx));
    if (res_lo != op0_lo)
      emit_move_insn (res_lo, op0_lo);
    if (res_hi != op0_hi)
      emit_move_insn (res_hi, op0_hi);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5544 */
rtx
gen_zero_extendhidi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5548 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    rtx res_lo, res_hi, op0_lo, op0_hi;
    res_lo = gen_lowpart (SImode, operands[0]);
    res_hi = gen_highpart (SImode, operands[0]);
    if (can_create_pseudo_p ())
      {
	op0_lo = HImode == SImode ? operands[1] : gen_reg_rtx (SImode);
	op0_hi = gen_reg_rtx (SImode);
      }
    else
      {
	op0_lo = HImode == SImode ? operands[1] : res_lo;
	op0_hi = res_hi;
      }
    if (HImode != SImode)
      emit_insn (gen_rtx_SET (op0_lo,
			      gen_rtx_ZERO_EXTEND (SImode, operands[1])));
    emit_insn (gen_movsi (op0_hi, const0_rtx));
    if (res_lo != op0_lo)
      emit_move_insn (res_lo, op0_lo);
    if (res_hi != op0_hi)
      emit_move_insn (res_hi, op0_hi);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5544 */
rtx
gen_zero_extendsidi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5548 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    rtx res_lo, res_hi, op0_lo, op0_hi;
    res_lo = gen_lowpart (SImode, operands[0]);
    res_hi = gen_highpart (SImode, operands[0]);
    if (can_create_pseudo_p ())
      {
	op0_lo = SImode == SImode ? operands[1] : gen_reg_rtx (SImode);
	op0_hi = gen_reg_rtx (SImode);
      }
    else
      {
	op0_lo = SImode == SImode ? operands[1] : res_lo;
	op0_hi = res_hi;
      }
    if (SImode != SImode)
      emit_insn (gen_rtx_SET (op0_lo,
			      gen_rtx_ZERO_EXTEND (SImode, operands[1])));
    emit_insn (gen_movsi (op0_hi, const0_rtx));
    if (res_lo != op0_lo)
      emit_move_insn (res_lo, op0_lo);
    if (res_hi != op0_hi)
      emit_move_insn (res_hi, op0_hi);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5574 */
rtx
gen_extendqidi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5578 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    rtx res_lo, res_hi, op0_lo, op0_hi;
    res_lo = gen_lowpart (SImode, operands[0]);
    res_hi = gen_highpart (SImode, operands[0]);
    if (can_create_pseudo_p ())
      {
	op0_lo = QImode == SImode ? operands[1] : gen_reg_rtx (SImode);
	op0_hi = gen_reg_rtx (SImode);
      }
    else
      {
	op0_lo = QImode == SImode ? operands[1] : res_lo;
	op0_hi = res_hi;
      }
    if (QImode != SImode)
      emit_insn (gen_rtx_SET (op0_lo,
			      gen_rtx_SIGN_EXTEND (SImode, operands[1])));
    emit_insn (gen_ashrsi3 (op0_hi, op0_lo, GEN_INT (31)));
    if (res_lo != op0_lo)
      emit_move_insn (res_lo, op0_lo);
    if (res_hi != op0_hi)
      emit_move_insn (res_hi, op0_hi);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5574 */
rtx
gen_extendhidi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5578 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    rtx res_lo, res_hi, op0_lo, op0_hi;
    res_lo = gen_lowpart (SImode, operands[0]);
    res_hi = gen_highpart (SImode, operands[0]);
    if (can_create_pseudo_p ())
      {
	op0_lo = HImode == SImode ? operands[1] : gen_reg_rtx (SImode);
	op0_hi = gen_reg_rtx (SImode);
      }
    else
      {
	op0_lo = HImode == SImode ? operands[1] : res_lo;
	op0_hi = res_hi;
      }
    if (HImode != SImode)
      emit_insn (gen_rtx_SET (op0_lo,
			      gen_rtx_SIGN_EXTEND (SImode, operands[1])));
    emit_insn (gen_ashrsi3 (op0_hi, op0_lo, GEN_INT (31)));
    if (res_lo != op0_lo)
      emit_move_insn (res_lo, op0_lo);
    if (res_hi != op0_hi)
      emit_move_insn (res_hi, op0_hi);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5574 */
rtx
gen_extendsidi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5578 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    rtx res_lo, res_hi, op0_lo, op0_hi;
    res_lo = gen_lowpart (SImode, operands[0]);
    res_hi = gen_highpart (SImode, operands[0]);
    if (can_create_pseudo_p ())
      {
	op0_lo = SImode == SImode ? operands[1] : gen_reg_rtx (SImode);
	op0_hi = gen_reg_rtx (SImode);
      }
    else
      {
	op0_lo = SImode == SImode ? operands[1] : res_lo;
	op0_hi = res_hi;
      }
    if (SImode != SImode)
      emit_insn (gen_rtx_SET (op0_lo,
			      gen_rtx_SIGN_EXTEND (SImode, operands[1])));
    emit_insn (gen_ashrsi3 (op0_hi, op0_lo, GEN_INT (31)));
    if (res_lo != op0_lo)
      emit_move_insn (res_lo, op0_lo);
    if (res_hi != op0_hi)
      emit_move_insn (res_hi, op0_hi);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5605 */
extern rtx_insn *gen_split_29 (rtx_insn *, rtx *);
rtx_insn *
gen_split_29 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_29 (arm.md:5605)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5610 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  rtx lo_part = gen_lowpart (SImode, operands[0]);
  machine_mode src_mode = GET_MODE (operands[1]);

  if (src_mode == SImode)
    emit_move_insn (lo_part, operands[1]);
  else
    emit_insn (gen_rtx_SET (lo_part,
			    gen_rtx_ZERO_EXTEND (SImode, operands[1])));
  operands[0] = gen_highpart (SImode, operands[0]);
  operands[1] = const0_rtx;
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5623 */
extern rtx_insn *gen_split_30 (rtx_insn *, rtx *);
rtx_insn *
gen_split_30 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_30 (arm.md:5623)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5628 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  rtx lo_part = gen_lowpart (SImode, operands[0]);
  machine_mode src_mode = GET_MODE (operands[1]);

  if (src_mode == SImode)
    emit_move_insn (lo_part, operands[1]);
  else
    emit_insn (gen_rtx_SET (lo_part,
			    gen_rtx_SIGN_EXTEND (SImode, operands[1])));
  operands[1] = lo_part;
  operands[0] = gen_highpart (SImode, operands[0]);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (SImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (31)])));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5641 */
rtx
gen_zero_extendhisi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5645 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  if (TARGET_ARM && !arm_arch4 && MEM_P (operands[1]))
    {
      emit_insn (gen_movhi_bytes (operands[0], operands[1]));
      DONE;
    }
  if (!arm_arch6 && !MEM_P (operands[1]))
    {
      rtx t = gen_lowpart (SImode, operands[1]);
      rtx tmp = gen_reg_rtx (SImode);
      emit_insn (gen_ashlsi3 (tmp, t, GEN_INT (16)));
      emit_insn (gen_lshrsi3 (operands[0], tmp, GEN_INT (16)));
      DONE;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5661 */
extern rtx_insn *gen_split_31 (rtx_insn *, rtx *);
rtx_insn *
gen_split_31 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_31 (arm.md:5661)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5667 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  operands[2] = gen_lowpart (SImode, operands[1]);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (SImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)])));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_LSHIFTRT (SImode,
	copy_rtx (operand0),
	const_int_rtx[MAX_SAVED_CONST_INT + (16)])));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5703 */
rtx
gen_zero_extendqisi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5707 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  if (TARGET_ARM && !arm_arch6 && !MEM_P (operands[1]))
    {
      emit_insn (gen_andsi3 (operands[0],
			     gen_lowpart (SImode, operands[1]),
					  GEN_INT (255)));
      DONE;
    }
  if (!arm_arch6 && !MEM_P (operands[1]))
    {
      rtx t = gen_lowpart (SImode, operands[1]);
      rtx tmp = gen_reg_rtx (SImode);
      emit_insn (gen_ashlsi3 (tmp, t, GEN_INT (24)));
      emit_insn (gen_lshrsi3 (operands[0], tmp, GEN_INT (24)));
      DONE;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5725 */
extern rtx_insn *gen_split_32 (rtx_insn *, rtx *);
rtx_insn *
gen_split_32 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_32 (arm.md:5725)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5731 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  operands[2] = simplify_gen_subreg (SImode, operands[1], QImode, 0);
  if (TARGET_ARM)
    {
      emit_insn (gen_andsi3 (operands[0], operands[2], GEN_INT (255)));
      DONE;
    }
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (SImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (24)])));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_LSHIFTRT (SImode,
	copy_rtx (operand0),
	const_int_rtx[MAX_SAVED_CONST_INT + (24)])));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5773 */
extern rtx_insn *gen_split_33 (rtx_insn *, rtx *);
rtx_insn *
gen_split_33 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_33 (arm.md:5773)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5780 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand2,
	operand1));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (SImode,
	copy_rtx (operand2),
	GEN_INT (255L))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5783 */
extern rtx_insn *gen_split_34 (rtx_insn *, rtx *);
rtx_insn *
gen_split_34 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_34 (arm.md:5783)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5790 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand2,
	operand1));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (SImode,
	copy_rtx (operand2),
	GEN_INT (255L))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5794 */
extern rtx_insn *gen_split_35 (rtx_insn *, rtx *);
rtx_insn *
gen_split_35 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_35 (arm.md:5794)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5811 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
operands[5] = gen_lowpart (GET_MODE (operands[5]), operands[0]);
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (SImode,
	gen_rtx_ASHIFT (SImode,
	operand1,
	operand2),
	operand4)));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_ZERO_EXTEND (SImode,
	operand5)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5794 */
extern rtx_insn *gen_split_36 (rtx_insn *, rtx *);
rtx_insn *
gen_split_36 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_36 (arm.md:5794)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5811 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
operands[5] = gen_lowpart (GET_MODE (operands[5]), operands[0]);
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (SImode,
	gen_rtx_ASHIFT (SImode,
	operand1,
	operand2),
	operand4)));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_ZERO_EXTEND (SImode,
	operand5)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5825 */
rtx
gen_extendhisi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5829 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  if (TARGET_THUMB1)
    {
      emit_insn (gen_thumb1_extendhisi2 (operands[0], operands[1]));
      DONE;
    }
  if (MEM_P (operands[1]) && TARGET_ARM && !arm_arch4)
    {
      emit_insn (gen_extendhisi2_mem (operands[0], operands[1]));
      DONE;
    }

  if (!arm_arch6 && !MEM_P (operands[1]))
    {
      rtx t = gen_lowpart (SImode, operands[1]);
      rtx tmp = gen_reg_rtx (SImode);
      emit_insn (gen_ashlsi3 (tmp, t, GEN_INT (16)));
      emit_insn (gen_ashrsi3 (operands[0], tmp, GEN_INT (16)));
      DONE;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (SImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5851 */
extern rtx_insn *gen_split_37 (rtx_insn *, rtx *);
rtx_insn *
gen_split_37 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_37 (arm.md:5851)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5859 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  operands[2] = simplify_gen_subreg (SImode, operands[1], HImode, 0);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (SImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)])));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_ASHIFTRT (SImode,
	copy_rtx (operand0),
	const_int_rtx[MAX_SAVED_CONST_INT + (16)])));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5864 */
rtx
gen_extendhisi2_mem (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[8];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5872 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    rtx mem1, mem2;
    rtx addr = copy_to_mode_reg (SImode, XEXP (operands[1], 0));

    mem1 = change_address (operands[1], QImode, addr);
    mem2 = change_address (operands[1], QImode,
			   plus_constant (Pmode, addr, 1));
    operands[0] = gen_lowpart (SImode, operands[0]);
    operands[1] = mem1;
    operands[2] = gen_reg_rtx (SImode);
    operands[3] = gen_reg_rtx (SImode);
    operands[6] = gen_reg_rtx (SImode);
    operands[7] = mem2;

    if (BYTES_BIG_ENDIAN)
      {
	operands[4] = operands[2];
	operands[5] = operands[3];
      }
    else
      {
	operands[4] = operands[3];
	operands[5] = operands[2];
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
    operand6 = operands[6];
    (void) operand6;
    operand7 = operands[7];
    (void) operand7;
  }
  emit_insn (gen_rtx_SET (operand2,
	gen_rtx_ZERO_EXTEND (SImode,
	operand1)));
  emit_insn (gen_rtx_SET (operand3,
	gen_rtx_ZERO_EXTEND (SImode,
	operand7)));
  emit_insn (gen_rtx_SET (operand6,
	gen_rtx_ASHIFT (SImode,
	operand4,
	const_int_rtx[MAX_SAVED_CONST_INT + (24)])));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (SImode,
	gen_rtx_ASHIFTRT (SImode,
	copy_rtx (operand6),
	const_int_rtx[MAX_SAVED_CONST_INT + (16)]),
	operand5)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5900 */
extern rtx_insn *gen_split_38 (rtx_insn *, rtx *);
rtx_insn *
gen_split_38 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_38 (arm.md:5900)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5906 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  operands[2] = simplify_gen_subreg (SImode, operands[1], HImode, 0);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (SImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)])));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_ASHIFTRT (SImode,
	copy_rtx (operand0),
	const_int_rtx[MAX_SAVED_CONST_INT + (16)])));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5943 */
rtx
gen_extendqihi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5951 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    if (arm_arch4 && MEM_P (operands[1]))
      {
	emit_insn (gen_rtx_SET (operands[0],
				gen_rtx_SIGN_EXTEND (HImode, operands[1])));
	DONE;
      }
    if (!s_register_operand (operands[1], QImode))
      operands[1] = copy_to_mode_reg (QImode, operands[1]);
    operands[0] = gen_lowpart (SImode, operands[0]);
    operands[1] = gen_lowpart (SImode, operands[1]);
    operands[2] = gen_reg_rtx (SImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand2,
	gen_rtx_ASHIFT (SImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (24)])));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (SImode,
	copy_rtx (operand2),
	const_int_rtx[MAX_SAVED_CONST_INT + (24)])));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5976 */
rtx
gen_extendqisi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5980 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  if (!arm_arch4 && MEM_P (operands[1]))
    operands[1] = copy_to_mode_reg (QImode, operands[1]);

  if (!arm_arch6 && !MEM_P (operands[1]))
    {
      rtx t = gen_lowpart (SImode, operands[1]);
      rtx tmp = gen_reg_rtx (SImode);
      emit_insn (gen_ashlsi3 (tmp, t, GEN_INT (24)));
      emit_insn (gen_ashrsi3 (operands[0], tmp, GEN_INT (24)));
      DONE;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (SImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5994 */
extern rtx_insn *gen_split_39 (rtx_insn *, rtx *);
rtx_insn *
gen_split_39 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_39 (arm.md:5994)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6000 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  operands[2] = simplify_gen_subreg (SImode, operands[1], QImode, 0);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (SImode,
	operand2,
	const_int_rtx[MAX_SAVED_CONST_INT + (24)])));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_ASHIFTRT (SImode,
	copy_rtx (operand0),
	const_int_rtx[MAX_SAVED_CONST_INT + (24)])));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6102 */
rtx
gen_arm_smlad (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6109 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    if (ARM_Q_BIT_READ)
      emit_insn (gen_arm_smlad_setq_insn (operands[0], operands[1],
						operands[2], operands[3]));
    else
      emit_insn (gen_arm_smlad_insn (operands[0], operands[1],
					   operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	94)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6102 */
rtx
gen_arm_smladx (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6109 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    if (ARM_Q_BIT_READ)
      emit_insn (gen_arm_smladx_setq_insn (operands[0], operands[1],
						operands[2], operands[3]));
    else
      emit_insn (gen_arm_smladx_insn (operands[0], operands[1],
					   operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	95)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6102 */
rtx
gen_arm_smlsd (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6109 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    if (ARM_Q_BIT_READ)
      emit_insn (gen_arm_smlsd_setq_insn (operands[0], operands[1],
						operands[2], operands[3]));
    else
      emit_insn (gen_arm_smlsd_insn (operands[0], operands[1],
					   operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	96)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6102 */
rtx
gen_arm_smlsdx (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6109 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    if (ARM_Q_BIT_READ)
      emit_insn (gen_arm_smlsdx_setq_insn (operands[0], operands[1],
						operands[2], operands[3]));
    else
      emit_insn (gen_arm_smlsdx_insn (operands[0], operands[1],
					   operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	97)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6130 */
rtx
gen_arm_smuad (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6136 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    if (ARM_Q_BIT_READ)
      emit_insn (gen_arm_smuad_setq_insn (operands[0], operands[1],
						operands[2]));
    else
      emit_insn (gen_arm_smuad_insn (operands[0], operands[1],
					   operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	98)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6130 */
rtx
gen_arm_smuadx (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6136 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    if (ARM_Q_BIT_READ)
      emit_insn (gen_arm_smuadx_setq_insn (operands[0], operands[1],
						operands[2]));
    else
      emit_insn (gen_arm_smuadx_insn (operands[0], operands[1],
					   operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	99)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6157 */
rtx
gen_arm_ssat16 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6163 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    if (ARM_Q_BIT_READ)
      emit_insn (gen_arm_ssat16_setq_insn (operands[0], operands[1],
						operands[2]));
    else
      emit_insn (gen_arm_ssat16_insn (operands[0], operands[1],
					   operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	100)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6157 */
rtx
gen_arm_usat16 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6163 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    if (ARM_Q_BIT_READ)
      emit_insn (gen_arm_usat16_setq_insn (operands[0], operands[1],
						operands[2]));
    else
      emit_insn (gen_arm_usat16_insn (operands[0], operands[1],
					   operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	101)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6185 */
rtx
gen_extendsfdf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT_EXTEND (DFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6197 */
rtx
gen_extendhfdf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6201 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  /* We don't have a direct instruction for this, so go via SFmode.  */
  if (!(TARGET_32BIT && TARGET_FP16_TO_DOUBLE))
    {
      rtx op1;
      op1 = convert_to_mode (SFmode, operands[1], 0);
      op1 = convert_to_mode (DFmode, op1, 0);
      emit_insn (gen_movdf (operands[0], op1));
      DONE;
    }
  /* Otherwise, we're done producing RTL and will pick up the correct
     pattern to do this with one rounding-step in a single instruction.  */
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_FLOAT_EXTEND (DFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6277 */
rtx
gen_movdi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6281 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  gcc_checking_assert (aligned_operand (operands[0], DImode));
  gcc_checking_assert (aligned_operand (operands[1], DImode));
  if (can_create_pseudo_p ())
    {
      if (!REG_P (operands[0]))
	operands[1] = force_reg (DImode, operands[1]);
    }
  if (REG_P (operands[0]) && REGNO (operands[0]) <= LAST_ARM_REGNUM
      && !targetm.hard_regno_mode_ok (REGNO (operands[0]), DImode))
    {
      /* Avoid LDRD's into an odd-numbered register pair in ARM state
	 when expanding function calls.  */
      gcc_assert (can_create_pseudo_p ());
      if (MEM_P (operands[1]) && MEM_VOLATILE_P (operands[1]))
	{
	  /* Perform load into legal reg pair first, then move.  */
	  rtx reg = gen_reg_rtx (DImode);
	  emit_insn (gen_movdi (reg, operands[1]));
	  operands[1] = reg;
	}
      emit_move_insn (gen_lowpart (SImode, operands[0]),
		      gen_lowpart (SImode, operands[1]));
      emit_move_insn (gen_highpart (SImode, operands[0]),
		      gen_highpart (SImode, operands[1]));
      DONE;
    }
  else if (REG_P (operands[1]) && REGNO (operands[1]) <= LAST_ARM_REGNUM
	   && !targetm.hard_regno_mode_ok (REGNO (operands[1]), DImode))
    {
      /* Avoid STRD's from an odd-numbered register pair in ARM state
	 when expanding function prologue.  */
      gcc_assert (can_create_pseudo_p ());
      rtx split_dest = (MEM_P (operands[0]) && MEM_VOLATILE_P (operands[0]))
		       ? gen_reg_rtx (DImode)
		       : operands[0];
      emit_move_insn (gen_lowpart (SImode, split_dest),
		      gen_lowpart (SImode, operands[1]));
      emit_move_insn (gen_highpart (SImode, split_dest),
		      gen_highpart (SImode, operands[1]));
      if (split_dest != operands[0])
	emit_insn (gen_movdi (operands[0], split_dest));
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6361 */
extern rtx_insn *gen_split_40 (rtx_insn *, rtx *);
rtx_insn *
gen_split_40 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_40 (arm.md:6361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6370 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  arm_split_constant (SET, SImode, curr_insn,
		      INTVAL (gen_lowpart (SImode, operands[1])),
		      gen_lowpart (SImode, operands[0]), NULL_RTX, 0);
  arm_split_constant (SET, SImode, curr_insn,
		      INTVAL (gen_highpart_mode (SImode,
						 GET_MODE (operands[0]),
						 operands[1])),
		      gen_highpart (SImode, operands[0]), NULL_RTX, 0);
  DONE;
  
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6361 */
extern rtx_insn *gen_split_41 (rtx_insn *, rtx *);
rtx_insn *
gen_split_41 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_41 (arm.md:6361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6370 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  arm_split_constant (SET, SImode, curr_insn,
		      INTVAL (gen_lowpart (SImode, operands[1])),
		      gen_lowpart (SImode, operands[0]), NULL_RTX, 0);
  arm_split_constant (SET, SImode, curr_insn,
		      INTVAL (gen_highpart_mode (SImode,
						 GET_MODE (operands[0]),
						 operands[1])),
		      gen_highpart (SImode, operands[0]), NULL_RTX, 0);
  DONE;
  
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6361 */
extern rtx_insn *gen_split_42 (rtx_insn *, rtx *);
rtx_insn *
gen_split_42 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_42 (arm.md:6361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6370 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  arm_split_constant (SET, SImode, curr_insn,
		      INTVAL (gen_lowpart (SImode, operands[1])),
		      gen_lowpart (SImode, operands[0]), NULL_RTX, 0);
  arm_split_constant (SET, SImode, curr_insn,
		      INTVAL (gen_highpart_mode (SImode,
						 GET_MODE (operands[0]),
						 operands[1])),
		      gen_highpart (SImode, operands[0]), NULL_RTX, 0);
  DONE;
  
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6361 */
extern rtx_insn *gen_split_43 (rtx_insn *, rtx *);
rtx_insn *
gen_split_43 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_43 (arm.md:6361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6370 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  arm_split_constant (SET, SImode, curr_insn,
		      INTVAL (gen_lowpart (SImode, operands[1])),
		      gen_lowpart (SImode, operands[0]), NULL_RTX, 0);
  arm_split_constant (SET, SImode, curr_insn,
		      INTVAL (gen_highpart_mode (SImode,
						 GET_MODE (operands[0]),
						 operands[1])),
		      gen_highpart (SImode, operands[0]), NULL_RTX, 0);
  DONE;
  
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6361 */
extern rtx_insn *gen_split_44 (rtx_insn *, rtx *);
rtx_insn *
gen_split_44 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_44 (arm.md:6361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6370 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  arm_split_constant (SET, SImode, curr_insn,
		      INTVAL (gen_lowpart (SImode, operands[1])),
		      gen_lowpart (SImode, operands[0]), NULL_RTX, 0);
  arm_split_constant (SET, SImode, curr_insn,
		      INTVAL (gen_highpart_mode (SImode,
						 GET_MODE (operands[0]),
						 operands[1])),
		      gen_highpart (SImode, operands[0]), NULL_RTX, 0);
  DONE;
  
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6361 */
extern rtx_insn *gen_split_45 (rtx_insn *, rtx *);
rtx_insn *
gen_split_45 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_45 (arm.md:6361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6370 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  arm_split_constant (SET, SImode, curr_insn,
		      INTVAL (gen_lowpart (SImode, operands[1])),
		      gen_lowpart (SImode, operands[0]), NULL_RTX, 0);
  arm_split_constant (SET, SImode, curr_insn,
		      INTVAL (gen_highpart_mode (SImode,
						 GET_MODE (operands[0]),
						 operands[1])),
		      gen_highpart (SImode, operands[0]), NULL_RTX, 0);
  DONE;
  
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6361 */
extern rtx_insn *gen_split_46 (rtx_insn *, rtx *);
rtx_insn *
gen_split_46 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_46 (arm.md:6361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6370 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  arm_split_constant (SET, SImode, curr_insn,
		      INTVAL (gen_lowpart (SImode, operands[1])),
		      gen_lowpart (SImode, operands[0]), NULL_RTX, 0);
  arm_split_constant (SET, SImode, curr_insn,
		      INTVAL (gen_highpart_mode (SImode,
						 GET_MODE (operands[0]),
						 operands[1])),
		      gen_highpart (SImode, operands[0]), NULL_RTX, 0);
  DONE;
  
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6391 */
extern rtx_insn *gen_split_47 (rtx_insn *, rtx *);
rtx_insn *
gen_split_47 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_47 (arm.md:6391)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6398 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[2] = gen_highpart (SImode, operands[0]);
  operands[3] = gen_highpart_mode (SImode, GET_MODE (operands[0]),
				   operands[1]);
  operands[0] = gen_lowpart (SImode, operands[0]);
  operands[1] = gen_lowpart (SImode, operands[1]);
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6391 */
extern rtx_insn *gen_split_48 (rtx_insn *, rtx *);
rtx_insn *
gen_split_48 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_48 (arm.md:6391)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6398 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[2] = gen_highpart (SImode, operands[0]);
  operands[3] = gen_highpart_mode (SImode, GET_MODE (operands[0]),
				   operands[1]);
  operands[0] = gen_lowpart (SImode, operands[0]);
  operands[1] = gen_lowpart (SImode, operands[1]);
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6391 */
extern rtx_insn *gen_split_49 (rtx_insn *, rtx *);
rtx_insn *
gen_split_49 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_49 (arm.md:6391)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6398 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[2] = gen_highpart (SImode, operands[0]);
  operands[3] = gen_highpart_mode (SImode, GET_MODE (operands[0]),
				   operands[1]);
  operands[0] = gen_lowpart (SImode, operands[0]);
  operands[1] = gen_lowpart (SImode, operands[1]);
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6391 */
extern rtx_insn *gen_split_50 (rtx_insn *, rtx *);
rtx_insn *
gen_split_50 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_50 (arm.md:6391)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6398 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[2] = gen_highpart (SImode, operands[0]);
  operands[3] = gen_highpart_mode (SImode, GET_MODE (operands[0]),
				   operands[1]);
  operands[0] = gen_lowpart (SImode, operands[0]);
  operands[1] = gen_lowpart (SImode, operands[1]);
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6391 */
extern rtx_insn *gen_split_51 (rtx_insn *, rtx *);
rtx_insn *
gen_split_51 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_51 (arm.md:6391)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6398 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[2] = gen_highpart (SImode, operands[0]);
  operands[3] = gen_highpart_mode (SImode, GET_MODE (operands[0]),
				   operands[1]);
  operands[0] = gen_lowpart (SImode, operands[0]);
  operands[1] = gen_lowpart (SImode, operands[1]);
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6391 */
extern rtx_insn *gen_split_52 (rtx_insn *, rtx *);
rtx_insn *
gen_split_52 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_52 (arm.md:6391)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6398 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[2] = gen_highpart (SImode, operands[0]);
  operands[3] = gen_highpart_mode (SImode, GET_MODE (operands[0]),
				   operands[1]);
  operands[0] = gen_lowpart (SImode, operands[0]);
  operands[1] = gen_lowpart (SImode, operands[1]);
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6391 */
extern rtx_insn *gen_split_53 (rtx_insn *, rtx *);
rtx_insn *
gen_split_53 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_53 (arm.md:6391)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6398 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[2] = gen_highpart (SImode, operands[0]);
  operands[3] = gen_highpart_mode (SImode, GET_MODE (operands[0]),
				   operands[1]);
  operands[0] = gen_lowpart (SImode, operands[0]);
  operands[1] = gen_lowpart (SImode, operands[1]);
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6407 */
extern rtx_insn *gen_split_54 (rtx_insn *, rtx *);
rtx_insn *
gen_split_54 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_54 (arm.md:6407)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6413 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[2] = gen_highpart (SImode, operands[0]);
  operands[3] = gen_highpart (SImode, operands[1]);
  operands[0] = gen_lowpart (SImode, operands[0]);
  operands[1] = gen_lowpart (SImode, operands[1]);

  /* Handle a partial overlap.  */
  if (rtx_equal_p (operands[0], operands[3]))
    {
      rtx tmp0 = operands[0];
      rtx tmp1 = operands[1];

      operands[0] = operands[2];
      operands[1] = operands[3];
      operands[2] = tmp0;
      operands[3] = tmp1;
    }
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6407 */
extern rtx_insn *gen_split_55 (rtx_insn *, rtx *);
rtx_insn *
gen_split_55 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_55 (arm.md:6407)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6413 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[2] = gen_highpart (SImode, operands[0]);
  operands[3] = gen_highpart (SImode, operands[1]);
  operands[0] = gen_lowpart (SImode, operands[0]);
  operands[1] = gen_lowpart (SImode, operands[1]);

  /* Handle a partial overlap.  */
  if (rtx_equal_p (operands[0], operands[3]))
    {
      rtx tmp0 = operands[0];
      rtx tmp1 = operands[1];

      operands[0] = operands[2];
      operands[1] = operands[3];
      operands[2] = tmp0;
      operands[3] = tmp1;
    }
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6407 */
extern rtx_insn *gen_split_56 (rtx_insn *, rtx *);
rtx_insn *
gen_split_56 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_56 (arm.md:6407)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6413 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[2] = gen_highpart (SImode, operands[0]);
  operands[3] = gen_highpart (SImode, operands[1]);
  operands[0] = gen_lowpart (SImode, operands[0]);
  operands[1] = gen_lowpart (SImode, operands[1]);

  /* Handle a partial overlap.  */
  if (rtx_equal_p (operands[0], operands[3]))
    {
      rtx tmp0 = operands[0];
      rtx tmp1 = operands[1];

      operands[0] = operands[2];
      operands[1] = operands[3];
      operands[2] = tmp0;
      operands[3] = tmp1;
    }
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6407 */
extern rtx_insn *gen_split_57 (rtx_insn *, rtx *);
rtx_insn *
gen_split_57 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_57 (arm.md:6407)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6413 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[2] = gen_highpart (SImode, operands[0]);
  operands[3] = gen_highpart (SImode, operands[1]);
  operands[0] = gen_lowpart (SImode, operands[0]);
  operands[1] = gen_lowpart (SImode, operands[1]);

  /* Handle a partial overlap.  */
  if (rtx_equal_p (operands[0], operands[3]))
    {
      rtx tmp0 = operands[0];
      rtx tmp1 = operands[1];

      operands[0] = operands[2];
      operands[1] = operands[3];
      operands[2] = tmp0;
      operands[3] = tmp1;
    }
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6407 */
extern rtx_insn *gen_split_58 (rtx_insn *, rtx *);
rtx_insn *
gen_split_58 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_58 (arm.md:6407)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6413 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[2] = gen_highpart (SImode, operands[0]);
  operands[3] = gen_highpart (SImode, operands[1]);
  operands[0] = gen_lowpart (SImode, operands[0]);
  operands[1] = gen_lowpart (SImode, operands[1]);

  /* Handle a partial overlap.  */
  if (rtx_equal_p (operands[0], operands[3]))
    {
      rtx tmp0 = operands[0];
      rtx tmp1 = operands[1];

      operands[0] = operands[2];
      operands[1] = operands[3];
      operands[2] = tmp0;
      operands[3] = tmp1;
    }
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6407 */
extern rtx_insn *gen_split_59 (rtx_insn *, rtx *);
rtx_insn *
gen_split_59 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_59 (arm.md:6407)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6413 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[2] = gen_highpart (SImode, operands[0]);
  operands[3] = gen_highpart (SImode, operands[1]);
  operands[0] = gen_lowpart (SImode, operands[0]);
  operands[1] = gen_lowpart (SImode, operands[1]);

  /* Handle a partial overlap.  */
  if (rtx_equal_p (operands[0], operands[3]))
    {
      rtx tmp0 = operands[0];
      rtx tmp1 = operands[1];

      operands[0] = operands[2];
      operands[1] = operands[3];
      operands[2] = tmp0;
      operands[3] = tmp1;
    }
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6407 */
extern rtx_insn *gen_split_60 (rtx_insn *, rtx *);
rtx_insn *
gen_split_60 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_60 (arm.md:6407)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6413 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[2] = gen_highpart (SImode, operands[0]);
  operands[3] = gen_highpart (SImode, operands[1]);
  operands[0] = gen_lowpart (SImode, operands[0]);
  operands[1] = gen_lowpart (SImode, operands[1]);

  /* Handle a partial overlap.  */
  if (rtx_equal_p (operands[0], operands[3]))
    {
      rtx tmp0 = operands[0];
      rtx tmp1 = operands[1];

      operands[0] = operands[2];
      operands[1] = operands[3];
      operands[2] = tmp0;
      operands[3] = tmp1;
    }
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6407 */
extern rtx_insn *gen_split_61 (rtx_insn *, rtx *);
rtx_insn *
gen_split_61 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_61 (arm.md:6407)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6413 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[2] = gen_highpart (SImode, operands[0]);
  operands[3] = gen_highpart (SImode, operands[1]);
  operands[0] = gen_lowpart (SImode, operands[0]);
  operands[1] = gen_lowpart (SImode, operands[1]);

  /* Handle a partial overlap.  */
  if (rtx_equal_p (operands[0], operands[3]))
    {
      rtx tmp0 = operands[0];
      rtx tmp1 = operands[1];

      operands[0] = operands[2];
      operands[1] = operands[3];
      operands[2] = tmp0;
      operands[3] = tmp1;
    }
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6436 */
extern rtx_insn *gen_split_62 (rtx_insn *, rtx *);
rtx_insn *
gen_split_62 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_62 (arm.md:6436)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6448 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[4] = gen_rtx_REG (SImode, REGNO(operands[0]));
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand4,
	gen_rtx_PLUS (SImode,
	operand1,
	operand2)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (DImode,
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6453 */
rtx
gen_movsi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6457 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
  rtx base, offset, tmp;

  gcc_checking_assert (aligned_operand (operands[0], SImode));
  gcc_checking_assert (aligned_operand (operands[1], SImode));
  if (TARGET_32BIT || TARGET_HAVE_MOVT)
    {
      /* Everything except mem = const or mem = mem can be done easily.  */
      if (MEM_P (operands[0]))
        operands[1] = force_reg (SImode, operands[1]);
      if (arm_general_register_operand (operands[0], SImode)
	  && CONST_INT_P (operands[1])
          && !(const_ok_for_arm (INTVAL (operands[1]))
               || const_ok_for_arm (~INTVAL (operands[1]))))
        {
	   if (DONT_EARLY_SPLIT_CONSTANT (INTVAL (operands[1]), SET))
	     {
		emit_insn (gen_rtx_SET (operands[0], operands[1]));
		DONE;
	     }
	  else
	     {
		arm_split_constant (SET, SImode, NULL_RTX,
	                            INTVAL (operands[1]), operands[0], NULL_RTX,
			            optimize && can_create_pseudo_p ());
		DONE;
	     }
        }
    }
  else /* Target doesn't have MOVT...  */
    {
      if (can_create_pseudo_p ())
        {
          if (!REG_P (operands[0]))
	    operands[1] = force_reg (SImode, operands[1]);
        }
    }

  split_const (operands[1], &base, &offset);
  if (INTVAL (offset) != 0
      && targetm.cannot_force_const_mem (SImode, operands[1]))
    {
      tmp = can_create_pseudo_p () ? gen_reg_rtx (SImode) : operands[0];
      emit_move_insn (tmp, base);
      emit_insn (gen_addsi3 (operands[0], tmp, offset));
      DONE;
    }

  tmp = can_create_pseudo_p () ? NULL_RTX : operands[0];

  /* Recognize the case where operand[1] is a reference to thread-local
     data and load its address to a register.  Offsets have been split off
     already.  */
  if (arm_tls_referenced_p (operands[1]))
    operands[1] = legitimize_tls_address (operands[1], tmp);
  else if (flag_pic
	   && (CONSTANT_P (operands[1])
	       || symbol_mentioned_p (operands[1])
	       || label_mentioned_p (operands[1])))
    operands[1] =
      legitimize_pic_address (operands[1], SImode, tmp, NULL_RTX, false);
  }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6560 */
extern rtx_insn *gen_split_63 (rtx_insn *, rtx *);
rtx_insn *
gen_split_63 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_63 (arm.md:6560)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6567 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  arm_split_constant (SET, SImode, NULL_RTX, 
                      INTVAL (operands[1]), operands[0], NULL_RTX, 0);
  DONE;
  
#undef DONE
#undef FAIL
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	const0_rtx));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6588 */
extern rtx_insn *gen_split_64 (rtx_insn *, rtx *);
rtx_insn *
gen_split_64 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_64 (arm.md:6588)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6598 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

    int offset = INTVAL (operands[2]);

    if (offset < -0x8000 || offset > 0x7fff)
      {
	arm_emit_movpair (operands[0], operands[1]);
	emit_insn (gen_rtx_SET (operands[0],
				gen_rtx_PLUS (SImode, operands[0], operands[2])));
      }
    else
      {
	rtx op = gen_rtx_CONST (SImode,
				gen_rtx_PLUS (SImode, operands[1], operands[2]));
	arm_emit_movpair (operands[0], op);
      }
  
#undef DONE
#undef FAIL
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	const0_rtx));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6621 */
extern rtx_insn *gen_split_65 (rtx_insn *, rtx *);
rtx_insn *
gen_split_65 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_65 (arm.md:6621)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6628 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  arm_emit_movpair (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	const0_rtx));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6646 */
rtx
gen_calculate_pic_address (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MEM (SImode,
	gen_rtx_PLUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand2),
	1))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6655 */
extern rtx_insn *gen_split_66 (rtx_insn *, rtx *);
rtx_insn *
gen_split_66 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_66 (arm.md:6655)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6663 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
operands[3] = can_create_pseudo_p () ? gen_reg_rtx (SImode) : operands[0];
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand2),
	1)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (SImode,
	gen_rtx_PLUS (SImode,
	operand1,
	copy_rtx (operand3)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6671 */
extern rtx_insn *gen_split_67 (rtx_insn *, rtx *);
rtx_insn *
gen_split_67 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_67 (arm.md:6671)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6682 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
operands[3] = TARGET_THUMB ? GEN_INT (4) : GEN_INT (8);
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	1)));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		copy_rtx (operand0),
		operand3,
		operand2),
	2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6771 */
extern rtx_insn *gen_peephole2_7 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_7 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_7 (arm.md:6771)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6785 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand2,
	gen_rtx_MEM (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const_int_rtx[MAX_SAVED_CONST_INT + (8)],
		operand1),
	2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6798 */
rtx
gen_builtin_setjmp_receiver (rtx operand0)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[1];
    operands[0] = operand0;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6801 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

{
  /* r3 is clobbered by set/longjmp, so we can use it as a scratch
     register.  */
  if (arm_pic_register != INVALID_REGNUM)
    arm_load_pic_register (1UL << 3, NULL_RTX);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
  }
  emit_insn (gen_rtx_LABEL_REF (VOIDmode,
	operand0));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6841 */
rtx
gen_storehi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6850 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    rtx op1 = operands[1];
    rtx addr = XEXP (op1, 0);
    enum rtx_code code = GET_CODE (addr);

    if ((code == PLUS && !CONST_INT_P (XEXP (addr, 1)))
	|| code == MINUS)
      op1 = replace_equiv_address (operands[1], force_reg (SImode, addr));

    operands[4] = adjust_address (op1, QImode, 1);
    operands[1] = adjust_address (operands[1], QImode, 0);
    operands[3] = gen_lowpart (QImode, operands[0]);
    operands[0] = gen_lowpart (SImode, operands[0]);
    operands[2] = gen_reg_rtx (SImode);
    operands[5] = gen_lowpart (QImode, operands[2]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand1,
	operand3));
  emit_insn (gen_rtx_SET (operand2,
	gen_rtx_ASHIFTRT (SImode,
	operand0,
	const_int_rtx[MAX_SAVED_CONST_INT + (8)])));
  emit_insn (gen_rtx_SET (operand4,
	operand5));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6869 */
rtx
gen_storehi_bigend (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6875 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    rtx op1 = operands[1];
    rtx addr = XEXP (op1, 0);
    enum rtx_code code = GET_CODE (addr);

    if ((code == PLUS && !CONST_INT_P (XEXP (addr, 1)))
	|| code == MINUS)
      op1 = replace_equiv_address (op1, force_reg (SImode, addr));

    operands[4] = adjust_address (op1, QImode, 1);
    operands[1] = adjust_address (operands[1], QImode, 0);
    operands[3] = gen_lowpart (QImode, operands[0]);
    operands[0] = gen_lowpart (SImode, operands[0]);
    operands[2] = gen_reg_rtx (SImode);
    operands[5] = gen_lowpart (QImode, operands[2]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand4,
	operand3));
  emit_insn (gen_rtx_SET (operand2,
	gen_rtx_ASHIFTRT (SImode,
	operand0,
	const_int_rtx[MAX_SAVED_CONST_INT + (8)])));
  emit_insn (gen_rtx_SET (operand1,
	operand5));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6895 */
rtx
gen_storeinthi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6900 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    HOST_WIDE_INT value = INTVAL (operands[1]);
    rtx addr = XEXP (operands[0], 0);
    rtx op0 = operands[0];
    enum rtx_code code = GET_CODE (addr);

    if ((code == PLUS && !CONST_INT_P (XEXP (addr, 1)))
	|| code == MINUS)
      op0 = replace_equiv_address (op0, force_reg (SImode, addr));

    operands[1] = gen_reg_rtx (SImode);
    if (BYTES_BIG_ENDIAN)
      {
	emit_insn (gen_movsi (operands[1], GEN_INT ((value >> 8) & 255)));
	if ((value & 255) == ((value >> 8) & 255))
	  operands[2] = operands[1];
	else
	  {
	    operands[2] = gen_reg_rtx (SImode);
	    emit_insn (gen_movsi (operands[2], GEN_INT (value & 255)));
	  }
      }
    else
      {
	emit_insn (gen_movsi (operands[1], GEN_INT (value & 255)));
	if ((value & 255) == ((value >> 8) & 255))
	  operands[2] = operands[1];
	else
	  {
	    operands[2] = gen_reg_rtx (SImode);
	    emit_insn (gen_movsi (operands[2], GEN_INT ((value >> 8) & 255)));
	  }
      }

    operands[3] = adjust_address (op0, QImode, 1);
    operands[0] = adjust_address (operands[0], QImode, 0);
    operands[2] = gen_lowpart (QImode, operands[2]);
    operands[1] = gen_lowpart (QImode, operands[1]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand3,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6942 */
rtx
gen_storehi_single_op (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6946 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  if (!s_register_operand (operands[1], HImode))
    operands[1] = copy_to_mode_reg (HImode, operands[1]);
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:6952 */
rtx
gen_movhi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6956 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  gcc_checking_assert (aligned_operand (operands[0], HImode));
  gcc_checking_assert (aligned_operand (operands[1], HImode));
  if (TARGET_ARM)
    {
      if (can_create_pseudo_p ())
        {
          if (MEM_P (operands[0]))
	    {
	      if (arm_arch4)
	        {
	          emit_insn (gen_storehi_single_op (operands[0], operands[1]));
	          DONE;
	        }
	      if (CONST_INT_P (operands[1]))
	        emit_insn (gen_storeinthi (operands[0], operands[1]));
	      else
	        {
	          if (MEM_P (operands[1]))
		    operands[1] = force_reg (HImode, operands[1]);
	          if (BYTES_BIG_ENDIAN)
		    emit_insn (gen_storehi_bigend (operands[1], operands[0]));
	          else
		   emit_insn (gen_storehi (operands[1], operands[0]));
	        }
	      DONE;
	    }
          /* Sign extend a constant, and keep it in an SImode reg.  */
          else if (CONST_INT_P (operands[1]))
	    {
	      rtx reg = gen_reg_rtx (SImode);
	      HOST_WIDE_INT val = INTVAL (operands[1]) & 0xffff;

	      /* If the constant is already valid, leave it alone.  */
	      if (!const_ok_for_arm (val))
	        {
	          /* If setting all the top bits will make the constant 
		     loadable in a single instruction, then set them.  
		     Otherwise, sign extend the number.  */

	          if (const_ok_for_arm (~(val | ~0xffff)))
		    val |= ~0xffff;
	          else if (val & 0x8000)
		    val |= ~0xffff;
	        }

	      emit_insn (gen_movsi (reg, GEN_INT (val)));
	      operands[1] = gen_lowpart (HImode, reg);
	    }
	  else if (arm_arch4 && optimize && can_create_pseudo_p ()
		   && MEM_P (operands[1]))
	    {
	      rtx reg = gen_reg_rtx (SImode);

	      emit_insn (gen_zero_extendhisi2 (reg, operands[1]));
	      operands[1] = gen_lowpart (HImode, reg);
	    }
          else if (!arm_arch4)
	    {
	      if (MEM_P (operands[1]))
	        {
		  rtx base;
		  rtx offset = const0_rtx;
		  rtx reg = gen_reg_rtx (SImode);

		  if ((REG_P (base = XEXP (operands[1], 0))
		       || (GET_CODE (base) == PLUS
			   && (CONST_INT_P (offset = XEXP (base, 1)))
                           && ((INTVAL(offset) & 1) != 1)
			   && REG_P (base = XEXP (base, 0))))
		      && REGNO_POINTER_ALIGN (REGNO (base)) >= 32)
		    {
		      rtx new_rtx;

		      new_rtx = widen_memory_access (operands[1], SImode,
						     ((INTVAL (offset) & ~3)
						      - INTVAL (offset)));
		      emit_insn (gen_movsi (reg, new_rtx));
		      if (((INTVAL (offset) & 2) != 0)
			  ^ (BYTES_BIG_ENDIAN ? 1 : 0))
			{
			  rtx reg2 = gen_reg_rtx (SImode);

			  emit_insn (gen_lshrsi3 (reg2, reg, GEN_INT (16)));
			  reg = reg2;
			}
		    }
		  else
		    emit_insn (gen_movhi_bytes (reg, operands[1]));

		  operands[1] = gen_lowpart (HImode, reg);
	       }
	   }
        }
      /* Handle loading a large integer during reload.  */
      else if (CONST_INT_P (operands[1])
	       && !const_ok_for_arm (INTVAL (operands[1]))
	       && !const_ok_for_arm (~INTVAL (operands[1])))
        {
          /* Writing a constant to memory needs a scratch, which should
	     be handled with SECONDARY_RELOADs.  */
          gcc_assert (REG_P (operands[0]));

          operands[0] = gen_rtx_SUBREG (SImode, operands[0], 0);
          emit_insn (gen_movsi (operands[0], operands[1]));
          DONE;
       }
    }
  else if (TARGET_THUMB2)
    {
      /* Thumb-2 can do everything except mem=mem and mem=const easily.  */
      if (can_create_pseudo_p ())
	{
	  if (!REG_P (operands[0]))
	    operands[1] = force_reg (HImode, operands[1]);
          /* Zero extend a constant, and keep it in an SImode reg.  */
          else if (CONST_INT_P (operands[1]))
	    {
	      rtx reg = gen_reg_rtx (SImode);
	      HOST_WIDE_INT val = INTVAL (operands[1]) & 0xffff;

	      emit_insn (gen_movsi (reg, GEN_INT (val)));
	      operands[1] = gen_lowpart (HImode, reg);
	    }
	}
    }
  else /* TARGET_THUMB1 */
    {
      if (can_create_pseudo_p ())
        {
	  if (CONST_INT_P (operands[1]))
	    {
	      rtx reg = gen_reg_rtx (SImode);

	      emit_insn (gen_movsi (reg, operands[1]));
	      operands[1] = gen_lowpart (HImode, reg);
	    }

          /* ??? We shouldn't really get invalid addresses here, but this can
	     happen if we are passed a SP (never OK for HImode/QImode) or 
	     virtual register (also rejected as illegitimate for HImode/QImode)
	     relative address.  */
          /* ??? This should perhaps be fixed elsewhere, for instance, in
	     fixup_stack_1, by checking for other kinds of invalid addresses,
	     e.g. a bare reference to a virtual register.  This may confuse the
	     alpha though, which must handle this case differently.  */
          if (MEM_P (operands[0])
	      && !memory_address_p (GET_MODE (operands[0]),
				    XEXP (operands[0], 0)))
	    operands[0]
	      = replace_equiv_address (operands[0],
				       copy_to_reg (XEXP (operands[0], 0)));
   
          if (MEM_P (operands[1])
	      && !memory_address_p (GET_MODE (operands[1]),
				    XEXP (operands[1], 0)))
	    operands[1]
	      = replace_equiv_address (operands[1],
				       copy_to_reg (XEXP (operands[1], 0)));

	  if (MEM_P (operands[1]) && optimize > 0)
	    {
	      rtx reg = gen_reg_rtx (SImode);

	      emit_insn (gen_zero_extendhisi2 (reg, operands[1]));
	      operands[1] = gen_lowpart (HImode, reg);
	    }

          if (MEM_P (operands[0]))
	    operands[1] = force_reg (HImode, operands[1]);
        }
      else if (CONST_INT_P (operands[1])
	        && !satisfies_constraint_I (operands[1]))
        {
	  /* Handle loading a large integer during reload.  */

          /* Writing a constant to memory needs a scratch, which should
	     be handled with SECONDARY_RELOADs.  */
          gcc_assert (REG_P (operands[0]));

          operands[0] = gen_rtx_SUBREG (SImode, operands[0], 0);
          emit_insn (gen_movsi (operands[0], operands[1]));
          DONE;
        }
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7144 */
rtx
gen_movhi_bytes (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[7];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7151 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    rtx mem1, mem2;
    rtx addr = copy_to_mode_reg (SImode, XEXP (operands[1], 0));

    mem1 = change_address (operands[1], QImode, addr);
    mem2 = change_address (operands[1], QImode,
			   plus_constant (Pmode, addr, 1));
    operands[0] = gen_lowpart (SImode, operands[0]);
    operands[1] = mem1;
    operands[2] = gen_reg_rtx (SImode);
    operands[3] = gen_reg_rtx (SImode);
    operands[6] = mem2;

    if (BYTES_BIG_ENDIAN)
      {
	operands[4] = operands[2];
	operands[5] = operands[3];
      }
    else
      {
	operands[4] = operands[3];
	operands[5] = operands[2];
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
    operand6 = operands[6];
    (void) operand6;
  }
  emit_insn (gen_rtx_SET (operand2,
	gen_rtx_ZERO_EXTEND (SImode,
	operand1)));
  emit_insn (gen_rtx_SET (operand3,
	gen_rtx_ZERO_EXTEND (SImode,
	operand6)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (SImode,
	gen_rtx_ASHIFT (SImode,
	operand4,
	const_int_rtx[MAX_SAVED_CONST_INT + (8)]),
	operand5)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7178 */
rtx
gen_movhi_bigend (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7187 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[2] = gen_reg_rtx (SImode);
  operands[3] = gen_reg_rtx (SImode);
  operands[4] = gen_lowpart (HImode, operands[3]);
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand2,
	gen_rtx_ROTATE (SImode,
	gen_rtx_SUBREG (SImode,
	operand1,
	0),
	const_int_rtx[MAX_SAVED_CONST_INT + (16)])));
  emit_insn (gen_rtx_SET (operand3,
	gen_rtx_ASHIFTRT (SImode,
	copy_rtx (operand2),
	const_int_rtx[MAX_SAVED_CONST_INT + (16)])));
  emit_insn (gen_rtx_SET (operand0,
	operand4));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7239 */
rtx
gen_reload_outhi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7244 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
if (TARGET_ARM)
     arm_reload_out_hi (operands);
   else
     thumb_reload_out_hi (operands);
  DONE;
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2)), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7252 */
rtx
gen_reload_inhi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7257 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  if (TARGET_ARM)
    arm_reload_in_hi (operands);
  else
    thumb_reload_out_hi (operands);
  DONE;

#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2)), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7265 */
rtx
gen_movqi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7269 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  /* Everything except mem = const or mem = mem can be done easily */

  if (can_create_pseudo_p ())
    {
      if (CONST_INT_P (operands[1]))
	{
	  rtx reg = gen_reg_rtx (SImode);

	  /* For thumb we want an unsigned immediate, then we are more likely 
	     to be able to use a movs insn.  */
	  if (TARGET_THUMB)
	    operands[1] = GEN_INT (INTVAL (operands[1]) & 255);

	  emit_insn (gen_movsi (reg, operands[1]));
	  operands[1] = gen_lowpart (QImode, reg);
	}

      if (TARGET_THUMB)
	{
          /* ??? We shouldn't really get invalid addresses here, but this can
	     happen if we are passed a SP (never OK for HImode/QImode) or
	     virtual register (also rejected as illegitimate for HImode/QImode)
	     relative address.  */
          /* ??? This should perhaps be fixed elsewhere, for instance, in
	     fixup_stack_1, by checking for other kinds of invalid addresses,
	     e.g. a bare reference to a virtual register.  This may confuse the
	     alpha though, which must handle this case differently.  */
          if (MEM_P (operands[0])
	      && !memory_address_p (GET_MODE (operands[0]),
		  		     XEXP (operands[0], 0)))
	    operands[0]
	      = replace_equiv_address (operands[0],
				       copy_to_reg (XEXP (operands[0], 0)));
          if (MEM_P (operands[1])
	      && !memory_address_p (GET_MODE (operands[1]),
				    XEXP (operands[1], 0)))
	     operands[1]
	       = replace_equiv_address (operands[1],
					copy_to_reg (XEXP (operands[1], 0)));
	}

      if (MEM_P (operands[1]) && optimize > 0)
	{
	  rtx reg = gen_reg_rtx (SImode);

	  emit_insn (gen_zero_extendqisi2 (reg, operands[1]));
	  operands[1] = gen_lowpart (QImode, reg);
	}

      if (MEM_P (operands[0]))
	operands[1] = force_reg (QImode, operands[1]);
    }
  else if (TARGET_THUMB
	   && CONST_INT_P (operands[1])
	   && !satisfies_constraint_I (operands[1]))
    {
      /* Handle loading a large integer during reload.  */

      /* Writing a constant to memory needs a scratch, which should
	 be handled with SECONDARY_RELOADs.  */
      gcc_assert (REG_P (operands[0]));

      operands[0] = gen_rtx_SUBREG (SImode, operands[0], 0);
      emit_insn (gen_movsi (operands[0], operands[1]));
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7363 */
rtx
gen_movhf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7367 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  gcc_checking_assert (aligned_operand (operands[0], HFmode));
  gcc_checking_assert (aligned_operand (operands[1], HFmode));
  if (TARGET_32BIT)
    {
      if (MEM_P (operands[0]))
	operands[1] = force_reg (HFmode, operands[1]);
    }
  else /* TARGET_THUMB1 */
    {
      if (can_create_pseudo_p ())
        {
           if (!REG_P (operands[0]))
	     operands[1] = force_reg (HFmode, operands[1]);
        }
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7363 */
rtx
gen_movbf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7367 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  gcc_checking_assert (aligned_operand (operands[0], BFmode));
  gcc_checking_assert (aligned_operand (operands[1], BFmode));
  if (TARGET_32BIT)
    {
      if (MEM_P (operands[0]))
	operands[1] = force_reg (BFmode, operands[1]);
    }
  else /* TARGET_THUMB1 */
    {
      if (can_create_pseudo_p ())
        {
           if (!REG_P (operands[0]))
	     operands[1] = force_reg (BFmode, operands[1]);
        }
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7431 */
rtx
gen_movsf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7435 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  gcc_checking_assert (aligned_operand (operands[0], SFmode));
  gcc_checking_assert (aligned_operand (operands[1], SFmode));
  if (TARGET_32BIT)
    {
      if (MEM_P (operands[0]))
        operands[1] = force_reg (SFmode, operands[1]);
    }
  else /* TARGET_THUMB1 */
    {
      if (can_create_pseudo_p ())
        {
           if (!REG_P (operands[0]))
	     operands[1] = force_reg (SFmode, operands[1]);
        }
    }

  /* Cannot load it directly, generate a load with clobber so that it can be
     loaded via GPR with MOV / MOVT.  */
  if (arm_disable_literal_pool
      && (REG_P (operands[0]) || SUBREG_P (operands[0]))
      && CONST_DOUBLE_P (operands[1])
      && TARGET_VFP_BASE
      && !vfp3_const_double_rtx (operands[1]))
    {
      rtx clobreg = gen_reg_rtx (SFmode);
      emit_insn (gen_no_literal_pool_sf_immediate (operands[0], operands[1],
						   clobreg));
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7470 */
extern rtx_insn *gen_split_68 (rtx_insn *, rtx *);
rtx_insn *
gen_split_68 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_68 (arm.md:7470)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7477 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[2] = gen_lowpart (SImode, operands[0]);
  operands[3] = gen_lowpart (SImode, operands[1]);
  if (operands[2] == 0 || operands[3] == 0)
    FAIL;
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7514 */
extern rtx_insn *gen_split_69 (rtx_insn *, rtx *);
rtx_insn *
gen_split_69 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_69 (arm.md:7514)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7519 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  long buf;
  real_to_target (&buf, CONST_DOUBLE_REAL_VALUE (operands[1]), SFmode);
  rtx cst = gen_int_mode (buf, SImode);
  emit_move_insn (simplify_gen_subreg (SImode, operands[0], SFmode, 0), cst);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7528 */
rtx
gen_movdf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7532 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  gcc_checking_assert (aligned_operand (operands[0], DFmode));
  gcc_checking_assert (aligned_operand (operands[1], DFmode));
  if (TARGET_32BIT)
    {
      if (MEM_P (operands[0]))
        operands[1] = force_reg (DFmode, operands[1]);
    }
  else /* TARGET_THUMB */
    {
      if (can_create_pseudo_p ())
        {
          if (!REG_P (operands[0]))
	    operands[1] = force_reg (DFmode, operands[1]);
        }
    }

  /* Cannot load it directly, generate a load with clobber so that it can be
     loaded via GPR with MOV / MOVT.  */
  if (arm_disable_literal_pool
      && (REG_P (operands[0]) || SUBREG_P (operands[0]))
      && CONSTANT_P (operands[1])
      && TARGET_VFP_BASE
      && !arm_const_double_rtx (operands[1])
      && !(TARGET_VFP_DOUBLE && vfp3_const_double_rtx (operands[1])))
    {
      rtx clobreg = gen_reg_rtx (DImode);
      emit_insn (gen_no_literal_pool_df_immediate (operands[0], operands[1],
						   clobreg));
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7569 */
rtx
gen_reload_outdf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7574 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    enum rtx_code code = GET_CODE (XEXP (operands[0], 0));

    if (code == REG)
      operands[2] = XEXP (operands[0], 0);
    else if (code == POST_INC || code == PRE_DEC)
      {
	operands[0] = gen_rtx_SUBREG (DImode, operands[0], 0);
	operands[1] = gen_rtx_SUBREG (DImode, operands[1], 0);
	emit_insn (gen_movdi (operands[0], operands[1]));
	DONE;
      }
    else if (code == PRE_INC)
      {
	rtx reg = XEXP (XEXP (operands[0], 0), 0);

	emit_insn (gen_addsi3 (reg, reg, GEN_INT (8)));
	operands[2] = reg;
      }
    else if (code == POST_DEC)
      operands[2] = XEXP (XEXP (operands[0], 0), 0);
    else
      emit_insn (gen_addsi3 (operands[2], XEXP (XEXP (operands[0], 0), 0),
			     XEXP (XEXP (operands[0], 0), 1)));

    emit_insn (gen_rtx_SET (replace_equiv_address (operands[0], operands[2]),
			    operands[1]));

    if (code == POST_DEC)
      emit_insn (gen_addsi3 (operands[2], operands[2], GEN_INT (-8)));

    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7641 */
extern rtx_insn *gen_split_70 (rtx_insn *, rtx *);
rtx_insn *
gen_split_70 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_70 (arm.md:7641)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7646 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  long buf[2];
  int order = BYTES_BIG_ENDIAN ? 1 : 0;
  real_to_target (buf, CONST_DOUBLE_REAL_VALUE (operands[1]), DFmode);
  unsigned HOST_WIDE_INT ival = zext_hwi (buf[order], 32);
  ival |= (zext_hwi (buf[1 - order], 32) << 32);
  rtx cst = gen_int_mode (ival, DImode);
  emit_move_insn (simplify_gen_subreg (DImode, operands[0], DFmode, 0), cst);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7663 */
rtx
gen_load_multiple (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7668 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  HOST_WIDE_INT offset = 0;

  /* Support only fixed point registers.  */
  if (!CONST_INT_P (operands[2])
      || INTVAL (operands[2]) > MAX_LDM_STM_OPS
      || INTVAL (operands[2]) < 2
      || !MEM_P (operands[1])
      || !REG_P (operands[0])
      || REGNO (operands[0]) > (LAST_ARM_REGNUM - 1)
      || REGNO (operands[0]) + INTVAL (operands[2]) > LAST_ARM_REGNUM)
    FAIL;

  operands[3]
    = arm_gen_load_multiple (arm_regs_in_sequence + REGNO (operands[0]),
			     INTVAL (operands[2]),
			     force_reg (SImode, XEXP (operands[1], 0)),
			     FALSE, operands[1], &offset);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (operand3);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7688 */
rtx
gen_store_multiple (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7693 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  HOST_WIDE_INT offset = 0;

  /* Support only fixed point registers.  */
  if (!CONST_INT_P (operands[2])
      || INTVAL (operands[2]) > MAX_LDM_STM_OPS
      || INTVAL (operands[2]) < 2
      || !REG_P (operands[1])
      || !MEM_P (operands[0])
      || REGNO (operands[1]) > (LAST_ARM_REGNUM - 1)
      || REGNO (operands[1]) + INTVAL (operands[2]) > LAST_ARM_REGNUM)
    FAIL;

  operands[3]
    = arm_gen_store_multiple (arm_regs_in_sequence + REGNO (operands[1]),
			      INTVAL (operands[2]),
			      force_reg (SImode, XEXP (operands[0], 0)),
			      FALSE, operands[0], &offset);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (operand3);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7714 */
rtx
gen_setmemsi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7720 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  if (arm_gen_setmem (operands))
    DONE;

  FAIL;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7732 */
rtx
gen_cpymemqi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7738 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  if (TARGET_32BIT)
    {
      if (TARGET_LDRD && current_tune->prefer_ldrd_strd
          && !optimize_function_for_size_p (cfun))
        {
          if (gen_cpymem_ldrd_strd (operands))
            DONE;
          FAIL;
        }

      if (arm_gen_cpymemqi (operands))
        DONE;
      FAIL;
    }
  else /* TARGET_THUMB1 */
    {
      if (   INTVAL (operands[3]) != 4
          || INTVAL (operands[2]) > 48)
        FAIL;

      thumb_expand_cpymemqi (operands);
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7789 */
rtx
gen_cbranchsi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7797 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  if (!TARGET_THUMB1)
    {
      if (!arm_validize_comparison (&operands[0], &operands[1], &operands[2]))
        FAIL;
      emit_jump_insn (gen_cbranch_cc (operands[0], operands[1], operands[2],
				      operands[3]));
      DONE;
    }
  if (thumb1_cmpneg_operand (operands[2], SImode))
    {
      emit_jump_insn (gen_cbranchsi4_scratch (NULL, operands[1], operands[2],
					      operands[3], operands[0]));
      DONE;
    }
  if (!thumb1_cmp_operand (operands[2], SImode))
    operands[2] = force_reg (SImode, operands[2]);
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_jump_insn (gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand0), VOIDmode,
		operand1,
		operand2),
	gen_rtx_LABEL_REF (VOIDmode,
	operand3),
	pc_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7816 */
rtx
gen_cbranchsf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7824 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
emit_jump_insn (gen_cbranch_cc (operands[0], operands[1], operands[2],
				   operands[3])); DONE;
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_jump_insn (gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand0), VOIDmode,
		operand1,
		operand2),
	gen_rtx_LABEL_REF (VOIDmode,
	operand3),
	pc_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7828 */
rtx
gen_cbranchdf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7836 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
emit_jump_insn (gen_cbranch_cc (operands[0], operands[1], operands[2],
				   operands[3])); DONE;
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_jump_insn (gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand0), VOIDmode,
		operand1,
		operand2),
	gen_rtx_LABEL_REF (VOIDmode,
	operand3),
	pc_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7840 */
rtx
gen_cbranchdi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
     if (!arm_validize_comparison (&operands[0], &operands[1], &operands[2]))
       FAIL;
     emit_jump_insn (gen_cbranch_cc (operands[0], operands[1], operands[2],
				       operands[3]));
     DONE;
   }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_jump_insn (gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand0), VOIDmode,
		operand1,
		operand2),
	gen_rtx_LABEL_REF (VOIDmode,
	operand3),
	pc_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:7938 */
rtx
gen_cbranch_cc (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7945 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
operands[1] = arm_gen_compare_reg (GET_CODE (operands[0]),
				      operands[1], operands[2], NULL_RTX);
   operands[2] = const0_rtx;
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_jump_insn (gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand0), VOIDmode,
		operand1,
		operand2),
	gen_rtx_LABEL_REF (VOIDmode,
	operand3),
	pc_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8064 */
rtx
gen_cstore_cc (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8069 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
operands[2] = arm_gen_compare_reg (GET_CODE (operands[1]),
				      operands[2], operands[3], NULL_RTX);
   operands[3] = const0_rtx;
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), SImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8074 */
extern rtx_insn *gen_split_71 (rtx_insn *, rtx *);
rtx_insn *
gen_split_71 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_71 (arm.md:8074)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8085 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	operand1,
	const1_rtx,
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8101 */
extern rtx_insn *gen_split_72 (rtx_insn *, rtx *);
rtx_insn *
gen_split_72 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_72 (arm.md:8101)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8112 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    operands[3] = GEN_INT (~0);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	operand1,
	operand3,
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8120 */
extern rtx_insn *gen_split_73 (rtx_insn *, rtx *);
rtx_insn *
gen_split_73 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_73 (arm.md:8120)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8131 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    operands[3] = GEN_INT (~1);
    operands[4] = GEN_INT (~0);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	operand1,
	operand3,
	operand4)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8140 */
rtx
gen_cstoresi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8146 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  rtx op3, scratch, scratch2;

  if (!TARGET_THUMB1)
    {
      if (!arm_add_operand (operands[3], SImode))
	operands[3] = force_reg (SImode, operands[3]);
      emit_insn (gen_cstore_cc (operands[0], operands[1],
				operands[2], operands[3]));
      DONE;
    }

  if (operands[3] == const0_rtx)
    {
      switch (GET_CODE (operands[1]))
	{
	case EQ:
	  emit_insn (gen_cstoresi_eq0_thumb1 (operands[0], operands[2]));
	  break;

	case NE:
	  emit_insn (gen_cstoresi_ne0_thumb1 (operands[0], operands[2]));
	  break;

	case LE:
          scratch = expand_binop (SImode, add_optab, operands[2], constm1_rtx,
				  NULL_RTX, 0, OPTAB_WIDEN);
          scratch = expand_binop (SImode, ior_optab, operands[2], scratch,
				  NULL_RTX, 0, OPTAB_WIDEN);
          expand_binop (SImode, lshr_optab, scratch, GEN_INT (31),
			operands[0], 1, OPTAB_WIDEN);
	  break;

        case GE:
          scratch = expand_unop (SImode, one_cmpl_optab, operands[2],
				 NULL_RTX, 1);
          expand_binop (SImode, lshr_optab, scratch, GEN_INT (31),
			NULL_RTX, 1, OPTAB_WIDEN);
          break;

        case GT:
          scratch = expand_binop (SImode, ashr_optab, operands[2],
				  GEN_INT (31), NULL_RTX, 0, OPTAB_WIDEN);
          scratch = expand_binop (SImode, sub_optab, scratch, operands[2],
				  NULL_RTX, 0, OPTAB_WIDEN);
          expand_binop (SImode, lshr_optab, scratch, GEN_INT (31), operands[0],
			0, OPTAB_WIDEN);
          break;

	/* LT is handled by generic code.  No need for unsigned with 0.  */
	default:
	  FAIL;
	}
      DONE;
    }

  switch (GET_CODE (operands[1]))
    {
    case EQ:
      scratch = expand_binop (SImode, sub_optab, operands[2], operands[3],
			      NULL_RTX, 0, OPTAB_WIDEN);
      emit_insn (gen_cstoresi_eq0_thumb1 (operands[0], scratch));
      break;

    case NE:
      scratch = expand_binop (SImode, sub_optab, operands[2], operands[3],
			      NULL_RTX, 0, OPTAB_WIDEN);
      emit_insn (gen_cstoresi_ne0_thumb1 (operands[0], scratch));
      break;

    case LE:
      op3 = force_reg (SImode, operands[3]);

      scratch = expand_binop (SImode, lshr_optab, operands[2], GEN_INT (31),
			      NULL_RTX, 1, OPTAB_WIDEN);
      scratch2 = expand_binop (SImode, ashr_optab, op3, GEN_INT (31),
			      NULL_RTX, 0, OPTAB_WIDEN);
      emit_insn (gen_thumb1_addsi3_addgeu (operands[0], scratch, scratch2,
					  op3, operands[2]));
      break;

    case GE:
      op3 = operands[3];
      if (!thumb1_cmp_operand (op3, SImode))
        op3 = force_reg (SImode, op3);
      scratch = expand_binop (SImode, ashr_optab, operands[2], GEN_INT (31),
			      NULL_RTX, 0, OPTAB_WIDEN);
      scratch2 = expand_binop (SImode, lshr_optab, op3, GEN_INT (31),
			       NULL_RTX, 1, OPTAB_WIDEN);
      emit_insn (gen_thumb1_addsi3_addgeu (operands[0], scratch, scratch2,
					  operands[2], op3));
      break;

    case LEU:
      op3 = force_reg (SImode, operands[3]);
      scratch = force_reg (SImode, const0_rtx);
      emit_insn (gen_thumb1_addsi3_addgeu (operands[0], scratch, scratch,
					  op3, operands[2]));
      break;

    case GEU:
      op3 = operands[3];
      if (!thumb1_cmp_operand (op3, SImode))
        op3 = force_reg (SImode, op3);
      scratch = force_reg (SImode, const0_rtx);
      emit_insn (gen_thumb1_addsi3_addgeu (operands[0], scratch, scratch,
					  operands[2], op3));
      break;

    case LTU:
      op3 = operands[3];
      if (!thumb1_cmp_operand (op3, SImode))
        op3 = force_reg (SImode, op3);
      scratch = gen_reg_rtx (SImode);
      emit_insn (gen_cstoresi_ltu_thumb1 (operands[0], operands[2], op3));
      break;

    case GTU:
      op3 = force_reg (SImode, operands[3]);
      scratch = gen_reg_rtx (SImode);
      emit_insn (gen_cstoresi_ltu_thumb1 (operands[0], op3, operands[2]));
      break;

    /* No good sequences for GT, LT.  */
    default:
      FAIL;
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), SImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8276 */
rtx
gen_cstorehf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8282 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    if (!arm_validize_comparison (&operands[1],
				  &operands[2],
				  &operands[3]))
       FAIL;

    emit_insn (gen_cstore_cc (operands[0], operands[1],
			      operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), SImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8294 */
rtx
gen_cstoresf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8300 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
emit_insn (gen_cstore_cc (operands[0], operands[1],
			     operands[2], operands[3])); DONE;
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), SImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8304 */
rtx
gen_cstoredf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8310 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
emit_insn (gen_cstore_cc (operands[0], operands[1],
			     operands[2], operands[3])); DONE;
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), SImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8314 */
rtx
gen_cstoredi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8320 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
     if (!arm_validize_comparison (&operands[1],
     				   &operands[2],
				   &operands[3]))
       FAIL;
     emit_insn (gen_cstore_cc (operands[0], operands[1], operands[2],
		      	         operands[3]));
     DONE;
   }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), SImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8334 */
rtx
gen_movsicc (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8340 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    enum rtx_code code;
    rtx ccreg;

    if (!arm_validize_comparison (&operands[1], &XEXP (operands[1], 0), 
				  &XEXP (operands[1], 1)))
      FAIL;

    code = GET_CODE (operands[1]);
    ccreg = arm_gen_compare_reg (code, XEXP (operands[1], 0),
				 XEXP (operands[1], 1), NULL_RTX);
    operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	operand1,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8356 */
rtx
gen_movhfcc (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8362 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    enum rtx_code code = GET_CODE (operands[1]);
    rtx ccreg;

    if (!arm_validize_comparison (&operands[1], &XEXP (operands[1], 0),
				  &XEXP (operands[1], 1)))
      FAIL;

    code = GET_CODE (operands[1]);
    ccreg = arm_gen_compare_reg (code, XEXP (operands[1], 0),
				 XEXP (operands[1], 1), NULL_RTX);
    operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (HFmode,
	operand1,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8378 */
rtx
gen_movsfcc (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8384 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    enum rtx_code code = GET_CODE (operands[1]);
    rtx ccreg;

    if (!arm_validize_comparison (&operands[1], &XEXP (operands[1], 0),
       				  &XEXP (operands[1], 1)))
       FAIL;

    code = GET_CODE (operands[1]);
    ccreg = arm_gen_compare_reg (code, XEXP (operands[1], 0),
				 XEXP (operands[1], 1), NULL_RTX);
    operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SFmode,
	operand1,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8400 */
rtx
gen_movdfcc (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8406 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    enum rtx_code code = GET_CODE (operands[1]);
    rtx ccreg;

    if (!arm_validize_comparison (&operands[1], &XEXP (operands[1], 0), 
       				  &XEXP (operands[1], 1)))
       FAIL;
    code = GET_CODE (operands[1]);
    ccreg = arm_gen_compare_reg (code, XEXP (operands[1], 0),
				 XEXP (operands[1], 1), NULL_RTX);
    operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (DFmode,
	operand1,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8485 */
extern rtx_insn *gen_split_74 (rtx_insn *, rtx *);
rtx_insn *
gen_split_74 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_74 (arm.md:8485)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8508 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    enum rtx_code rev_code;
    machine_mode mode;
    rtx rev_cond;

    emit_insn (gen_rtx_COND_EXEC (VOIDmode,
                                  operands[3],
                                  gen_rtx_SET (operands[0], operands[1])));

    rev_code = GET_CODE (operands[3]);
    mode = GET_MODE (operands[4]);
    if (mode == CCFPmode || mode == CCFPEmode)
      rev_code = reverse_condition_maybe_unordered (rev_code);
    else
      rev_code = reverse_condition (rev_code);

    rev_cond = gen_rtx_fmt_ee (rev_code,
                               VOIDmode,
                               operands[4],
                               const0_rtx);
    emit_insn (gen_rtx_COND_EXEC (VOIDmode,
                                  rev_cond,
                                  gen_rtx_SET (operands[0], operands[2])));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8567 */
rtx
gen_jump (rtx operand0)
{
  return gen_rtx_SET (pc_rtx,
	gen_rtx_LABEL_REF (VOIDmode,
	operand0));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8599 */
rtx
gen_call (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8605 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    rtx callee, pat;
    tree addr = MEM_EXPR (operands[0]);
    
    /* In an untyped call, we can get NULL for operand 2.  */
    if (operands[2] == NULL_RTX)
      operands[2] = const0_rtx;
      
    /* Decide if we should generate indirect calls by loading the
       32-bit address of the callee into a register before performing the
       branch and link.  */
    callee = XEXP (operands[0], 0);
    if (GET_CODE (callee) == SYMBOL_REF
	? arm_is_long_call_p (SYMBOL_REF_DECL (callee))
	: !REG_P (callee))
      XEXP (operands[0], 0) = force_reg (Pmode, callee);

    if (TARGET_FDPIC && !SYMBOL_REF_P (XEXP (operands[0], 0)))
	/* Indirect call: set r9 with FDPIC value of callee.  */
	XEXP (operands[0], 0)
	  = arm_load_function_descriptor (XEXP (operands[0], 0));

    if (detect_cmse_nonsecure_call (addr))
      {
	pat = gen_nonsecure_call_internal (operands[0], operands[1],
					   operands[2]);
	emit_call_insn (pat);
      }
    else
      {
	pat = gen_call_internal (operands[0], operands[1], operands[2]);
	arm_emit_call_insn (pat, XEXP (operands[0], 0), false);
      }

    /* Restore FDPIC register (r9) after call.  */
    if (TARGET_FDPIC)
      {
	rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
	rtx initial_fdpic_reg
	    = get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);

	emit_insn (gen_restore_pic_register_after_call (fdpic_reg,
							initial_fdpic_reg));
      }

    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_call_insn (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_CALL (VOIDmode,
	operand0,
	operand1),
		gen_rtx_USE (VOIDmode,
	operand2),
		gen_hard_reg_clobber (SImode, 14))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8666 */
rtx
gen_call_internal (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_CALL (VOIDmode,
	operand0,
	operand1),
		gen_rtx_USE (VOIDmode,
	operand2),
		gen_hard_reg_clobber (SImode, 14)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8672 */
rtx
gen_nonsecure_call_internal (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8679 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    rtx addr = XEXP (operands[0], 0);
    rtx tmp = REG_P (addr) ? addr : force_reg (SImode, addr);

    if (!TARGET_HAVE_FPCXT_CMSE)
      {
	rtx r4 = gen_rtx_REG (SImode, R4_REGNUM);
	emit_move_insn (r4, tmp);
	tmp = r4;
      }

    if (tmp != addr)
      operands[0] = replace_equiv_address (operands[0], tmp);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_call_insn (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_CALL (VOIDmode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand0),
	39),
	operand1),
		gen_rtx_USE (VOIDmode,
	operand2),
		gen_hard_reg_clobber (SImode, 14))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8720 */
rtx
gen_call_value (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8727 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    rtx pat, callee;
    tree addr = MEM_EXPR (operands[1]);
    
    /* In an untyped call, we can get NULL for operand 2.  */
    if (operands[3] == 0)
      operands[3] = const0_rtx;
      
    /* Decide if we should generate indirect calls by loading the
       32-bit address of the callee into a register before performing the
       branch and link.  */
    callee = XEXP (operands[1], 0);
    if (GET_CODE (callee) == SYMBOL_REF
	? arm_is_long_call_p (SYMBOL_REF_DECL (callee))
	: !REG_P (callee))
      XEXP (operands[1], 0) = force_reg (Pmode, callee);

    if (TARGET_FDPIC && !SYMBOL_REF_P (XEXP (operands[1], 0)))
	/* Indirect call: set r9 with FDPIC value of callee.  */
	XEXP (operands[1], 0)
	  = arm_load_function_descriptor (XEXP (operands[1], 0));

    if (detect_cmse_nonsecure_call (addr))
      {
	pat = gen_nonsecure_call_value_internal (operands[0], operands[1],
						 operands[2], operands[3]);
	emit_call_insn (pat);
      }
    else
      {
	pat = gen_call_value_internal (operands[0], operands[1],
				       operands[2], operands[3]);
	arm_emit_call_insn (pat, XEXP (operands[1], 0), false);
      }

    /* Restore FDPIC register (r9) after call.  */
    if (TARGET_FDPIC)
      {
	rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
	rtx initial_fdpic_reg
	    = get_hard_reg_initial_val (Pmode, FDPIC_REGNUM);

	emit_insn (gen_restore_pic_register_after_call (fdpic_reg,
							initial_fdpic_reg));
      }

    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_call_insn (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_CALL (VOIDmode,
	operand1,
	operand2)),
		gen_rtx_USE (VOIDmode,
	operand3),
		gen_hard_reg_clobber (SImode, 14))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8778 */
rtx
gen_call_value_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_CALL (VOIDmode,
	operand1,
	operand2)),
		gen_rtx_USE (VOIDmode,
	operand3),
		gen_hard_reg_clobber (SImode, 14)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8785 */
rtx
gen_nonsecure_call_value_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8793 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    if (!TARGET_HAVE_FPCXT_CMSE)
      {
	rtx tmp =
	  copy_to_suggested_reg (XEXP (operands[1], 0),
				 gen_rtx_REG (SImode, R4_REGNUM),
				 SImode);

	operands[1] = replace_equiv_address (operands[1], tmp);
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_call_insn (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_CALL (VOIDmode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	39),
	operand2)),
		gen_rtx_USE (VOIDmode,
	operand3),
		gen_hard_reg_clobber (SImode, 14))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8881 */
rtx
gen_sibcall_internal (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_CALL (VOIDmode,
	operand0,
	operand1),
		ret_rtx,
		gen_rtx_USE (VOIDmode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8888 */
rtx
gen_sibcall (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8894 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    rtx pat;

    if ((!REG_P (XEXP (operands[0], 0))
	 && GET_CODE (XEXP (operands[0], 0)) != SYMBOL_REF)
	|| (GET_CODE (XEXP (operands[0], 0)) == SYMBOL_REF
	    && arm_is_long_call_p (SYMBOL_REF_DECL (XEXP (operands[0], 0)))))
     XEXP (operands[0], 0) = force_reg (SImode, XEXP (operands[0], 0));

    if (operands[2] == NULL_RTX)
      operands[2] = const0_rtx;

    pat = gen_sibcall_internal (operands[0], operands[1], operands[2]);
    arm_emit_call_insn (pat, operands[0], true);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_call_insn (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_CALL (VOIDmode,
	operand0,
	operand1),
		ret_rtx,
		gen_rtx_USE (VOIDmode,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8913 */
rtx
gen_sibcall_value_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_CALL (VOIDmode,
	operand1,
	operand2)),
		ret_rtx,
		gen_rtx_USE (VOIDmode,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8920 */
rtx
gen_sibcall_value (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8927 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    rtx pat;

    if ((!REG_P (XEXP (operands[1], 0))
	 && GET_CODE (XEXP (operands[1], 0)) != SYMBOL_REF)
	|| (GET_CODE (XEXP (operands[1], 0)) == SYMBOL_REF
	    && arm_is_long_call_p (SYMBOL_REF_DECL (XEXP (operands[1], 0)))))
     XEXP (operands[1], 0) = force_reg (SImode, XEXP (operands[1], 0));

    if (operands[3] == NULL_RTX)
      operands[3] = const0_rtx;

    pat = gen_sibcall_value_internal (operands[0], operands[1],
                                      operands[2], operands[3]);
    arm_emit_call_insn (pat, operands[1], true);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_call_insn (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_CALL (VOIDmode,
	operand1,
	operand2)),
		ret_rtx,
		gen_rtx_USE (VOIDmode,
	operand3))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8988 */
rtx
gen_return (void)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8994 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    if (TARGET_THUMB2)
      {
        thumb2_expand_return (false);
        DONE;
      }
  }
  
#undef DONE
#undef FAIL
  }
  emit_jump_insn (ret_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:8988 */
rtx
gen_simple_return (void)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8994 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    if (TARGET_THUMB2)
      {
        thumb2_expand_return (true);
        DONE;
      }
  }
  
#undef DONE
#undef FAIL
  }
  emit_jump_insn (simple_return_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9088 */
rtx
gen_return_addr_mask (rtx operand0)
{
  rtx operand1;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9097 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[1] = gen_rtx_REG (CC_NZmode, CC_REGNUM);
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand1,
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_UNSPEC (VOIDmode,
	gen_rtvec (1,
		const0_rtx),
	5),
	const0_rtx)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	gen_rtx_EQ (VOIDmode,
	copy_rtx (operand1),
	const0_rtx),
	constm1_rtx,
	GEN_INT (67108860L))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9114 */
rtx
gen_untyped_call (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9120 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    int i;
    rtx par = gen_rtx_PARALLEL (VOIDmode,
				rtvec_alloc (XVECLEN (operands[2], 0)));
    rtx addr = gen_reg_rtx (Pmode);
    rtx mem;
    int size = 0;

    emit_move_insn (addr, XEXP (operands[1], 0));
    mem = change_address (operands[1], BLKmode, addr);

    for (i = 0; i < XVECLEN (operands[2], 0); i++)
      {
	rtx src = SET_SRC (XVECEXP (operands[2], 0, i));

	/* Default code only uses r0 as a return value, but we could
	   be using anything up to 4 registers.  */
	if (REGNO (src) == R0_REGNUM)
	  src = gen_rtx_REG (TImode, R0_REGNUM);

        XVECEXP (par, 0, i) = gen_rtx_EXPR_LIST (VOIDmode, src,
						 GEN_INT (size));
        size += GET_MODE_SIZE (GET_MODE (src));
      }

    emit_call_insn (gen_call_value (par, operands[0], const0_rtx, NULL));

    size = 0;

    for (i = 0; i < XVECLEN (par, 0); i++)
      {
	HOST_WIDE_INT offset = 0;
	rtx reg = XEXP (XVECEXP (par, 0, i), 0);

	if (size != 0)
	  emit_move_insn (addr, plus_constant (Pmode, addr, size));

	mem = change_address (mem, GET_MODE (reg), NULL);
	if (REGNO (reg) == R0_REGNUM)
	  {
	    /* On thumb we have to use a write-back instruction.  */
	    emit_insn (arm_gen_store_multiple (arm_regs_in_sequence, 4, addr,
 		       TARGET_THUMB ? TRUE : FALSE, mem, &offset));
	    size = TARGET_ARM ? 16 : 0;
	  }
	else
	  {
	    emit_move_insn (mem, reg);
	    size = GET_MODE_SIZE (GET_MODE (reg));
	  }
      }

    /* The optimizer does not know that the call sets the function value
       registers we stored in the result block.  We avoid problems by
       claiming that all hard registers are used and clobbered at this
       point.  */
    emit_insn (gen_blockage ());

    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_call_insn (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_CALL (VOIDmode,
	operand0,
	const0_rtx),
		operand1,
		operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9183 */
rtx
gen_untyped_return (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9187 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    int i;
    rtx addr = gen_reg_rtx (Pmode);
    rtx mem;
    int size = 0;

    emit_move_insn (addr, XEXP (operands[0], 0));
    mem = change_address (operands[0], BLKmode, addr);

    for (i = 0; i < XVECLEN (operands[1], 0); i++)
      {
	HOST_WIDE_INT offset = 0;
	rtx reg = SET_DEST (XVECEXP (operands[1], 0, i));

	if (size != 0)
	  emit_move_insn (addr, plus_constant (Pmode, addr, size));

	mem = change_address (mem, GET_MODE (reg), NULL);
	if (REGNO (reg) == R0_REGNUM)
	  {
	    /* On thumb we have to use a write-back instruction.  */
	    emit_insn (arm_gen_load_multiple (arm_regs_in_sequence, 4, addr,
 		       TARGET_THUMB ? TRUE : FALSE, mem, &offset));
	    size = TARGET_ARM ? 16 : 0;
	  }
	else
	  {
	    emit_move_insn (reg, mem);
	    size = GET_MODE_SIZE (GET_MODE (reg));
	  }
      }

    /* Emit USE insns before the return.  */
    for (i = 0; i < XVECLEN (operands[1], 0); i++)
      emit_use (SET_DEST (XVECEXP (operands[1], 0, i)));

    /* Construct the return.  */
    expand_naked_return ();

    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9268 */
rtx
gen_stack_protect_combined_set (rtx operand0,
	rtx operand1)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	40)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9284 */
extern rtx_insn *gen_split_75 (rtx_insn *, rtx *);
rtx_insn *
gen_split_75 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_75 (arm.md:9284)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9296 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

{
  if (flag_pic)
    {
      rtx pic_reg;

      if (TARGET_FDPIC)
	  pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
      else
	  pic_reg = operands[3];

      /* Forces recomputing of GOT base now.  */
      legitimize_pic_address (operands[1], SImode, operands[2], pic_reg,
			      true /*compute_now*/);
    }
  else
    {
      if (address_operand (operands[1], SImode))
	operands[2] = operands[1];
      else
	{
	  rtx mem = force_const_mem (SImode, operands[1]);
	  if (!general_operand (mem, SImode))
	    {
	      emit_move_insn (operands[2], XEXP (mem, 0));
	      mem = replace_equiv_address (mem, operands[2], false);
	    }
	  emit_move_insn (operands[2], mem);
	}
    }
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		gen_rtx_MEM (SImode,
	operand2)),
	40)),
		gen_rtx_CLOBBER (VOIDmode,
	copy_rtx (operand2)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9347 */
rtx
gen_stack_protect_combined_test (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_EQ (VOIDmode,
	operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	41)),
	gen_rtx_LABEL_REF (VOIDmode,
	operand2),
	pc_rtx)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_hard_reg_clobber (CCmode, 100)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9368 */
extern rtx_insn *gen_split_76 (rtx_insn *, rtx *);
rtx_insn *
gen_split_76 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_76 (arm.md:9368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9383 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  rtx eq;

  if (flag_pic)
    {
      rtx pic_reg;

      if (TARGET_FDPIC)
	  pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM);
      else
	  pic_reg = operands[4];

      /* Forces recomputing of GOT base now.  */
      legitimize_pic_address (operands[1], SImode, operands[3], pic_reg,
			      true /*compute_now*/);
    }
  else
    {
      if (address_operand (operands[1], SImode))
	operands[3] = operands[1];
      else
	{
	  rtx mem = force_const_mem (SImode, operands[1]);
	  if (!general_operand (mem, SImode))
	    {
	      emit_move_insn (operands[3], XEXP (mem, 0));
	      mem = replace_equiv_address (mem, operands[3], false);
	    }
	  emit_move_insn (operands[3], mem);
	}
    }
  if (TARGET_32BIT)
    {
      emit_insn (gen_arm_stack_protect_test_insn (operands[4], operands[0],
						  operands[3]));
      rtx cc_reg = gen_rtx_REG (CC_Zmode, CC_REGNUM);
      eq = gen_rtx_EQ (CC_Zmode, cc_reg, const0_rtx);
      emit_jump_insn (gen_arm_cond_branch (operands[2], eq, cc_reg));
    }
  else
    {
      emit_insn (gen_thumb1_stack_protect_test_insn (operands[4], operands[0],
						     operands[3]));
      eq = gen_rtx_EQ (VOIDmode, operands[4], const0_rtx);
      emit_jump_insn (gen_cbranchsi4 (eq, operands[4], const0_rtx,
				      operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9453 */
rtx
gen_stack_protect_set (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9457 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

{
  operands[1] = arm_stack_protect_tls_canary_mem (false /* reload */);
  emit_insn (gen_stack_protect_set_tls (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9479 */
rtx
gen_stack_protect_test (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9484 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

{
  operands[1] = arm_stack_protect_tls_canary_mem (true /* reload */);
  emit_insn (gen_stack_protect_test_tls (operands[0], operands[1]));

  rtx cc_reg = gen_rtx_REG (CC_Zmode, CC_REGNUM);
  rtx eq = gen_rtx_EQ (CC_Zmode, cc_reg, const0_rtx);
  emit_jump_insn (gen_arm_cond_branch (operands[2], eq, cc_reg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9511 */
rtx
gen_casesi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9518 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    enum insn_code code;
    if (operands[1] != const0_rtx)
      {
	rtx reg = gen_reg_rtx (SImode);

	emit_insn (gen_addsi3 (reg, operands[0],
			       gen_int_mode (-INTVAL (operands[1]),
			       		     SImode)));
	operands[0] = reg;
      }

    if (TARGET_ARM)
      code = CODE_FOR_arm_casesi_internal;
    else if (TARGET_THUMB1)
      code = CODE_FOR_thumb1_casesi_internal_pic;
    else if (flag_pic)
      code = CODE_FOR_thumb2_casesi_internal_pic;
    else
      code = CODE_FOR_thumb2_casesi_internal;

    if (!insn_data[(int) code].operand[1].predicate(operands[2], SImode))
      operands[2] = force_reg (SImode, operands[2]);

    emit_jump_insn (GEN_FCN ((int) code) (operands[0], operands[2],
					  operands[3], operands[4]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9551 */
rtx
gen_arm_casesi_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9561 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  operands[4] = gen_rtx_MULT (SImode, operands[0], GEN_INT (4));
  operands[4] = gen_rtx_PLUS (SImode, operands[4],
			      gen_rtx_LABEL_REF (SImode, operands[2]));
  operands[4] = gen_rtx_MEM (SImode, operands[4]);
  MEM_READONLY_P (operands[4]) = 1;
  MEM_NOTRAP_P (operands[4]) = 1;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_jump_insn (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_LEU (VOIDmode,
	operand0,
	operand1),
	operand4,
	gen_rtx_LABEL_REF (SImode,
	operand3))),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_USE (VOIDmode,
	gen_rtx_LABEL_REF (SImode,
	operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9591 */
rtx
gen_indirect_jump (rtx operand0)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[1];
    operands[0] = operand0;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9595 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  /* Thumb-2 doesn't have mov pc, reg.  Explicitly set the low bit of the
     address and use bx.  */
  if (TARGET_THUMB2)
    {
      rtx tmp;
      tmp = gen_reg_rtx (SImode);
      emit_insn (gen_iorsi3 (tmp, operands[0], GEN_INT(1)));
      operands[0] = tmp;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
  }
  emit_jump_insn (gen_rtx_SET (pc_rtx,
	operand0));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9690 */
extern rtx_insn *gen_split_77 (rtx_insn *, rtx *);
rtx_insn *
gen_split_77 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx operand8;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_77 (arm.md:9690)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9706 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  operand8 = operands[8];
  (void) operand8;
  emit_insn (gen_rtx_SET (operand8,
	gen_rtx_fmt_ee (GET_CODE (operand2), GET_MODE (operand2),
		gen_rtx_fmt_ee (GET_CODE (operand3), GET_MODE (operand3),
		operand4,
		operand5),
		operand6)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), GET_MODE (operand1),
		copy_rtx (operand8),
		operand7)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9793 */
extern rtx_insn *gen_split_78 (rtx_insn *, rtx *);
rtx_insn *
gen_split_78 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_78 (arm.md:9793)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9804 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    machine_mode mode = GET_MODE (operands[2]);
    enum rtx_code rc = GET_CODE (operands[1]);

    /* Note that operands[4] is the same as operands[1],
       but with VOIDmode as the result. */
    operands[4] = gen_rtx_fmt_ee (rc, VOIDmode, operands[2], const0_rtx);
    if (mode == CCFPmode || mode == CCFPEmode)
      rc = reverse_condition_maybe_unordered (rc);
    else
      rc = reverse_condition (rc);
    operands[5] = gen_rtx_fmt_ee (rc, VOIDmode, operands[2], const0_rtx);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	operand5,
	gen_rtx_SET (operand0,
	const0_rtx)));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	operand4,
	gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_AND (SImode,
	operand3,
	const1_rtx))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9822 */
extern rtx_insn *gen_split_79 (rtx_insn *, rtx *);
rtx_insn *
gen_split_79 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_79 (arm.md:9822)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9838 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    machine_mode mode = GET_MODE (operands[2]);
    enum rtx_code rc = GET_CODE (operands[1]);

    /* Note that operands[4] is the same as operands[1],
       but with VOIDmode as the result. */
    operands[4] = gen_rtx_fmt_ee (rc, VOIDmode, operands[2], const0_rtx);
    if (mode == CCFPmode || mode == CCFPEmode)
      rc = reverse_condition_maybe_unordered (rc);
    else
      rc = reverse_condition (rc);
    operands[5] = gen_rtx_fmt_ee (rc, VOIDmode, operands[2], const0_rtx);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	operand5,
	gen_rtx_SET (operand0,
	operand3)));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	operand4,
	gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_IOR (SImode,
	copy_rtx (operand3),
	const1_rtx))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9858 */
extern rtx_insn *gen_split_80 (rtx_insn *, rtx *);
rtx_insn *
gen_split_80 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_80 (arm.md:9858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (SImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (31)])));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9866 */
extern rtx_insn *gen_split_81 (rtx_insn *, rtx *);
rtx_insn *
gen_split_81 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_81 (arm.md:9866)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NOT (SImode,
	operand1)));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_LSHIFTRT (SImode,
	copy_rtx (operand0),
	const_int_rtx[MAX_SAVED_CONST_INT + (31)])));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9875 */
extern rtx_insn *gen_split_82 (rtx_insn *, rtx *);
rtx_insn *
gen_split_82 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_82 (arm.md:9875)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_CLZ (SImode,
	operand1)));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_LSHIFTRT (SImode,
	copy_rtx (operand0),
	const_int_rtx[MAX_SAVED_CONST_INT + (5)])));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9885 */
extern rtx_insn *gen_split_83 (rtx_insn *, rtx *);
rtx_insn *
gen_split_83 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_83 (arm.md:9885)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_COMPARE (CCmode,
	const1_rtx,
	operand1)),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	const1_rtx,
	copy_rtx (operand1))))), true);
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_LTU (CCmode,
	gen_rtx_REG (CCmode,
	100),
	const0_rtx),
	gen_rtx_SET (copy_rtx (operand0),
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9899 */
extern rtx_insn *gen_split_84 (rtx_insn *, rtx *);
rtx_insn *
gen_split_84 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_84 (arm.md:9899)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9911 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  operands[3] = gen_int_mode (-INTVAL (operands[2]), SImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand2)),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	operand3)))), true);
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_NE (CCmode,
	gen_rtx_REG (CCmode,
	100),
	const0_rtx),
	gen_rtx_SET (copy_rtx (operand0),
	const1_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9915 */
extern rtx_insn *gen_split_85 (rtx_insn *, rtx *);
rtx_insn *
gen_split_85 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_85 (arm.md:9915)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	100),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_MINUS (SImode,
	operand1,
	operand2),
	const0_rtx)),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2))))), true);
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_NE (CC_NZmode,
	gen_rtx_REG (CC_NZmode,
	100),
	const0_rtx),
	gen_rtx_SET (copy_rtx (operand0),
	const1_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9929 */
extern rtx_insn *gen_split_86 (rtx_insn *, rtx *);
rtx_insn *
gen_split_86 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_86 (arm.md:9929)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9941 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  rtx tmp1;
  machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]),
					   operands[2], operands[3]);
  enum rtx_code rc = GET_CODE (operands[1]);

  tmp1 = gen_rtx_REG (mode, CC_REGNUM);

  operands[5] = gen_rtx_fmt_ee (rc, VOIDmode, tmp1, const0_rtx);
  if (mode == CCFPmode || mode == CCFPEmode)
    rc = reverse_condition_maybe_unordered (rc);
  else
    rc = reverse_condition (rc);
  operands[4] = gen_rtx_fmt_ee (rc, VOIDmode, tmp1, const0_rtx);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_COMPARE (CCmode,
	operand2,
	operand3)));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	operand4,
	gen_rtx_SET (operand0,
	const0_rtx)));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	operand5,
	gen_rtx_SET (copy_rtx (operand0),
	const1_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9965 */
extern rtx_insn *gen_peephole2_8 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_8 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_8 (arm.md:9965)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_CLZ (SImode,
	operand1)));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_LSHIFTRT (SImode,
	copy_rtx (operand0),
	const_int_rtx[MAX_SAVED_CONST_INT + (5)])));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:9981 */
extern rtx_insn *gen_peephole2_9 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_9 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[2] = peep2_find_free_register (3, 3, "r", SImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_9 (arm.md:9981)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_COMPARE (CCmode,
	const0_rtx,
	operand1)),
		gen_rtx_SET (operand2,
	gen_rtx_MINUS (SImode,
	const0_rtx,
	copy_rtx (operand1))))), true);
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2)),
	gen_rtx_GEU (SImode,
	gen_rtx_REG (CCmode,
	100),
	const0_rtx))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:10004 */
extern rtx_insn *gen_peephole2_10 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_10 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_10 (arm.md:10004)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	operand1,
	operand2)));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_CLZ (SImode,
	copy_rtx (operand0))));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_LSHIFTRT (SImode,
	copy_rtx (operand0),
	const_int_rtx[MAX_SAVED_CONST_INT + (5)])));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:10024 */
extern rtx_insn *gen_peephole2_11 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_11 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[3] = peep2_find_free_register (3, 3, "r", SImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_11 (arm.md:10024)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10042 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  if (CONST_INT_P (operands[2]))
    operands[4] = plus_constant (SImode, operands[1], -INTVAL (operands[2]));
  else
    operands[4] = gen_rtx_MINUS (SImode, operands[1], operands[2]);
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand3,
	operand4));
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_COMPARE (CCmode,
	const0_rtx,
	copy_rtx (operand3))),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	const0_rtx,
	copy_rtx (operand3))))), true);
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_PLUS (SImode,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand0),
	copy_rtx (operand3)),
	gen_rtx_GEU (SImode,
	gen_rtx_REG (CCmode,
	100),
	const0_rtx))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:10468 */
extern rtx_insn *gen_split_87 (rtx_insn *, rtx *);
rtx_insn *
gen_split_87 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_87 (arm.md:10468)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10489 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
operands[7]
     = gen_rtx_REG (arm_select_dominance_cc_mode (operands[3], operands[6],
						  DOM_CC_X_OR_Y),
		    CC_REGNUM);
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand7,
	gen_rtx_COMPARE (VOIDmode,
	gen_rtx_IOR (SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), GET_MODE (operand3),
		operand1,
		operand2),
	gen_rtx_fmt_ee (GET_CODE (operand6), GET_MODE (operand6),
		operand4,
		operand5)),
	const0_rtx)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NE (SImode,
	copy_rtx (operand7),
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:10501 */
extern rtx_insn *gen_split_88 (rtx_insn *, rtx *);
rtx_insn *
gen_split_88 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_88 (arm.md:10501)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10523 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_COMPARE (VOIDmode,
	gen_rtx_IOR (SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), GET_MODE (operand3),
		operand1,
		operand2),
	gen_rtx_fmt_ee (GET_CODE (operand6), GET_MODE (operand6),
		operand4,
		operand5)),
	const0_rtx)));
  emit_insn (gen_rtx_SET (operand7,
	gen_rtx_NE (SImode,
	copy_rtx (operand0),
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:10530 */
extern rtx_insn *gen_split_89 (rtx_insn *, rtx *);
rtx_insn *
gen_split_89 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_89 (arm.md:10530)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10553 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
operands[7]
     = gen_rtx_REG (arm_select_dominance_cc_mode (operands[3], operands[6],
						  DOM_CC_X_AND_Y),
		    CC_REGNUM);
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand7,
	gen_rtx_COMPARE (VOIDmode,
	gen_rtx_AND (SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), GET_MODE (operand3),
		operand1,
		operand2),
	gen_rtx_fmt_ee (GET_CODE (operand6), GET_MODE (operand6),
		operand4,
		operand5)),
	const0_rtx)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NE (SImode,
	copy_rtx (operand7),
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:10565 */
extern rtx_insn *gen_split_90 (rtx_insn *, rtx *);
rtx_insn *
gen_split_90 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_90 (arm.md:10565)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10587 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_COMPARE (VOIDmode,
	gen_rtx_AND (SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), GET_MODE (operand3),
		operand1,
		operand2),
	gen_rtx_fmt_ee (GET_CODE (operand6), GET_MODE (operand6),
		operand4,
		operand5)),
	const0_rtx)));
  emit_insn (gen_rtx_SET (operand7,
	gen_rtx_NE (SImode,
	copy_rtx (operand0),
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:10598 */
extern rtx_insn *gen_split_91 (rtx_insn *, rtx *);
rtx_insn *
gen_split_91 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx operand8;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_91 (arm.md:10598)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10620 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
operands[7] = gen_rtx_REG (SELECT_CC_MODE (GET_CODE (operands[6]),
					      operands[4], operands[5]),
			      CC_REGNUM);
   operands[8] = gen_rtx_COMPARE (GET_MODE (operands[7]), operands[4],
				  operands[5]);
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  operand8 = operands[8];
  (void) operand8;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand3), GET_MODE (operand3),
		operand1,
		operand2)),
		gen_hard_reg_clobber (CCmode, 100))), true);
  emit_insn (gen_rtx_SET (operand7,
	gen_rtx_fmt_ee (GET_CODE (operand8), GET_MODE (operand8),
		operand4,
		operand5)));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_IF_THEN_ELSE (SImode,
	gen_rtx_fmt_ee (GET_CODE (operand6), GET_MODE (operand6),
		copy_rtx (operand7),
		const0_rtx),
	copy_rtx (operand0),
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:10630 */
extern rtx_insn *gen_split_92 (rtx_insn *, rtx *);
rtx_insn *
gen_split_92 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_92 (arm.md:10630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10647 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand4,
	gen_rtx_IOR (SImode,
	gen_rtx_fmt_ee (GET_CODE (operand1), GET_MODE (operand1),
		operand2,
		operand3),
	operand0)));
  emit_insn (gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	100),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_AND (SImode,
	copy_rtx (operand4),
	const1_rtx),
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:10649 */
extern rtx_insn *gen_split_93 (rtx_insn *, rtx *);
rtx_insn *
gen_split_93 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_93 (arm.md:10649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10666 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand4,
	gen_rtx_IOR (SImode,
	gen_rtx_fmt_ee (GET_CODE (operand1), GET_MODE (operand1),
		operand2,
		operand3),
	operand0)));
  emit_insn (gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	100),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_AND (SImode,
	copy_rtx (operand4),
	const1_rtx),
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:10669 */
extern rtx_insn *gen_split_94 (rtx_insn *, rtx *);
rtx_insn *
gen_split_94 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_94 (arm.md:10669)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10679 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    rtx cc_reg = gen_rtx_REG (CCmode, CC_REGNUM);

    if (GET_CODE (operands[3]) == LT && operands[2] == const0_rtx)
       {
         /* Emit mov\t%0, %1, asr #31 */
         emit_insn (gen_rtx_SET (operands[0],
                                 gen_rtx_ASHIFTRT (SImode,
                                                   operands[1],
                                                   GEN_INT (31))));
         DONE;
       }
     else if (GET_CODE (operands[3]) == NE)
       {
        /* Emit subs\t%0, %1, %2\n\tmvnne\t%0, #0 */
        if (CONST_INT_P (operands[2]))
          emit_insn (gen_cmpsi2_addneg (operands[0], operands[1], operands[2],
                                        gen_int_mode (-INTVAL (operands[2]),
						      SImode)));
        else
          emit_insn (gen_subsi3_compare (operands[0], operands[1], operands[2]));

        emit_insn (gen_rtx_COND_EXEC (VOIDmode,
                                      gen_rtx_NE (SImode,
                                                  cc_reg,
                                                  const0_rtx),
                                      gen_rtx_SET (operands[0],
                                                   GEN_INT (~0))));
        DONE;
      }
    else
      {
        /* Emit: cmp\t%1, %2\n\tmov%D3\t%0, #0\n\tmvn%d3\t%0, #0 */
        emit_insn (gen_rtx_SET (cc_reg,
                                gen_rtx_COMPARE (CCmode, operands[1], operands[2])));
        enum rtx_code rc = GET_CODE (operands[3]);

        rc = reverse_condition (rc);
        emit_insn (gen_rtx_COND_EXEC (VOIDmode,
                                      gen_rtx_fmt_ee (rc,
                                                      VOIDmode,
                                                      cc_reg,
                                                      const0_rtx),
                                      gen_rtx_SET (operands[0], const0_rtx)));
        rc = GET_CODE (operands[3]);
        emit_insn (gen_rtx_COND_EXEC (VOIDmode,
                                      gen_rtx_fmt_ee (rc,
                                                      VOIDmode,
                                                      cc_reg,
                                                      const0_rtx),
                                      gen_rtx_SET (operands[0],
                                                   GEN_INT (~0))));
        DONE;
      }
     FAIL;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:10740 */
extern rtx_insn *gen_split_95 (rtx_insn *, rtx *);
rtx_insn *
gen_split_95 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_95 (arm.md:10740)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10761 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[5]),
					     operands[3], operands[4]);
    enum rtx_code rc = GET_CODE (operands[5]);
    operands[6] = gen_rtx_REG (mode, CC_REGNUM);
    gcc_assert (!(mode == CCFPmode || mode == CCFPEmode));
    if (!REG_P (operands[2]) || REGNO (operands[2]) != REGNO (operands[0]))
      rc = reverse_condition (rc);
    else
      std::swap (operands[1], operands[2]);

    operands[6] = gen_rtx_fmt_ee (rc, VOIDmode, operands[6], const0_rtx);
  }
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	100),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_PLUS (SImode,
	operand3,
	operand4),
	const0_rtx)));
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	operand6,
	gen_rtx_SET (copy_rtx (operand0),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:11383 */
extern rtx_insn *gen_split_96 (rtx_insn *, rtx *);
rtx_insn *
gen_split_96 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_96 (arm.md:11383)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 11395 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand4), GET_MODE (operand4),
		operand3,
		const0_rtx),
	gen_rtx_SET (operand0,
	gen_rtx_NEG (SImode,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:11419 */
extern rtx_insn *gen_split_97 (rtx_insn *, rtx *);
rtx_insn *
gen_split_97 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_97 (arm.md:11419)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 11431 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    machine_mode mode = GET_MODE (operands[3]);
    rtx_code rc = GET_CODE (operands[4]);

    if (mode == CCFPmode || mode == CCFPEmode)
      rc = reverse_condition_maybe_unordered (rc);
    else
      rc = reverse_condition (rc);

    operands[5] = gen_rtx_fmt_ee (rc, VOIDmode, operands[3], const0_rtx);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	operand5,
	gen_rtx_SET (operand0,
	gen_rtx_NEG (SImode,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:11555 */
extern rtx_insn *gen_peephole2_12 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_12 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_12 (arm.md:11555)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 11563 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_COMPARE (CCmode,
	operand1,
	const0_rtx)),
		gen_rtx_SET (operand0,
	copy_rtx (operand1)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:11566 */
extern rtx_insn *gen_split_98 (rtx_insn *, rtx *);
rtx_insn *
gen_split_98 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_98 (arm.md:11566)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 11578 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_NOT (SImode,
	gen_rtx_ASHIFTRT (SImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (31)]))));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (SImode,
	gen_rtx_fmt_ee (GET_CODE (operand2), GET_MODE (operand2),
		operand3,
		operand4),
	copy_rtx (operand5))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:11585 */
extern rtx_insn *gen_split_99 (rtx_insn *, rtx *);
rtx_insn *
gen_split_99 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_99 (arm.md:11585)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 11597 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  operands[1] = GEN_INT (((unsigned long) INTVAL (operands[1])) >> 24);
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand2,
	gen_rtx_ZERO_EXTEND (SImode,
	operand0)));
  emit_insn (gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_COMPARE (CCmode,
	copy_rtx (operand2),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:11603 */
rtx
gen_prologue (void)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 11606 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
if (TARGET_32BIT)
     arm_expand_prologue ();
   else
     thumb1_expand_prologue ();
  DONE;
  
#undef DONE
#undef FAIL
  }
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	const0_rtx));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:11614 */
rtx
gen_epilogue (void)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 11617 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  if (crtl->calls_eh_return)
    emit_insn (gen_force_register_use (gen_rtx_REG (Pmode, 2)));
  if (TARGET_THUMB1)
   {
     thumb1_expand_epilogue ();
     emit_jump_insn (gen_rtx_UNSPEC_VOLATILE (VOIDmode,
                     gen_rtvec (1, ret_rtx), VUNSPEC_EPILOGUE));
   }
  else if (HAVE_return)
   {
     /* HAVE_return is testing for USE_RETURN_INSN (FALSE).  Hence,
        no need for explicit testing again.  */
     emit_jump_insn (gen_return ());
   }
  else if (TARGET_32BIT)
   {
    arm_expand_epilogue (true);
   }
  DONE;
  
#undef DONE
#undef FAIL
  }
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	const0_rtx));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:11645 */
rtx
gen_sibcall_epilogue (void)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 11649 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

   arm_expand_epilogue (false);
   DONE;
   
#undef DONE
#undef FAIL
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		gen_rtx_REG (SImode,
	14)),
	4),
		gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		ret_rtx),
	1))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:11655 */
rtx
gen_eh_epilogue (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 11660 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    cfun->machine->eh_epilogue_sp_ofs = operands[1];
    if (!REG_P (operands[2]) || REGNO (operands[2]) != 2)
      {
	rtx ra = gen_rtx_REG (Pmode, 2);

	emit_move_insn (ra, operands[2]);
	operands[2] = ra;
      }
    /* This is a hack -- we may have crystalized the function type too
       early.  */
    cfun->machine->func_type = 0;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_USE (VOIDmode,
	operand1));
  emit_insn (gen_rtx_USE (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:11686 */
extern rtx_insn *gen_split_100 (rtx_insn *, rtx *);
rtx_insn *
gen_split_100 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_100 (arm.md:11686)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 11697 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]),
					     operands[2], operands[3]);
    enum rtx_code rc = GET_CODE (operands[1]);

    operands[5] = gen_rtx_REG (mode, CC_REGNUM);
    operands[6] = gen_rtx_COMPARE (mode, operands[2], operands[3]);
    if (mode == CCFPmode || mode == CCFPEmode)
      rc = reverse_condition_maybe_unordered (rc);
    else
      rc = reverse_condition (rc);

    operands[7] = gen_rtx_fmt_ee (rc, VOIDmode, operands[5], const0_rtx);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand5,
	operand6));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	operand7,
	gen_rtx_SET (operand0,
	operand4)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:11714 */
extern rtx_insn *gen_split_101 (rtx_insn *, rtx *);
rtx_insn *
gen_split_101 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_101 (arm.md:11714)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 11725 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]),
					     operands[2], operands[3]);

    operands[5] = gen_rtx_REG (mode, CC_REGNUM);
    operands[6] = gen_rtx_COMPARE (mode, operands[2], operands[3]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand5,
	operand6));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand1), GET_MODE (operand1),
		copy_rtx (operand5),
		const0_rtx),
	gen_rtx_SET (operand0,
	operand4)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:11735 */
extern rtx_insn *gen_split_102 (rtx_insn *, rtx *);
rtx_insn *
gen_split_102 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx operand8;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_102 (arm.md:11735)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 11748 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]),
					     operands[2], operands[3]);
    enum rtx_code rc = GET_CODE (operands[1]);

    operands[6] = gen_rtx_REG (mode, CC_REGNUM);
    operands[7] = gen_rtx_COMPARE (mode, operands[2], operands[3]);
    if (mode == CCFPmode || mode == CCFPEmode)
      rc = reverse_condition_maybe_unordered (rc);
    else
      rc = reverse_condition (rc);

    operands[8] = gen_rtx_fmt_ee (rc, VOIDmode, operands[6], const0_rtx);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  operand8 = operands[8];
  (void) operand8;
  emit_insn (gen_rtx_SET (operand6,
	operand7));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand1), GET_MODE (operand1),
		copy_rtx (operand6),
		const0_rtx),
	gen_rtx_SET (operand0,
	operand4)));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	operand8,
	gen_rtx_SET (copy_rtx (operand0),
	operand5)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:11765 */
extern rtx_insn *gen_split_103 (rtx_insn *, rtx *);
rtx_insn *
gen_split_103 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx operand8;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_103 (arm.md:11765)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 11780 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]),
					     operands[2], operands[3]);
    enum rtx_code rc = GET_CODE (operands[1]);

    operands[6] = gen_rtx_REG (mode, CC_REGNUM);
    operands[7] = gen_rtx_COMPARE (mode, operands[2], operands[3]);
    if (mode == CCFPmode || mode == CCFPEmode)
      rc = reverse_condition_maybe_unordered (rc);
    else
      rc = reverse_condition (rc);

    operands[8] = gen_rtx_fmt_ee (rc, VOIDmode, operands[6], const0_rtx);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  operand8 = operands[8];
  (void) operand8;
  emit_insn (gen_rtx_SET (operand6,
	operand7));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand1), GET_MODE (operand1),
		copy_rtx (operand6),
		const0_rtx),
	gen_rtx_SET (operand0,
	operand4)));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	operand8,
	gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_NOT (SImode,
	operand5))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12195 */
extern rtx_insn *gen_split_104 (rtx_insn *, rtx *);
rtx_insn *
gen_split_104 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_104 (arm.md:12195)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 12202 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  emit_insn (gen_rbitsi2 (operands[0], operands[1]));
  emit_insn (gen_clzsi2 (operands[0], operands[0]));
  DONE;

#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12242 */
rtx
gen_eh_return (rtx operand0)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[1];
    operands[0] = operand0;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 12245 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    if (TARGET_32BIT)
      emit_insn (gen_arm_eh_return (operands[0]));
    else
      emit_insn (gen_thumb_eh_return (operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12256 */
extern rtx_insn *gen_split_105 (rtx_insn *, rtx *);
rtx_insn *
gen_split_105 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_105 (arm.md:12256)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 12264 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  {
    arm_set_return_address (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12338 */
rtx
gen_get_thread_pointersi (rtx operand0)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[1];
    operands[0] = operand0;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 12341 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

 {
   arm_load_tp (operands[0]);
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
  }
  emit (operand0, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12380 */
rtx
gen_arm_legacy_rev (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  emit_insn (gen_rtx_SET (operand2,
	gen_rtx_XOR (SImode,
	gen_rtx_ROTATERT (SImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)]),
	copy_rtx (operand1))));
  emit_insn (gen_rtx_SET (copy_rtx (operand2),
	gen_rtx_LSHIFTRT (SImode,
	copy_rtx (operand2),
	const_int_rtx[MAX_SAVED_CONST_INT + (8)])));
  emit_insn (gen_rtx_SET (operand3,
	gen_rtx_ROTATERT (SImode,
	copy_rtx (operand1),
	const_int_rtx[MAX_SAVED_CONST_INT + (8)])));
  emit_insn (gen_rtx_SET (copy_rtx (operand2),
	gen_rtx_AND (SImode,
	copy_rtx (operand2),
	GEN_INT (-65281L))));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (SImode,
	copy_rtx (operand3),
	copy_rtx (operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12402 */
rtx
gen_thumb_legacy_rev (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  emit_insn (gen_rtx_SET (operand2,
	gen_rtx_ASHIFT (SImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (24)])));
  emit_insn (gen_rtx_SET (operand3,
	gen_rtx_LSHIFTRT (SImode,
	copy_rtx (operand1),
	const_int_rtx[MAX_SAVED_CONST_INT + (24)])));
  emit_insn (gen_rtx_SET (copy_rtx (operand3),
	gen_rtx_IOR (SImode,
	copy_rtx (operand3),
	copy_rtx (operand2))));
  emit_insn (gen_rtx_SET (operand4,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)]));
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_ROTATERT (SImode,
	copy_rtx (operand1),
	copy_rtx (operand4))));
  emit_insn (gen_rtx_SET (copy_rtx (operand2),
	gen_rtx_ASHIFT (SImode,
	copy_rtx (operand5),
	const_int_rtx[MAX_SAVED_CONST_INT + (24)])));
  emit_insn (gen_rtx_SET (copy_rtx (operand5),
	gen_rtx_LSHIFTRT (SImode,
	copy_rtx (operand5),
	const_int_rtx[MAX_SAVED_CONST_INT + (24)])));
  emit_insn (gen_rtx_SET (copy_rtx (operand5),
	gen_rtx_IOR (SImode,
	copy_rtx (operand5),
	copy_rtx (operand2))));
  emit_insn (gen_rtx_SET (copy_rtx (operand5),
	gen_rtx_ROTATERT (SImode,
	copy_rtx (operand5),
	copy_rtx (operand4))));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (SImode,
	copy_rtx (operand5),
	copy_rtx (operand3))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12444 */
rtx
gen_modsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 12449 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    HOST_WIDE_INT val = INTVAL (operands[2]);

    if (val <= 0
       || exact_log2 (val) <= 0)
      FAIL;

    rtx mask = GEN_INT (val - 1);

    /* In the special case of x0 % 2 we can do the even shorter:
	cmp     r0, #0
	and     r0, r0, #1
	rsblt   r0, r0, #0.  */

    if (val == 2)
      {
	rtx cc_reg = arm_gen_compare_reg (LT,
					  operands[1], const0_rtx, NULL_RTX);
	rtx cond = gen_rtx_LT (SImode, cc_reg, const0_rtx);
	rtx masked = gen_reg_rtx (SImode);

	emit_insn (gen_andsi3 (masked, operands[1], mask));
	emit_move_insn (operands[0],
			gen_rtx_IF_THEN_ELSE (SImode, cond,
					      gen_rtx_NEG (SImode,
							   masked),
					      masked));
	DONE;
      }

    rtx neg_op = gen_reg_rtx (SImode);
    rtx_insn *insn = emit_insn (gen_subsi3_compare0 (neg_op, const0_rtx,
						      operands[1]));

    /* Extract the condition register and mode.  */
    rtx cmp = XVECEXP (PATTERN (insn), 0, 0);
    rtx cc_reg = SET_DEST (cmp);
    rtx cond = gen_rtx_GE (SImode, cc_reg, const0_rtx);

    emit_insn (gen_andsi3 (operands[0], operands[1], mask));

    rtx masked_neg = gen_reg_rtx (SImode);
    emit_insn (gen_andsi3 (masked_neg, neg_op, mask));

    /* We want a conditional negate here, but emitting COND_EXEC rtxes
       during expand does not always work.  Do an IF_THEN_ELSE instead.  */
    emit_move_insn (operands[0],
		    gen_rtx_IF_THEN_ELSE (SImode, cond,
					  gen_rtx_NEG (SImode, masked_neg),
					  operands[0]));


    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12505 */
rtx
gen_bswapsi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 12509 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

    if (!arm_arch6)
      {
	rtx op2 = gen_reg_rtx (SImode);
	rtx op3 = gen_reg_rtx (SImode);

	if (TARGET_THUMB)
	  {
	    rtx op4 = gen_reg_rtx (SImode);
	    rtx op5 = gen_reg_rtx (SImode);

	    emit_insn (gen_thumb_legacy_rev (operands[0], operands[1],
					     op2, op3, op4, op5));
	  }
	else
	  {
	    emit_insn (gen_arm_legacy_rev (operands[0], operands[1],
					   op2, op3));
	  }

	DONE;
      }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_BSWAP (SImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12601 */
rtx
gen_bswaphi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_BSWAP (HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldrdstrd.md:31 */
extern rtx_insn *gen_peephole2_13 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_13 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_13 (ldrdstrd.md:31)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 39 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldrdstrd.md"
{
  if (!gen_operands_ldrd_strd (operands, true, false, false))
    FAIL;
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand2),
		gen_rtx_SET (operand1,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldrdstrd.md:44 */
extern rtx_insn *gen_peephole2_14 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_14 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_14 (ldrdstrd.md:44)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 52 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldrdstrd.md"
{
  if (!gen_operands_ldrd_strd (operands, false, false, false))
    FAIL;
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand2,
	operand0),
		gen_rtx_SET (operand3,
	operand1))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldrdstrd.md:58 */
extern rtx_insn *gen_peephole2_15 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_15 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_15 (ldrdstrd.md:58)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 72 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldrdstrd.md"
{
  if (!gen_operands_ldrd_strd (operands, false, true, false))
    FAIL;
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	operand4));
  emit_insn (gen_rtx_SET (operand1,
	operand5));
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand2,
	copy_rtx (operand0)),
		gen_rtx_SET (operand3,
	copy_rtx (operand1)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldrdstrd.md:77 */
extern rtx_insn *gen_peephole2_16 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_16 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_16 (ldrdstrd.md:77)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 91 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldrdstrd.md"
{
  if (!gen_operands_ldrd_strd (operands, false, true, false))
     FAIL;
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	operand4));
  emit_insn (gen_rtx_SET (operand1,
	operand5));
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand2,
	copy_rtx (operand0)),
		gen_rtx_SET (operand3,
	copy_rtx (operand1)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldrdstrd.md:99 */
extern rtx_insn *gen_peephole2_17 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_17 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_17 (ldrdstrd.md:99)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 117 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldrdstrd.md"
{
  if (!gen_operands_ldrd_strd (operands, true, false, true))
    FAIL;
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand2),
		gen_rtx_SET (operand1,
	operand3))), true);
  emit_insn (gen_rtx_SET (operand4,
	gen_rtx_fmt_ee (GET_CODE (operand5), GET_MODE (operand5),
		operand6,
		operand7)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldrdstrd.md:122 */
extern rtx_insn *gen_peephole2_18 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_18 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_18 (ldrdstrd.md:122)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 145 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldrdstrd.md"
{
  if (!gen_operands_ldrd_strd (operands, true, false, true))
    FAIL;
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand2),
		gen_rtx_SET (operand1,
	operand3))), true);
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand4,
	gen_rtx_fmt_ee (GET_CODE (operand5), GET_MODE (operand5),
		operand6,
		operand7)),
		gen_hard_reg_clobber (CCmode, 100))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md:360 */
extern rtx_insn *gen_peephole2_19 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_19 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_19 (ldmstm.md:360)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 371 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md"
{
  if (gen_ldm_seq (operands, 4, false))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md:378 */
extern rtx_insn *gen_peephole2_20 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_20 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_20 (ldmstm.md:378)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 390 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md"
{
  if (gen_ldm_seq (operands, 4, false))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md:397 */
extern rtx_insn *gen_peephole2_21 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_21 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_21 (ldmstm.md:397)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 416 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md"
{
  if (gen_const_stm_seq (operands, 4))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md:423 */
extern rtx_insn *gen_peephole2_22 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_22 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_22 (ldmstm.md:423)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 442 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md"
{
  if (gen_const_stm_seq (operands, 4))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md:449 */
extern rtx_insn *gen_peephole2_23 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_23 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_23 (ldmstm.md:449)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 460 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md"
{
  if (gen_stm_seq (operands, 4))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md:755 */
extern rtx_insn *gen_peephole2_24 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_24 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_24 (ldmstm.md:755)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 764 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md"
{
  if (gen_ldm_seq (operands, 3, false))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md:771 */
extern rtx_insn *gen_peephole2_25 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_25 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_25 (ldmstm.md:771)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 781 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md"
{
  if (gen_ldm_seq (operands, 3, false))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md:788 */
extern rtx_insn *gen_peephole2_26 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_26 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_26 (ldmstm.md:788)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 803 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md"
{
  if (gen_const_stm_seq (operands, 3))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md:810 */
extern rtx_insn *gen_peephole2_27 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_27 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_27 (ldmstm.md:810)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 825 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md"
{
  if (gen_const_stm_seq (operands, 3))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md:832 */
extern rtx_insn *gen_peephole2_28 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_28 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_28 (ldmstm.md:832)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 841 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md"
{
  if (gen_stm_seq (operands, 3))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md:1088 */
extern rtx_insn *gen_peephole2_29 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_29 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_29 (ldmstm.md:1088)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1095 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md"
{
  if (gen_ldm_seq (operands, 2, false))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md:1102 */
extern rtx_insn *gen_peephole2_30 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_30 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_30 (ldmstm.md:1102)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1113 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md"
{
  if (gen_const_stm_seq (operands, 2))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md:1120 */
extern rtx_insn *gen_peephole2_31 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_31 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_31 (ldmstm.md:1120)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1131 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md"
{
  if (gen_const_stm_seq (operands, 2))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md:1138 */
extern rtx_insn *gen_peephole2_32 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_32 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_32 (ldmstm.md:1138)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1145 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md"
{
  if (gen_stm_seq (operands, 2))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md:1152 */
extern rtx_insn *gen_peephole2_33 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_33 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_33 (ldmstm.md:1152)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1174 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md"
{
  if (!gen_ldm_seq (operands, 2, true))
    FAIL;
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand4,
	gen_rtx_fmt_ee (GET_CODE (operand5), GET_MODE (operand5),
		operand6,
		operand7)),
		gen_hard_reg_clobber (CCmode, 100))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md:1179 */
extern rtx_insn *gen_peephole2_34 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_34 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_34 (ldmstm.md:1179)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1197 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/ldmstm.md"
{
  if (!gen_ldm_seq (operands, 2, true))
    FAIL;
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand4,
	gen_rtx_fmt_ee (GET_CODE (operand5), GET_MODE (operand5),
		operand6,
		operand7)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12735 */
rtx
gen_copysignsf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"copysignsf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 12740 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
     emit_move_insn (operands[0], operands[2]);
     emit_insn (gen_insv_t2 (simplify_gen_subreg (SImode, operands[0], SFmode, 0),
		GEN_INT (31), GEN_INT (0),
		simplify_gen_subreg (SImode, operands[1], SFmode, 0)));
     DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12749 */
rtx
gen_copysigndf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"copysigndf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 12754 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
     rtx op0_low = gen_lowpart (SImode, operands[0]);
     rtx op0_high = gen_highpart (SImode, operands[0]);
     rtx op1_low = gen_lowpart (SImode, operands[1]);
     rtx op1_high = gen_highpart (SImode, operands[1]);
     rtx op2_high = gen_highpart (SImode, operands[2]);

     rtx scratch1 = gen_reg_rtx (SImode);
     rtx scratch2 = gen_reg_rtx (SImode);
     emit_move_insn (scratch1, op2_high);
     emit_move_insn (scratch2, op1_high);

     emit_insn(gen_rtx_SET(scratch1,
			   gen_rtx_LSHIFTRT (SImode, op2_high, GEN_INT(31))));
     emit_insn(gen_insv_t2(scratch2, GEN_INT(1), GEN_INT(31), scratch1));
     emit_move_insn (op0_low, op1_low);
     emit_move_insn (op0_high, scratch2);

     DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12777 */
rtx
gen_movmisaligndi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 12781 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  rtx lo_op0 = gen_lowpart (SImode, operands[0]);
  rtx lo_op1 = gen_lowpart (SImode, operands[1]);
  rtx hi_op0 = gen_highpart_mode (SImode, DImode, operands[0]);
  rtx hi_op1 = gen_highpart_mode (SImode, DImode, operands[1]);

  if (aligned_operand (lo_op0, SImode) && aligned_operand (lo_op1, SImode))
    {
      emit_move_insn (lo_op0, lo_op1);
      emit_move_insn (hi_op0, hi_op1);
    }
  else
    {
      emit_insn (gen_movmisalignsi (lo_op0, lo_op1));
      emit_insn (gen_movmisalignsi (hi_op0, hi_op1));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12801 */
rtx
gen_movmisalignhi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 12805 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant), force operand 1 into a
     register.  */
  rtx (* gen_unaligned_load)(rtx, rtx);
  rtx tmp_dest = operands[0];
  if (!s_register_operand (operands[0], HImode)
      && !s_register_operand (operands[1], HImode))
    operands[1] = force_reg (HImode, operands[1]);

  if (HImode == HImode)
   {
    gen_unaligned_load = gen_unaligned_loadhiu;
    tmp_dest = gen_reg_rtx (SImode);
   }
  else
    gen_unaligned_load = gen_unaligned_loadsi;

  if (MEM_P (operands[1]))
   {
    emit_insn (gen_unaligned_load (tmp_dest, operands[1]));
    if (HImode == HImode)
      emit_move_insn (operands[0], gen_lowpart (HImode, tmp_dest));
   }
  else
    emit_insn (gen_unaligned_storehi (operands[0], operands[1]));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12801 */
rtx
gen_movmisalignsi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 12805 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant), force operand 1 into a
     register.  */
  rtx (* gen_unaligned_load)(rtx, rtx);
  rtx tmp_dest = operands[0];
  if (!s_register_operand (operands[0], SImode)
      && !s_register_operand (operands[1], SImode))
    operands[1] = force_reg (SImode, operands[1]);

  if (SImode == HImode)
   {
    gen_unaligned_load = gen_unaligned_loadhiu;
    tmp_dest = gen_reg_rtx (SImode);
   }
  else
    gen_unaligned_load = gen_unaligned_loadsi;

  if (MEM_P (operands[1]))
   {
    emit_insn (gen_unaligned_load (tmp_dest, operands[1]));
    if (SImode == HImode)
      emit_move_insn (operands[0], gen_lowpart (HImode, tmp_dest));
   }
  else
    emit_insn (gen_unaligned_storesi (operands[0], operands[1]));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12881 */
rtx
gen_arm_ldc (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (3,
		operand0,
		operand1,
		gen_rtx_MEM (SImode,
	operand2)),
	33);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12881 */
rtx
gen_arm_ldc2 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (3,
		operand0,
		operand1,
		gen_rtx_MEM (SImode,
	operand2)),
	34);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12881 */
rtx
gen_arm_ldcl (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (3,
		operand0,
		operand1,
		gen_rtx_MEM (SImode,
	operand2)),
	35);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12881 */
rtx
gen_arm_ldc2l (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (3,
		operand0,
		operand1,
		gen_rtx_MEM (SImode,
	operand2)),
	36);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12887 */
rtx
gen_arm_stc (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (3,
		operand0,
		operand1,
		gen_rtx_MEM (SImode,
	operand2)),
	37);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12887 */
rtx
gen_arm_stc2 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (3,
		operand0,
		operand1,
		gen_rtx_MEM (SImode,
	operand2)),
	38);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12887 */
rtx
gen_arm_stcl (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (3,
		operand0,
		operand1,
		gen_rtx_MEM (SImode,
	operand2)),
	39);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12887 */
rtx
gen_arm_stc2l (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (3,
		operand0,
		operand1,
		gen_rtx_MEM (SImode,
	operand2)),
	40);
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:12963 */
rtx
gen_speculation_barrier (void)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 12966 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  /* For thumb1 (except Armv8 derivatives), and for pre-Armv7 we don't
     have a usable barrier (and probably don't need one in practice).
     But to be safe if such code is run on later architectures, call a
     helper function in libgcc that will do the thing for the active
     system.  */
  if (!(arm_arch7 || arm_arch8))
    {
      arm_emit_speculation_barrier_function ();
      DONE;
    }
  
#undef DONE
#undef FAIL
  }
  emit_insn (gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		const0_rtx),
	49));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:23 */
rtx
gen_movv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 30 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  gcc_checking_assert (aligned_operand (operands[0], V16QImode));
  gcc_checking_assert (aligned_operand (operands[1], V16QImode));
  if (can_create_pseudo_p ())
    {
      if (!REG_P (operands[0]))
	operands[1] = force_reg (V16QImode, operands[1]);
      else if ((TARGET_NEON || TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT)
	       && (CONSTANT_P (operands[1])))
	{
	  operands[1] = neon_make_constant (operands[1]);
	  gcc_assert (operands[1] != NULL_RTX);
	}
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:23 */
rtx
gen_movv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 30 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  gcc_checking_assert (aligned_operand (operands[0], V8HImode));
  gcc_checking_assert (aligned_operand (operands[1], V8HImode));
  if (can_create_pseudo_p ())
    {
      if (!REG_P (operands[0]))
	operands[1] = force_reg (V8HImode, operands[1]);
      else if ((TARGET_NEON || TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT)
	       && (CONSTANT_P (operands[1])))
	{
	  operands[1] = neon_make_constant (operands[1]);
	  gcc_assert (operands[1] != NULL_RTX);
	}
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:23 */
rtx
gen_movv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 30 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  gcc_checking_assert (aligned_operand (operands[0], V4SImode));
  gcc_checking_assert (aligned_operand (operands[1], V4SImode));
  if (can_create_pseudo_p ())
    {
      if (!REG_P (operands[0]))
	operands[1] = force_reg (V4SImode, operands[1]);
      else if ((TARGET_NEON || TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT)
	       && (CONSTANT_P (operands[1])))
	{
	  operands[1] = neon_make_constant (operands[1]);
	  gcc_assert (operands[1] != NULL_RTX);
	}
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:23 */
rtx
gen_movv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 30 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  gcc_checking_assert (aligned_operand (operands[0], V4SFmode));
  gcc_checking_assert (aligned_operand (operands[1], V4SFmode));
  if (can_create_pseudo_p ())
    {
      if (!REG_P (operands[0]))
	operands[1] = force_reg (V4SFmode, operands[1]);
      else if ((TARGET_NEON || TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT)
	       && (CONSTANT_P (operands[1])))
	{
	  operands[1] = neon_make_constant (operands[1]);
	  gcc_assert (operands[1] != NULL_RTX);
	}
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:23 */
rtx
gen_movv2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 30 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  gcc_checking_assert (aligned_operand (operands[0], V2DImode));
  gcc_checking_assert (aligned_operand (operands[1], V2DImode));
  if (can_create_pseudo_p ())
    {
      if (!REG_P (operands[0]))
	operands[1] = force_reg (V2DImode, operands[1]);
      else if ((TARGET_NEON || TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT)
	       && (CONSTANT_P (operands[1])))
	{
	  operands[1] = neon_make_constant (operands[1]);
	  gcc_assert (operands[1] != NULL_RTX);
	}
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:46 */
rtx
gen_movv2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 51 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  gcc_checking_assert (aligned_operand (operands[0], V2SImode));
  gcc_checking_assert (aligned_operand (operands[1], V2SImode));
  if (can_create_pseudo_p ())
    {
      if (!REG_P (operands[0]))
	operands[1] = force_reg (V2SImode, operands[1]);
      else if (TARGET_NEON && CONSTANT_P (operands[1]))
	{
	  operands[1] = neon_make_constant (operands[1]);
	  gcc_assert (operands[1] != NULL_RTX);
	}
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:46 */
rtx
gen_movv4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 51 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  gcc_checking_assert (aligned_operand (operands[0], V4HImode));
  gcc_checking_assert (aligned_operand (operands[1], V4HImode));
  if (can_create_pseudo_p ())
    {
      if (!REG_P (operands[0]))
	operands[1] = force_reg (V4HImode, operands[1]);
      else if (TARGET_NEON && CONSTANT_P (operands[1]))
	{
	  operands[1] = neon_make_constant (operands[1]);
	  gcc_assert (operands[1] != NULL_RTX);
	}
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:46 */
rtx
gen_movv8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 51 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  gcc_checking_assert (aligned_operand (operands[0], V8QImode));
  gcc_checking_assert (aligned_operand (operands[1], V8QImode));
  if (can_create_pseudo_p ())
    {
      if (!REG_P (operands[0]))
	operands[1] = force_reg (V8QImode, operands[1]);
      else if (TARGET_NEON && CONSTANT_P (operands[1]))
	{
	  operands[1] = neon_make_constant (operands[1]);
	  gcc_assert (operands[1] != NULL_RTX);
	}
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:46 */
rtx
gen_movv2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 51 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  gcc_checking_assert (aligned_operand (operands[0], V2SFmode));
  gcc_checking_assert (aligned_operand (operands[1], V2SFmode));
  if (can_create_pseudo_p ())
    {
      if (!REG_P (operands[0]))
	operands[1] = force_reg (V2SFmode, operands[1]);
      else if (TARGET_NEON && CONSTANT_P (operands[1]))
	{
	  operands[1] = neon_make_constant (operands[1]);
	  gcc_assert (operands[1] != NULL_RTX);
	}
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:66 */
rtx
gen_movv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 70 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  gcc_checking_assert (aligned_operand (operands[0], E_V8HFmode));
  gcc_checking_assert (aligned_operand (operands[1], E_V8HFmode));
   if (can_create_pseudo_p ())
     {
       if (!REG_P (operands[0]))
	 operands[1] = force_reg (E_V8HFmode, operands[1]);
	else if (TARGET_HAVE_MVE_FLOAT && CONSTANT_P (operands[1]))
	  {
	    operands[1] = neon_make_constant (operands[1]);
	    gcc_assert (operands[1] != NULL_RTX);
	  }
     }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:88 */
rtx
gen_addv8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:88 */
rtx
gen_addv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:88 */
rtx
gen_addv4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:88 */
rtx
gen_addv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:88 */
rtx
gen_addv2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:88 */
rtx
gen_addv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:88 */
rtx
gen_addv4hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:88 */
rtx
gen_addv8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:88 */
rtx
gen_addv2sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:88 */
rtx
gen_addv4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:88 */
rtx
gen_addv2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:95 */
rtx
gen_subv8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:95 */
rtx
gen_subv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:95 */
rtx
gen_subv4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:95 */
rtx
gen_subv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:95 */
rtx
gen_subv2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:95 */
rtx
gen_subv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:95 */
rtx
gen_subv4hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:95 */
rtx
gen_subv8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:95 */
rtx
gen_subv2sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:95 */
rtx
gen_subv4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:95 */
rtx
gen_subv2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:102 */
rtx
gen_mulv8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:102 */
rtx
gen_mulv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:102 */
rtx
gen_mulv4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:102 */
rtx
gen_mulv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:102 */
rtx
gen_mulv2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:102 */
rtx
gen_mulv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:102 */
rtx
gen_mulv2sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:102 */
rtx
gen_mulv4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:102 */
rtx
gen_mulv8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:102 */
rtx
gen_mulv4hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:112 */
rtx
gen_sminv2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:112 */
rtx
gen_sminv4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:112 */
rtx
gen_sminv8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:112 */
rtx
gen_sminv2sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V2SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:112 */
rtx
gen_sminv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:112 */
rtx
gen_sminv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:112 */
rtx
gen_sminv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:112 */
rtx
gen_sminv4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:119 */
rtx
gen_uminv2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMIN (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:119 */
rtx
gen_uminv4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMIN (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:119 */
rtx
gen_uminv8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMIN (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:119 */
rtx
gen_uminv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMIN (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:119 */
rtx
gen_uminv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMIN (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:119 */
rtx
gen_uminv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMIN (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:126 */
rtx
gen_smaxv2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:126 */
rtx
gen_smaxv4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:126 */
rtx
gen_smaxv8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:126 */
rtx
gen_smaxv2sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V2SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:126 */
rtx
gen_smaxv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:126 */
rtx
gen_smaxv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:126 */
rtx
gen_smaxv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:126 */
rtx
gen_smaxv4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:133 */
rtx
gen_umaxv2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMAX (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:133 */
rtx
gen_umaxv4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMAX (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:133 */
rtx
gen_umaxv8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMAX (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:133 */
rtx
gen_umaxv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMAX (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:133 */
rtx
gen_umaxv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMAX (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:133 */
rtx
gen_umaxv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMAX (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:140 */
rtx
gen_vec_permv8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 146 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vec_perm (operands[0], operands[1], operands[2], operands[3]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:140 */
rtx
gen_vec_permv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 146 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vec_perm (operands[0], operands[1], operands[2], operands[3]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:151 */
rtx
gen_vec_extractv16qiqi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 156 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vec_extractv16qiqi (operands[0], operands[1],
						     operands[2]));
  else if (TARGET_HAVE_MVE)
    emit_insn (gen_mve_vec_extractv16qiqi (operands[0], operands[1],
						     operands[2]));
  else
    gcc_unreachable ();
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:151 */
rtx
gen_vec_extractv8hihi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 156 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vec_extractv8hihi (operands[0], operands[1],
						     operands[2]));
  else if (TARGET_HAVE_MVE)
    emit_insn (gen_mve_vec_extractv8hihi (operands[0], operands[1],
						     operands[2]));
  else
    gcc_unreachable ();
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:151 */
rtx
gen_vec_extractv8hfhf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 156 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vec_extractv8hfhf (operands[0], operands[1],
						     operands[2]));
  else if (TARGET_HAVE_MVE)
    emit_insn (gen_mve_vec_extractv8hfhf (operands[0], operands[1],
						     operands[2]));
  else
    gcc_unreachable ();
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:151 */
rtx
gen_vec_extractv4sisi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 156 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vec_extractv4sisi (operands[0], operands[1],
						     operands[2]));
  else if (TARGET_HAVE_MVE)
    emit_insn (gen_mve_vec_extractv4sisi (operands[0], operands[1],
						     operands[2]));
  else
    gcc_unreachable ();
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:151 */
rtx
gen_vec_extractv4sfsf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 156 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vec_extractv4sfsf (operands[0], operands[1],
						     operands[2]));
  else if (TARGET_HAVE_MVE)
    emit_insn (gen_mve_vec_extractv4sfsf (operands[0], operands[1],
						     operands[2]));
  else
    gcc_unreachable ();
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:151 */
rtx
gen_vec_extractv2didi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 156 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vec_extractv2didi (operands[0], operands[1],
						     operands[2]));
  else if (TARGET_HAVE_MVE)
    emit_insn (gen_mve_vec_extractv2didi (operands[0], operands[1],
						     operands[2]));
  else
    gcc_unreachable ();
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:168 */
rtx
gen_vec_setv16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"vec_setv16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 173 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  HOST_WIDE_INT elem = HOST_WIDE_INT_1 << INTVAL (operands[2]);
  if (TARGET_NEON)
    emit_insn (gen_vec_setv16qi_internal (operands[0], operands[1],
					   GEN_INT (elem), operands[0]));
  else
    emit_insn (gen_mve_vec_setv16qi_internal (operands[0], operands[1],
					       GEN_INT (elem), operands[0]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:168 */
rtx
gen_vec_setv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"vec_setv8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 173 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  HOST_WIDE_INT elem = HOST_WIDE_INT_1 << INTVAL (operands[2]);
  if (TARGET_NEON)
    emit_insn (gen_vec_setv8hi_internal (operands[0], operands[1],
					   GEN_INT (elem), operands[0]));
  else
    emit_insn (gen_mve_vec_setv8hi_internal (operands[0], operands[1],
					       GEN_INT (elem), operands[0]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:168 */
rtx
gen_vec_setv8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"vec_setv8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 173 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  HOST_WIDE_INT elem = HOST_WIDE_INT_1 << INTVAL (operands[2]);
  if (TARGET_NEON)
    emit_insn (gen_vec_setv8hf_internal (operands[0], operands[1],
					   GEN_INT (elem), operands[0]));
  else
    emit_insn (gen_mve_vec_setv8hf_internal (operands[0], operands[1],
					       GEN_INT (elem), operands[0]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:168 */
rtx
gen_vec_setv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"vec_setv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 173 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  HOST_WIDE_INT elem = HOST_WIDE_INT_1 << INTVAL (operands[2]);
  if (TARGET_NEON)
    emit_insn (gen_vec_setv4si_internal (operands[0], operands[1],
					   GEN_INT (elem), operands[0]));
  else
    emit_insn (gen_mve_vec_setv4si_internal (operands[0], operands[1],
					       GEN_INT (elem), operands[0]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:168 */
rtx
gen_vec_setv4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"vec_setv4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 173 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  HOST_WIDE_INT elem = HOST_WIDE_INT_1 << INTVAL (operands[2]);
  if (TARGET_NEON)
    emit_insn (gen_vec_setv4sf_internal (operands[0], operands[1],
					   GEN_INT (elem), operands[0]));
  else
    emit_insn (gen_mve_vec_setv4sf_internal (operands[0], operands[1],
					       GEN_INT (elem), operands[0]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:168 */
rtx
gen_vec_setv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"vec_setv2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 173 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  HOST_WIDE_INT elem = HOST_WIDE_INT_1 << INTVAL (operands[2]);
  if (TARGET_NEON)
    emit_insn (gen_vec_setv2di_internal (operands[0], operands[1],
					   GEN_INT (elem), operands[0]));
  else
    emit_insn (gen_mve_vec_setv2di_internal (operands[0], operands[1],
					       GEN_INT (elem), operands[0]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:184 */
rtx
gen_andv8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:184 */
rtx
gen_andv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:184 */
rtx
gen_andv4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:184 */
rtx
gen_andv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:184 */
rtx
gen_andv2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:184 */
rtx
gen_andv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:184 */
rtx
gen_andv4hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V4HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:184 */
rtx
gen_andv8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:184 */
rtx
gen_andv2sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V2SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:184 */
rtx
gen_andv4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:184 */
rtx
gen_andv2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:191 */
rtx
gen_iorv8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:191 */
rtx
gen_iorv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:191 */
rtx
gen_iorv4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:191 */
rtx
gen_iorv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:191 */
rtx
gen_iorv2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:191 */
rtx
gen_iorv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:191 */
rtx
gen_iorv4hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V4HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:191 */
rtx
gen_iorv8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:191 */
rtx
gen_iorv2sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V2SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:191 */
rtx
gen_iorv4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:191 */
rtx
gen_iorv2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:198 */
rtx
gen_xorv8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:198 */
rtx
gen_xorv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:198 */
rtx
gen_xorv4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:198 */
rtx
gen_xorv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:198 */
rtx
gen_xorv2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:198 */
rtx
gen_xorv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:198 */
rtx
gen_xorv4hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V4HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:198 */
rtx
gen_xorv8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:198 */
rtx
gen_xorv2sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V2SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:198 */
rtx
gen_xorv4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:198 */
rtx
gen_xorv2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:205 */
rtx
gen_one_cmplv8qi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:205 */
rtx
gen_one_cmplv16qi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:205 */
rtx
gen_one_cmplv4hi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:205 */
rtx
gen_one_cmplv8hi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:205 */
rtx
gen_one_cmplv2si2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:205 */
rtx
gen_one_cmplv4si2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:205 */
rtx
gen_one_cmplv4hf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V4HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:205 */
rtx
gen_one_cmplv8hf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V8HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:205 */
rtx
gen_one_cmplv2sf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V2SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:205 */
rtx
gen_one_cmplv4sf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V4SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:205 */
rtx
gen_one_cmplv2di2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V2DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:211 */
rtx
gen_absv8qi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:211 */
rtx
gen_negv8qi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:211 */
rtx
gen_absv16qi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:211 */
rtx
gen_negv16qi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:211 */
rtx
gen_absv4hi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:211 */
rtx
gen_negv4hi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:211 */
rtx
gen_absv8hi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:211 */
rtx
gen_negv8hi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:211 */
rtx
gen_absv2si2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:211 */
rtx
gen_negv2si2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:211 */
rtx
gen_absv4si2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:211 */
rtx
gen_negv4si2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:211 */
rtx
gen_absv2sf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V2SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:211 */
rtx
gen_negv2sf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:211 */
rtx
gen_absv4sf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V4SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:211 */
rtx
gen_negv4sf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:211 */
rtx
gen_absv8hf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V8HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:211 */
rtx
gen_negv8hf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:211 */
rtx
gen_absv4hf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V4HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:211 */
rtx
gen_negv4hf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:217 */
rtx
gen_cadd90v4hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	368));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:217 */
rtx
gen_cadd270v4hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	369));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:217 */
rtx
gen_cadd90v8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	368));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:217 */
rtx
gen_cadd270v8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	369));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:217 */
rtx
gen_cadd90v2sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	368));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:217 */
rtx
gen_cadd270v2sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	369));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:217 */
rtx
gen_cadd90v4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	368));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:217 */
rtx
gen_cadd270v4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	369));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:229 */
rtx
gen_cmulv8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmulv8hf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 236 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx res1 = gen_reg_rtx (V8HFmode);
  if (TARGET_COMPLEX)
    {
      rtx tmp = force_reg (V8HFmode, CONST0_RTX (V8HFmode));
      emit_insn (gen_arm_vcmla0v8hf (res1, tmp,
						 operands[2], operands[1]));
    }
  else
    emit_insn (gen_arm_vcmla0v8hf (res1, CONST0_RTX (V8HFmode),
					       operands[2], operands[1]));

  emit_insn (gen_arm_vcmla90v8hf (operands[0], res1,
					     operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	376)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:229 */
rtx
gen_cmul_conjv8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmul_conjv8hf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 236 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx res1 = gen_reg_rtx (V8HFmode);
  if (TARGET_COMPLEX)
    {
      rtx tmp = force_reg (V8HFmode, CONST0_RTX (V8HFmode));
      emit_insn (gen_arm_vcmla0v8hf (res1, tmp,
						 operands[2], operands[1]));
    }
  else
    emit_insn (gen_arm_vcmla0v8hf (res1, CONST0_RTX (V8HFmode),
					       operands[2], operands[1]));

  emit_insn (gen_arm_vcmla270v8hf (operands[0], res1,
					     operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	380)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:229 */
rtx
gen_cmulv4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmulv4sf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 236 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx res1 = gen_reg_rtx (V4SFmode);
  if (TARGET_COMPLEX)
    {
      rtx tmp = force_reg (V4SFmode, CONST0_RTX (V4SFmode));
      emit_insn (gen_arm_vcmla0v4sf (res1, tmp,
						 operands[2], operands[1]));
    }
  else
    emit_insn (gen_arm_vcmla0v4sf (res1, CONST0_RTX (V4SFmode),
					       operands[2], operands[1]));

  emit_insn (gen_arm_vcmla90v4sf (operands[0], res1,
					     operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	376)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:229 */
rtx
gen_cmul_conjv4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmul_conjv4sf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 236 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx res1 = gen_reg_rtx (V4SFmode);
  if (TARGET_COMPLEX)
    {
      rtx tmp = force_reg (V4SFmode, CONST0_RTX (V4SFmode));
      emit_insn (gen_arm_vcmla0v4sf (res1, tmp,
						 operands[2], operands[1]));
    }
  else
    emit_insn (gen_arm_vcmla0v4sf (res1, CONST0_RTX (V4SFmode),
					       operands[2], operands[1]));

  emit_insn (gen_arm_vcmla270v4sf (operands[0], res1,
					     operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	380)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:253 */
rtx
gen_arm_vcmla0v4hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	370)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:253 */
rtx
gen_arm_vcmla90v4hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	371)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:253 */
rtx
gen_arm_vcmla180v4hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	372)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:253 */
rtx
gen_arm_vcmla270v4hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	373)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:253 */
rtx
gen_arm_vcmla0v8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	370)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:253 */
rtx
gen_arm_vcmla90v8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	371)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:253 */
rtx
gen_arm_vcmla180v8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	372)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:253 */
rtx
gen_arm_vcmla270v8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	373)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:253 */
rtx
gen_arm_vcmla0v2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	370)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:253 */
rtx
gen_arm_vcmla90v2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	371)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:253 */
rtx
gen_arm_vcmla180v2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	372)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:253 */
rtx
gen_arm_vcmla270v2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	373)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:253 */
rtx
gen_arm_vcmla0v4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	370)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:253 */
rtx
gen_arm_vcmla90v4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	371)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:253 */
rtx
gen_arm_vcmla180v4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	372)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:253 */
rtx
gen_arm_vcmla270v4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	373)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:266 */
rtx
gen_cmlav4hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlav4hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 274 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx tmp = gen_reg_rtx (V4HFmode);
  emit_insn (gen_arm_vcmla0v4hf (tmp, operands[3],
					     operands[2], operands[1]));
  emit_insn (gen_arm_vcmla90v4hf (operands[0], tmp,
					     operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	370),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:266 */
rtx
gen_cmla_conjv4hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmla_conjv4hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 274 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx tmp = gen_reg_rtx (V4HFmode);
  emit_insn (gen_arm_vcmla0v4hf (tmp, operands[3],
					     operands[2], operands[1]));
  emit_insn (gen_arm_vcmla270v4hf (operands[0], tmp,
					     operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	374),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:266 */
rtx
gen_cmlsv4hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlsv4hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 274 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx tmp = gen_reg_rtx (V4HFmode);
  emit_insn (gen_arm_vcmla180v4hf (tmp, operands[3],
					     operands[2], operands[1]));
  emit_insn (gen_arm_vcmla270v4hf (operands[0], tmp,
					     operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	372),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:266 */
rtx
gen_cmls_conjv4hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmls_conjv4hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 274 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx tmp = gen_reg_rtx (V4HFmode);
  emit_insn (gen_arm_vcmla180v4hf (tmp, operands[3],
					     operands[2], operands[1]));
  emit_insn (gen_arm_vcmla90v4hf (operands[0], tmp,
					     operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	375),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:266 */
rtx
gen_cmlav8hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlav8hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 274 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx tmp = gen_reg_rtx (V8HFmode);
  emit_insn (gen_arm_vcmla0v8hf (tmp, operands[3],
					     operands[2], operands[1]));
  emit_insn (gen_arm_vcmla90v8hf (operands[0], tmp,
					     operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	370),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:266 */
rtx
gen_cmla_conjv8hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmla_conjv8hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 274 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx tmp = gen_reg_rtx (V8HFmode);
  emit_insn (gen_arm_vcmla0v8hf (tmp, operands[3],
					     operands[2], operands[1]));
  emit_insn (gen_arm_vcmla270v8hf (operands[0], tmp,
					     operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	374),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:266 */
rtx
gen_cmlsv8hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlsv8hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 274 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx tmp = gen_reg_rtx (V8HFmode);
  emit_insn (gen_arm_vcmla180v8hf (tmp, operands[3],
					     operands[2], operands[1]));
  emit_insn (gen_arm_vcmla270v8hf (operands[0], tmp,
					     operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	372),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:266 */
rtx
gen_cmls_conjv8hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmls_conjv8hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 274 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx tmp = gen_reg_rtx (V8HFmode);
  emit_insn (gen_arm_vcmla180v8hf (tmp, operands[3],
					     operands[2], operands[1]));
  emit_insn (gen_arm_vcmla90v8hf (operands[0], tmp,
					     operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	375),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:266 */
rtx
gen_cmlav2sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlav2sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 274 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx tmp = gen_reg_rtx (V2SFmode);
  emit_insn (gen_arm_vcmla0v2sf (tmp, operands[3],
					     operands[2], operands[1]));
  emit_insn (gen_arm_vcmla90v2sf (operands[0], tmp,
					     operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	370),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:266 */
rtx
gen_cmla_conjv2sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmla_conjv2sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 274 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx tmp = gen_reg_rtx (V2SFmode);
  emit_insn (gen_arm_vcmla0v2sf (tmp, operands[3],
					     operands[2], operands[1]));
  emit_insn (gen_arm_vcmla270v2sf (operands[0], tmp,
					     operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	374),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:266 */
rtx
gen_cmlsv2sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlsv2sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 274 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx tmp = gen_reg_rtx (V2SFmode);
  emit_insn (gen_arm_vcmla180v2sf (tmp, operands[3],
					     operands[2], operands[1]));
  emit_insn (gen_arm_vcmla270v2sf (operands[0], tmp,
					     operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	372),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:266 */
rtx
gen_cmls_conjv2sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmls_conjv2sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 274 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx tmp = gen_reg_rtx (V2SFmode);
  emit_insn (gen_arm_vcmla180v2sf (tmp, operands[3],
					     operands[2], operands[1]));
  emit_insn (gen_arm_vcmla90v2sf (operands[0], tmp,
					     operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	375),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:266 */
rtx
gen_cmlav4sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlav4sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 274 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx tmp = gen_reg_rtx (V4SFmode);
  emit_insn (gen_arm_vcmla0v4sf (tmp, operands[3],
					     operands[2], operands[1]));
  emit_insn (gen_arm_vcmla90v4sf (operands[0], tmp,
					     operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	370),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:266 */
rtx
gen_cmla_conjv4sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmla_conjv4sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 274 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx tmp = gen_reg_rtx (V4SFmode);
  emit_insn (gen_arm_vcmla0v4sf (tmp, operands[3],
					     operands[2], operands[1]));
  emit_insn (gen_arm_vcmla270v4sf (operands[0], tmp,
					     operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	374),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:266 */
rtx
gen_cmlsv4sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlsv4sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 274 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx tmp = gen_reg_rtx (V4SFmode);
  emit_insn (gen_arm_vcmla180v4sf (tmp, operands[3],
					     operands[2], operands[1]));
  emit_insn (gen_arm_vcmla270v4sf (operands[0], tmp,
					     operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	372),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:266 */
rtx
gen_cmls_conjv4sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmls_conjv4sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 274 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx tmp = gen_reg_rtx (V4SFmode);
  emit_insn (gen_arm_vcmla180v4sf (tmp, operands[3],
					     operands[2], operands[1]));
  emit_insn (gen_arm_vcmla90v4sf (operands[0], tmp,
					     operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	375),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:283 */
rtx
gen_movmisalignv8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 289 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx *memloc;
  bool for_store = false;
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!s_register_operand (operands[0], V8QImode)
      && !s_register_operand (operands[1], V8QImode))
    operands[1] = force_reg (V8QImode, operands[1]);

  if (s_register_operand (operands[0], V8QImode))
    memloc = &operands[1];
  else
    {
      memloc = &operands[0];
      for_store = true;
    }

  /* For MVE, vector loads/stores must be aligned to the element size.  If the
     alignment is less than that convert the load/store to a suitable mode.  */
  if (TARGET_HAVE_MVE
      && (MEM_ALIGN (*memloc)
	  < GET_MODE_ALIGNMENT (GET_MODE_INNER (V8QImode))))
    {
      scalar_mode new_smode;
      switch (MEM_ALIGN (*memloc))
	{
	case 64:
	case 32:
	  new_smode = SImode;
	  break;
	case 16:
	  new_smode = HImode;
	  break;
	default:
	  new_smode = QImode;
	  break;
	}
      machine_mode new_mode
	= mode_for_vector (new_smode,
			   GET_MODE_SIZE (V8QImode)
			   / GET_MODE_SIZE (new_smode)).require ();
      rtx new_mem = adjust_address (*memloc, new_mode, 0);

      if (!for_store)
	{
	  rtx reg = gen_reg_rtx (new_mode);
	  emit_insn (gen_movmisalign (new_mode, reg, new_mem));
	  emit_move_insn (operands[0], gen_lowpart (V8QImode, reg));
	  DONE;
	}
      emit_insn (gen_movmisalign (new_mode, new_mem,
				  gen_lowpart (new_mode, operands[1])));
      DONE;
    }

  /* Legitimize address.  */
  if ((TARGET_HAVE_MVE
       && !mve_vector_mem_operand (V8QImode, XEXP (*memloc, 0), false))
      || (!TARGET_HAVE_MVE
	  && !neon_vector_mem_operand (*memloc, 2, false)))
    {
      rtx new_mem
	= replace_equiv_address (*memloc,
				 force_reg (Pmode, XEXP (*memloc, 0)),
				 false);
      gcc_assert (MEM_ALIGN (new_mem) == MEM_ALIGN (*memloc));
      *memloc = new_mem;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	344)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:283 */
rtx
gen_movmisalignv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 289 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx *memloc;
  bool for_store = false;
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!s_register_operand (operands[0], V16QImode)
      && !s_register_operand (operands[1], V16QImode))
    operands[1] = force_reg (V16QImode, operands[1]);

  if (s_register_operand (operands[0], V16QImode))
    memloc = &operands[1];
  else
    {
      memloc = &operands[0];
      for_store = true;
    }

  /* For MVE, vector loads/stores must be aligned to the element size.  If the
     alignment is less than that convert the load/store to a suitable mode.  */
  if (TARGET_HAVE_MVE
      && (MEM_ALIGN (*memloc)
	  < GET_MODE_ALIGNMENT (GET_MODE_INNER (V16QImode))))
    {
      scalar_mode new_smode;
      switch (MEM_ALIGN (*memloc))
	{
	case 64:
	case 32:
	  new_smode = SImode;
	  break;
	case 16:
	  new_smode = HImode;
	  break;
	default:
	  new_smode = QImode;
	  break;
	}
      machine_mode new_mode
	= mode_for_vector (new_smode,
			   GET_MODE_SIZE (V16QImode)
			   / GET_MODE_SIZE (new_smode)).require ();
      rtx new_mem = adjust_address (*memloc, new_mode, 0);

      if (!for_store)
	{
	  rtx reg = gen_reg_rtx (new_mode);
	  emit_insn (gen_movmisalign (new_mode, reg, new_mem));
	  emit_move_insn (operands[0], gen_lowpart (V16QImode, reg));
	  DONE;
	}
      emit_insn (gen_movmisalign (new_mode, new_mem,
				  gen_lowpart (new_mode, operands[1])));
      DONE;
    }

  /* Legitimize address.  */
  if ((TARGET_HAVE_MVE
       && !mve_vector_mem_operand (V16QImode, XEXP (*memloc, 0), false))
      || (!TARGET_HAVE_MVE
	  && !neon_vector_mem_operand (*memloc, 2, false)))
    {
      rtx new_mem
	= replace_equiv_address (*memloc,
				 force_reg (Pmode, XEXP (*memloc, 0)),
				 false);
      gcc_assert (MEM_ALIGN (new_mem) == MEM_ALIGN (*memloc));
      *memloc = new_mem;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	344)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:283 */
rtx
gen_movmisalignv4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 289 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx *memloc;
  bool for_store = false;
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!s_register_operand (operands[0], V4HImode)
      && !s_register_operand (operands[1], V4HImode))
    operands[1] = force_reg (V4HImode, operands[1]);

  if (s_register_operand (operands[0], V4HImode))
    memloc = &operands[1];
  else
    {
      memloc = &operands[0];
      for_store = true;
    }

  /* For MVE, vector loads/stores must be aligned to the element size.  If the
     alignment is less than that convert the load/store to a suitable mode.  */
  if (TARGET_HAVE_MVE
      && (MEM_ALIGN (*memloc)
	  < GET_MODE_ALIGNMENT (GET_MODE_INNER (V4HImode))))
    {
      scalar_mode new_smode;
      switch (MEM_ALIGN (*memloc))
	{
	case 64:
	case 32:
	  new_smode = SImode;
	  break;
	case 16:
	  new_smode = HImode;
	  break;
	default:
	  new_smode = QImode;
	  break;
	}
      machine_mode new_mode
	= mode_for_vector (new_smode,
			   GET_MODE_SIZE (V4HImode)
			   / GET_MODE_SIZE (new_smode)).require ();
      rtx new_mem = adjust_address (*memloc, new_mode, 0);

      if (!for_store)
	{
	  rtx reg = gen_reg_rtx (new_mode);
	  emit_insn (gen_movmisalign (new_mode, reg, new_mem));
	  emit_move_insn (operands[0], gen_lowpart (V4HImode, reg));
	  DONE;
	}
      emit_insn (gen_movmisalign (new_mode, new_mem,
				  gen_lowpart (new_mode, operands[1])));
      DONE;
    }

  /* Legitimize address.  */
  if ((TARGET_HAVE_MVE
       && !mve_vector_mem_operand (V4HImode, XEXP (*memloc, 0), false))
      || (!TARGET_HAVE_MVE
	  && !neon_vector_mem_operand (*memloc, 2, false)))
    {
      rtx new_mem
	= replace_equiv_address (*memloc,
				 force_reg (Pmode, XEXP (*memloc, 0)),
				 false);
      gcc_assert (MEM_ALIGN (new_mem) == MEM_ALIGN (*memloc));
      *memloc = new_mem;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	344)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:283 */
rtx
gen_movmisalignv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 289 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx *memloc;
  bool for_store = false;
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!s_register_operand (operands[0], V8HImode)
      && !s_register_operand (operands[1], V8HImode))
    operands[1] = force_reg (V8HImode, operands[1]);

  if (s_register_operand (operands[0], V8HImode))
    memloc = &operands[1];
  else
    {
      memloc = &operands[0];
      for_store = true;
    }

  /* For MVE, vector loads/stores must be aligned to the element size.  If the
     alignment is less than that convert the load/store to a suitable mode.  */
  if (TARGET_HAVE_MVE
      && (MEM_ALIGN (*memloc)
	  < GET_MODE_ALIGNMENT (GET_MODE_INNER (V8HImode))))
    {
      scalar_mode new_smode;
      switch (MEM_ALIGN (*memloc))
	{
	case 64:
	case 32:
	  new_smode = SImode;
	  break;
	case 16:
	  new_smode = HImode;
	  break;
	default:
	  new_smode = QImode;
	  break;
	}
      machine_mode new_mode
	= mode_for_vector (new_smode,
			   GET_MODE_SIZE (V8HImode)
			   / GET_MODE_SIZE (new_smode)).require ();
      rtx new_mem = adjust_address (*memloc, new_mode, 0);

      if (!for_store)
	{
	  rtx reg = gen_reg_rtx (new_mode);
	  emit_insn (gen_movmisalign (new_mode, reg, new_mem));
	  emit_move_insn (operands[0], gen_lowpart (V8HImode, reg));
	  DONE;
	}
      emit_insn (gen_movmisalign (new_mode, new_mem,
				  gen_lowpart (new_mode, operands[1])));
      DONE;
    }

  /* Legitimize address.  */
  if ((TARGET_HAVE_MVE
       && !mve_vector_mem_operand (V8HImode, XEXP (*memloc, 0), false))
      || (!TARGET_HAVE_MVE
	  && !neon_vector_mem_operand (*memloc, 2, false)))
    {
      rtx new_mem
	= replace_equiv_address (*memloc,
				 force_reg (Pmode, XEXP (*memloc, 0)),
				 false);
      gcc_assert (MEM_ALIGN (new_mem) == MEM_ALIGN (*memloc));
      *memloc = new_mem;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	344)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:283 */
rtx
gen_movmisalignv2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 289 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx *memloc;
  bool for_store = false;
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!s_register_operand (operands[0], V2SImode)
      && !s_register_operand (operands[1], V2SImode))
    operands[1] = force_reg (V2SImode, operands[1]);

  if (s_register_operand (operands[0], V2SImode))
    memloc = &operands[1];
  else
    {
      memloc = &operands[0];
      for_store = true;
    }

  /* For MVE, vector loads/stores must be aligned to the element size.  If the
     alignment is less than that convert the load/store to a suitable mode.  */
  if (TARGET_HAVE_MVE
      && (MEM_ALIGN (*memloc)
	  < GET_MODE_ALIGNMENT (GET_MODE_INNER (V2SImode))))
    {
      scalar_mode new_smode;
      switch (MEM_ALIGN (*memloc))
	{
	case 64:
	case 32:
	  new_smode = SImode;
	  break;
	case 16:
	  new_smode = HImode;
	  break;
	default:
	  new_smode = QImode;
	  break;
	}
      machine_mode new_mode
	= mode_for_vector (new_smode,
			   GET_MODE_SIZE (V2SImode)
			   / GET_MODE_SIZE (new_smode)).require ();
      rtx new_mem = adjust_address (*memloc, new_mode, 0);

      if (!for_store)
	{
	  rtx reg = gen_reg_rtx (new_mode);
	  emit_insn (gen_movmisalign (new_mode, reg, new_mem));
	  emit_move_insn (operands[0], gen_lowpart (V2SImode, reg));
	  DONE;
	}
      emit_insn (gen_movmisalign (new_mode, new_mem,
				  gen_lowpart (new_mode, operands[1])));
      DONE;
    }

  /* Legitimize address.  */
  if ((TARGET_HAVE_MVE
       && !mve_vector_mem_operand (V2SImode, XEXP (*memloc, 0), false))
      || (!TARGET_HAVE_MVE
	  && !neon_vector_mem_operand (*memloc, 2, false)))
    {
      rtx new_mem
	= replace_equiv_address (*memloc,
				 force_reg (Pmode, XEXP (*memloc, 0)),
				 false);
      gcc_assert (MEM_ALIGN (new_mem) == MEM_ALIGN (*memloc));
      *memloc = new_mem;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	344)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:283 */
rtx
gen_movmisalignv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 289 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx *memloc;
  bool for_store = false;
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!s_register_operand (operands[0], V4SImode)
      && !s_register_operand (operands[1], V4SImode))
    operands[1] = force_reg (V4SImode, operands[1]);

  if (s_register_operand (operands[0], V4SImode))
    memloc = &operands[1];
  else
    {
      memloc = &operands[0];
      for_store = true;
    }

  /* For MVE, vector loads/stores must be aligned to the element size.  If the
     alignment is less than that convert the load/store to a suitable mode.  */
  if (TARGET_HAVE_MVE
      && (MEM_ALIGN (*memloc)
	  < GET_MODE_ALIGNMENT (GET_MODE_INNER (V4SImode))))
    {
      scalar_mode new_smode;
      switch (MEM_ALIGN (*memloc))
	{
	case 64:
	case 32:
	  new_smode = SImode;
	  break;
	case 16:
	  new_smode = HImode;
	  break;
	default:
	  new_smode = QImode;
	  break;
	}
      machine_mode new_mode
	= mode_for_vector (new_smode,
			   GET_MODE_SIZE (V4SImode)
			   / GET_MODE_SIZE (new_smode)).require ();
      rtx new_mem = adjust_address (*memloc, new_mode, 0);

      if (!for_store)
	{
	  rtx reg = gen_reg_rtx (new_mode);
	  emit_insn (gen_movmisalign (new_mode, reg, new_mem));
	  emit_move_insn (operands[0], gen_lowpart (V4SImode, reg));
	  DONE;
	}
      emit_insn (gen_movmisalign (new_mode, new_mem,
				  gen_lowpart (new_mode, operands[1])));
      DONE;
    }

  /* Legitimize address.  */
  if ((TARGET_HAVE_MVE
       && !mve_vector_mem_operand (V4SImode, XEXP (*memloc, 0), false))
      || (!TARGET_HAVE_MVE
	  && !neon_vector_mem_operand (*memloc, 2, false)))
    {
      rtx new_mem
	= replace_equiv_address (*memloc,
				 force_reg (Pmode, XEXP (*memloc, 0)),
				 false);
      gcc_assert (MEM_ALIGN (new_mem) == MEM_ALIGN (*memloc));
      *memloc = new_mem;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	344)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:283 */
rtx
gen_movmisalignv4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 289 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx *memloc;
  bool for_store = false;
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!s_register_operand (operands[0], V4HFmode)
      && !s_register_operand (operands[1], V4HFmode))
    operands[1] = force_reg (V4HFmode, operands[1]);

  if (s_register_operand (operands[0], V4HFmode))
    memloc = &operands[1];
  else
    {
      memloc = &operands[0];
      for_store = true;
    }

  /* For MVE, vector loads/stores must be aligned to the element size.  If the
     alignment is less than that convert the load/store to a suitable mode.  */
  if (TARGET_HAVE_MVE
      && (MEM_ALIGN (*memloc)
	  < GET_MODE_ALIGNMENT (GET_MODE_INNER (V4HFmode))))
    {
      scalar_mode new_smode;
      switch (MEM_ALIGN (*memloc))
	{
	case 64:
	case 32:
	  new_smode = SImode;
	  break;
	case 16:
	  new_smode = HImode;
	  break;
	default:
	  new_smode = QImode;
	  break;
	}
      machine_mode new_mode
	= mode_for_vector (new_smode,
			   GET_MODE_SIZE (V4HFmode)
			   / GET_MODE_SIZE (new_smode)).require ();
      rtx new_mem = adjust_address (*memloc, new_mode, 0);

      if (!for_store)
	{
	  rtx reg = gen_reg_rtx (new_mode);
	  emit_insn (gen_movmisalign (new_mode, reg, new_mem));
	  emit_move_insn (operands[0], gen_lowpart (V4HFmode, reg));
	  DONE;
	}
      emit_insn (gen_movmisalign (new_mode, new_mem,
				  gen_lowpart (new_mode, operands[1])));
      DONE;
    }

  /* Legitimize address.  */
  if ((TARGET_HAVE_MVE
       && !mve_vector_mem_operand (V4HFmode, XEXP (*memloc, 0), false))
      || (!TARGET_HAVE_MVE
	  && !neon_vector_mem_operand (*memloc, 2, false)))
    {
      rtx new_mem
	= replace_equiv_address (*memloc,
				 force_reg (Pmode, XEXP (*memloc, 0)),
				 false);
      gcc_assert (MEM_ALIGN (new_mem) == MEM_ALIGN (*memloc));
      *memloc = new_mem;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	344)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:283 */
rtx
gen_movmisalignv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 289 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx *memloc;
  bool for_store = false;
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!s_register_operand (operands[0], V8HFmode)
      && !s_register_operand (operands[1], V8HFmode))
    operands[1] = force_reg (V8HFmode, operands[1]);

  if (s_register_operand (operands[0], V8HFmode))
    memloc = &operands[1];
  else
    {
      memloc = &operands[0];
      for_store = true;
    }

  /* For MVE, vector loads/stores must be aligned to the element size.  If the
     alignment is less than that convert the load/store to a suitable mode.  */
  if (TARGET_HAVE_MVE
      && (MEM_ALIGN (*memloc)
	  < GET_MODE_ALIGNMENT (GET_MODE_INNER (V8HFmode))))
    {
      scalar_mode new_smode;
      switch (MEM_ALIGN (*memloc))
	{
	case 64:
	case 32:
	  new_smode = SImode;
	  break;
	case 16:
	  new_smode = HImode;
	  break;
	default:
	  new_smode = QImode;
	  break;
	}
      machine_mode new_mode
	= mode_for_vector (new_smode,
			   GET_MODE_SIZE (V8HFmode)
			   / GET_MODE_SIZE (new_smode)).require ();
      rtx new_mem = adjust_address (*memloc, new_mode, 0);

      if (!for_store)
	{
	  rtx reg = gen_reg_rtx (new_mode);
	  emit_insn (gen_movmisalign (new_mode, reg, new_mem));
	  emit_move_insn (operands[0], gen_lowpart (V8HFmode, reg));
	  DONE;
	}
      emit_insn (gen_movmisalign (new_mode, new_mem,
				  gen_lowpart (new_mode, operands[1])));
      DONE;
    }

  /* Legitimize address.  */
  if ((TARGET_HAVE_MVE
       && !mve_vector_mem_operand (V8HFmode, XEXP (*memloc, 0), false))
      || (!TARGET_HAVE_MVE
	  && !neon_vector_mem_operand (*memloc, 2, false)))
    {
      rtx new_mem
	= replace_equiv_address (*memloc,
				 force_reg (Pmode, XEXP (*memloc, 0)),
				 false);
      gcc_assert (MEM_ALIGN (new_mem) == MEM_ALIGN (*memloc));
      *memloc = new_mem;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	344)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:283 */
rtx
gen_movmisalignv2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 289 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx *memloc;
  bool for_store = false;
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!s_register_operand (operands[0], V2SFmode)
      && !s_register_operand (operands[1], V2SFmode))
    operands[1] = force_reg (V2SFmode, operands[1]);

  if (s_register_operand (operands[0], V2SFmode))
    memloc = &operands[1];
  else
    {
      memloc = &operands[0];
      for_store = true;
    }

  /* For MVE, vector loads/stores must be aligned to the element size.  If the
     alignment is less than that convert the load/store to a suitable mode.  */
  if (TARGET_HAVE_MVE
      && (MEM_ALIGN (*memloc)
	  < GET_MODE_ALIGNMENT (GET_MODE_INNER (V2SFmode))))
    {
      scalar_mode new_smode;
      switch (MEM_ALIGN (*memloc))
	{
	case 64:
	case 32:
	  new_smode = SImode;
	  break;
	case 16:
	  new_smode = HImode;
	  break;
	default:
	  new_smode = QImode;
	  break;
	}
      machine_mode new_mode
	= mode_for_vector (new_smode,
			   GET_MODE_SIZE (V2SFmode)
			   / GET_MODE_SIZE (new_smode)).require ();
      rtx new_mem = adjust_address (*memloc, new_mode, 0);

      if (!for_store)
	{
	  rtx reg = gen_reg_rtx (new_mode);
	  emit_insn (gen_movmisalign (new_mode, reg, new_mem));
	  emit_move_insn (operands[0], gen_lowpart (V2SFmode, reg));
	  DONE;
	}
      emit_insn (gen_movmisalign (new_mode, new_mem,
				  gen_lowpart (new_mode, operands[1])));
      DONE;
    }

  /* Legitimize address.  */
  if ((TARGET_HAVE_MVE
       && !mve_vector_mem_operand (V2SFmode, XEXP (*memloc, 0), false))
      || (!TARGET_HAVE_MVE
	  && !neon_vector_mem_operand (*memloc, 2, false)))
    {
      rtx new_mem
	= replace_equiv_address (*memloc,
				 force_reg (Pmode, XEXP (*memloc, 0)),
				 false);
      gcc_assert (MEM_ALIGN (new_mem) == MEM_ALIGN (*memloc));
      *memloc = new_mem;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	344)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:283 */
rtx
gen_movmisalignv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 289 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx *memloc;
  bool for_store = false;
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!s_register_operand (operands[0], V4SFmode)
      && !s_register_operand (operands[1], V4SFmode))
    operands[1] = force_reg (V4SFmode, operands[1]);

  if (s_register_operand (operands[0], V4SFmode))
    memloc = &operands[1];
  else
    {
      memloc = &operands[0];
      for_store = true;
    }

  /* For MVE, vector loads/stores must be aligned to the element size.  If the
     alignment is less than that convert the load/store to a suitable mode.  */
  if (TARGET_HAVE_MVE
      && (MEM_ALIGN (*memloc)
	  < GET_MODE_ALIGNMENT (GET_MODE_INNER (V4SFmode))))
    {
      scalar_mode new_smode;
      switch (MEM_ALIGN (*memloc))
	{
	case 64:
	case 32:
	  new_smode = SImode;
	  break;
	case 16:
	  new_smode = HImode;
	  break;
	default:
	  new_smode = QImode;
	  break;
	}
      machine_mode new_mode
	= mode_for_vector (new_smode,
			   GET_MODE_SIZE (V4SFmode)
			   / GET_MODE_SIZE (new_smode)).require ();
      rtx new_mem = adjust_address (*memloc, new_mode, 0);

      if (!for_store)
	{
	  rtx reg = gen_reg_rtx (new_mode);
	  emit_insn (gen_movmisalign (new_mode, reg, new_mem));
	  emit_move_insn (operands[0], gen_lowpart (V4SFmode, reg));
	  DONE;
	}
      emit_insn (gen_movmisalign (new_mode, new_mem,
				  gen_lowpart (new_mode, operands[1])));
      DONE;
    }

  /* Legitimize address.  */
  if ((TARGET_HAVE_MVE
       && !mve_vector_mem_operand (V4SFmode, XEXP (*memloc, 0), false))
      || (!TARGET_HAVE_MVE
	  && !neon_vector_mem_operand (*memloc, 2, false)))
    {
      rtx new_mem
	= replace_equiv_address (*memloc,
				 force_reg (Pmode, XEXP (*memloc, 0)),
				 false);
      gcc_assert (MEM_ALIGN (new_mem) == MEM_ALIGN (*memloc));
      *memloc = new_mem;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	344)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:283 */
rtx
gen_movmisalignv2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 289 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  rtx *memloc;
  bool for_store = false;
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!s_register_operand (operands[0], V2DImode)
      && !s_register_operand (operands[1], V2DImode))
    operands[1] = force_reg (V2DImode, operands[1]);

  if (s_register_operand (operands[0], V2DImode))
    memloc = &operands[1];
  else
    {
      memloc = &operands[0];
      for_store = true;
    }

  /* For MVE, vector loads/stores must be aligned to the element size.  If the
     alignment is less than that convert the load/store to a suitable mode.  */
  if (TARGET_HAVE_MVE
      && (MEM_ALIGN (*memloc)
	  < GET_MODE_ALIGNMENT (GET_MODE_INNER (V2DImode))))
    {
      scalar_mode new_smode;
      switch (MEM_ALIGN (*memloc))
	{
	case 64:
	case 32:
	  new_smode = SImode;
	  break;
	case 16:
	  new_smode = HImode;
	  break;
	default:
	  new_smode = QImode;
	  break;
	}
      machine_mode new_mode
	= mode_for_vector (new_smode,
			   GET_MODE_SIZE (V2DImode)
			   / GET_MODE_SIZE (new_smode)).require ();
      rtx new_mem = adjust_address (*memloc, new_mode, 0);

      if (!for_store)
	{
	  rtx reg = gen_reg_rtx (new_mode);
	  emit_insn (gen_movmisalign (new_mode, reg, new_mem));
	  emit_move_insn (operands[0], gen_lowpart (V2DImode, reg));
	  DONE;
	}
      emit_insn (gen_movmisalign (new_mode, new_mem,
				  gen_lowpart (new_mode, operands[1])));
      DONE;
    }

  /* Legitimize address.  */
  if ((TARGET_HAVE_MVE
       && !mve_vector_mem_operand (V2DImode, XEXP (*memloc, 0), false))
      || (!TARGET_HAVE_MVE
	  && !neon_vector_mem_operand (*memloc, 2, false)))
    {
      rtx new_mem
	= replace_equiv_address (*memloc,
				 force_reg (Pmode, XEXP (*memloc, 0)),
				 false);
      gcc_assert (MEM_ALIGN (new_mem) == MEM_ALIGN (*memloc));
      *memloc = new_mem;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	344)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:372 */
rtx
gen_vashlv8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 377 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  emit_insn (gen_mve_vshlq_uv8qi (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V8QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:372 */
rtx
gen_vashlv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 377 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  emit_insn (gen_mve_vshlq_uv16qi (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V16QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:372 */
rtx
gen_vashlv4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 377 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  emit_insn (gen_mve_vshlq_uv4hi (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V4HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:372 */
rtx
gen_vashlv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 377 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  emit_insn (gen_mve_vshlq_uv8hi (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V8HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:372 */
rtx
gen_vashlv2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 377 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  emit_insn (gen_mve_vshlq_uv2si (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V2SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:372 */
rtx
gen_vashlv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 377 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  emit_insn (gen_mve_vshlq_uv4si (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V4SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:385 */
rtx
gen_vashrv8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 390 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (s_register_operand (operands[2], V8QImode))
    {
      rtx neg = gen_reg_rtx (V8QImode);
      emit_insn (gen_negv8qi2 (neg, operands[2]));
      emit_insn (gen_mve_vshlq_sv8qi (operands[0], operands[1], neg));
      DONE;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V8QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:385 */
rtx
gen_vashrv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 390 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (s_register_operand (operands[2], V16QImode))
    {
      rtx neg = gen_reg_rtx (V16QImode);
      emit_insn (gen_negv16qi2 (neg, operands[2]));
      emit_insn (gen_mve_vshlq_sv16qi (operands[0], operands[1], neg));
      DONE;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V16QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:385 */
rtx
gen_vashrv4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 390 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (s_register_operand (operands[2], V4HImode))
    {
      rtx neg = gen_reg_rtx (V4HImode);
      emit_insn (gen_negv4hi2 (neg, operands[2]));
      emit_insn (gen_mve_vshlq_sv4hi (operands[0], operands[1], neg));
      DONE;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V4HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:385 */
rtx
gen_vashrv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 390 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (s_register_operand (operands[2], V8HImode))
    {
      rtx neg = gen_reg_rtx (V8HImode);
      emit_insn (gen_negv8hi2 (neg, operands[2]));
      emit_insn (gen_mve_vshlq_sv8hi (operands[0], operands[1], neg));
      DONE;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V8HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:385 */
rtx
gen_vashrv2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 390 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (s_register_operand (operands[2], V2SImode))
    {
      rtx neg = gen_reg_rtx (V2SImode);
      emit_insn (gen_negv2si2 (neg, operands[2]));
      emit_insn (gen_mve_vshlq_sv2si (operands[0], operands[1], neg));
      DONE;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V2SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:385 */
rtx
gen_vashrv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 390 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (s_register_operand (operands[2], V4SImode))
    {
      rtx neg = gen_reg_rtx (V4SImode);
      emit_insn (gen_negv4si2 (neg, operands[2]));
      emit_insn (gen_mve_vshlq_sv4si (operands[0], operands[1], neg));
      DONE;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V4SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:403 */
rtx
gen_vlshrv8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 408 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (s_register_operand (operands[2], V8QImode))
    {
      rtx neg = gen_reg_rtx (V8QImode);
      emit_insn (gen_negv8qi2 (neg, operands[2]));
      emit_insn (gen_mve_vshlq_uv8qi (operands[0], operands[1], neg));
      DONE;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V8QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:403 */
rtx
gen_vlshrv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 408 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (s_register_operand (operands[2], V16QImode))
    {
      rtx neg = gen_reg_rtx (V16QImode);
      emit_insn (gen_negv16qi2 (neg, operands[2]));
      emit_insn (gen_mve_vshlq_uv16qi (operands[0], operands[1], neg));
      DONE;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V16QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:403 */
rtx
gen_vlshrv4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 408 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (s_register_operand (operands[2], V4HImode))
    {
      rtx neg = gen_reg_rtx (V4HImode);
      emit_insn (gen_negv4hi2 (neg, operands[2]));
      emit_insn (gen_mve_vshlq_uv4hi (operands[0], operands[1], neg));
      DONE;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V4HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:403 */
rtx
gen_vlshrv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 408 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (s_register_operand (operands[2], V8HImode))
    {
      rtx neg = gen_reg_rtx (V8HImode);
      emit_insn (gen_negv8hi2 (neg, operands[2]));
      emit_insn (gen_mve_vshlq_uv8hi (operands[0], operands[1], neg));
      DONE;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V8HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:403 */
rtx
gen_vlshrv2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 408 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (s_register_operand (operands[2], V2SImode))
    {
      rtx neg = gen_reg_rtx (V2SImode);
      emit_insn (gen_negv2si2 (neg, operands[2]));
      emit_insn (gen_mve_vshlq_uv2si (operands[0], operands[1], neg));
      DONE;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V2SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:403 */
rtx
gen_vlshrv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 408 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (s_register_operand (operands[2], V4SImode))
    {
      rtx neg = gen_reg_rtx (V4SImode);
      emit_insn (gen_negv4si2 (neg, operands[2]));
      emit_insn (gen_mve_vshlq_uv4si (operands[0], operands[1], neg));
      DONE;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V4SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:426 */
rtx
gen_vcondv8qiv8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv8qiv8qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 437 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V8QImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V8QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:426 */
rtx
gen_vcondv16qiv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv16qiv16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 437 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V16QImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V16QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:426 */
rtx
gen_vcondv4hiv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv4hiv4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 437 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V4HImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:426 */
rtx
gen_vcondv8hiv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv8hiv8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 437 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V8HImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V8HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:426 */
rtx
gen_vcondv2siv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv2siv2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 437 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V2SImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V2SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:426 */
rtx
gen_vcondv4siv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv4siv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 437 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V4SImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:426 */
rtx
gen_vcondv2sfv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv2sfv2sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 437 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V2SImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V2SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:426 */
rtx
gen_vcondv4sfv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv4sfv4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 437 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V4SImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:426 */
rtx
gen_vcondv8hfv8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv8hfv8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 437 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V8HImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V8HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:426 */
rtx
gen_vcondv4hfv4hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv4hfv4hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 437 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V4HImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:442 */
rtx
gen_vcondv2sfv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv2sfv2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 453 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V2SImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V2SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:442 */
rtx
gen_vcondv2siv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv2siv2sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 453 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V2SImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V2SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:442 */
rtx
gen_vcondv4sfv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv4sfv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 453 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V4SImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:442 */
rtx
gen_vcondv4siv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv4siv4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 453 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V4SImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:458 */
rtx
gen_vcondv4hfv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv4hfv4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 469 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V4HImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:458 */
rtx
gen_vcondv4hiv4hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv4hiv4hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 469 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V4HImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:458 */
rtx
gen_vcondv8hfv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv8hfv8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 469 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V8HImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V8HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:458 */
rtx
gen_vcondv8hiv8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv8hiv8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 469 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V8HImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V8HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:474 */
rtx
gen_vconduv8qiv8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduv8qiv8qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 484 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V8QImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V8QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:474 */
rtx
gen_vconduv16qiv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduv16qiv16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 484 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V16QImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V16QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:474 */
rtx
gen_vconduv4hiv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduv4hiv4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 484 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V4HImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:474 */
rtx
gen_vconduv8hiv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduv8hiv8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 484 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V8HImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V8HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:474 */
rtx
gen_vconduv2siv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduv2siv2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 484 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V2SImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V2SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:474 */
rtx
gen_vconduv4siv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduv4siv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 484 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V4SImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:474 */
rtx
gen_vconduv2sfv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduv2sfv2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 484 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V2SImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V2SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:474 */
rtx
gen_vconduv4sfv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduv4sfv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 484 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  arm_expand_vcond (operands, V4SImode);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:489 */
rtx
gen_vec_load_lanesoiv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesoiv16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 495 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vld2v16qi (operands[0], operands[1]));
  else
    emit_insn (gen_mve_vld2qv16qi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:489 */
rtx
gen_vec_load_lanesoiv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesoiv8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 495 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vld2v8hi (operands[0], operands[1]));
  else
    emit_insn (gen_mve_vld2qv8hi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:489 */
rtx
gen_vec_load_lanesoiv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesoiv8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 495 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vld2v8hf (operands[0], operands[1]));
  else
    emit_insn (gen_mve_vld2qv8hf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:489 */
rtx
gen_vec_load_lanesoiv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesoiv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 495 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vld2v4si (operands[0], operands[1]));
  else
    emit_insn (gen_mve_vld2qv4si (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:489 */
rtx
gen_vec_load_lanesoiv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesoiv4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 495 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vld2v4sf (operands[0], operands[1]));
  else
    emit_insn (gen_mve_vld2qv4sf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:503 */
rtx
gen_vec_store_lanesoiv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesoiv16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 509 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vst2v16qi (operands[0], operands[1]));
  else
    emit_insn (gen_mve_vst2qv16qi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:503 */
rtx
gen_vec_store_lanesoiv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesoiv8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 509 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vst2v8hi (operands[0], operands[1]));
  else
    emit_insn (gen_mve_vst2qv8hi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:503 */
rtx
gen_vec_store_lanesoiv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesoiv8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 509 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vst2v8hf (operands[0], operands[1]));
  else
    emit_insn (gen_mve_vst2qv8hf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:503 */
rtx
gen_vec_store_lanesoiv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesoiv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 509 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vst2v4si (operands[0], operands[1]));
  else
    emit_insn (gen_mve_vst2qv4si (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:503 */
rtx
gen_vec_store_lanesoiv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesoiv4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 509 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vst2v4sf (operands[0], operands[1]));
  else
    emit_insn (gen_mve_vst2qv4sf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:517 */
rtx
gen_vec_load_lanesxiv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesxiv16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 522 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vld4v16qi (operands[0], operands[1]));
  else
    emit_insn (gen_mve_vld4qv16qi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:517 */
rtx
gen_vec_load_lanesxiv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesxiv8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 522 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vld4v8hi (operands[0], operands[1]));
  else
    emit_insn (gen_mve_vld4qv8hi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:517 */
rtx
gen_vec_load_lanesxiv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesxiv8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 522 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vld4v8hf (operands[0], operands[1]));
  else
    emit_insn (gen_mve_vld4qv8hf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:517 */
rtx
gen_vec_load_lanesxiv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesxiv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 522 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vld4v4si (operands[0], operands[1]));
  else
    emit_insn (gen_mve_vld4qv4si (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:517 */
rtx
gen_vec_load_lanesxiv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesxiv4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 522 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vld4v4sf (operands[0], operands[1]));
  else
    emit_insn (gen_mve_vld4qv4sf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:530 */
rtx
gen_vec_store_lanesxiv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesxiv16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 535 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vst4v16qi (operands[0], operands[1]));
  else
    emit_insn (gen_mve_vst4qv16qi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:530 */
rtx
gen_vec_store_lanesxiv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesxiv8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 535 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vst4v8hi (operands[0], operands[1]));
  else
    emit_insn (gen_mve_vst4qv8hi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:530 */
rtx
gen_vec_store_lanesxiv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesxiv8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 535 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vst4v8hf (operands[0], operands[1]));
  else
    emit_insn (gen_mve_vst4qv8hf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:530 */
rtx
gen_vec_store_lanesxiv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesxiv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 535 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vst4v4si (operands[0], operands[1]));
  else
    emit_insn (gen_mve_vst4qv4si (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:530 */
rtx
gen_vec_store_lanesxiv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesxiv4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 535 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    emit_insn (gen_neon_vst4v4sf (operands[0], operands[1]));
  else
    emit_insn (gen_mve_vst4qv4sf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:543 */
rtx
gen_reduc_plus_scal_v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_plus_scal_v16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 549 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    {
      rtx step1 = gen_reg_rtx (V8QImode);

      emit_insn (gen_quad_halves_plusv16qi (step1, operands[1]));
      emit_insn (gen_reduc_plus_scal_v8qi (operands[0], step1));
    }
  else
    {
      /* vaddv generates a 32 bits accumulator.  */
      rtx op0 = gen_reg_rtx (SImode);

      emit_insn (gen_mve_vaddvq (VADDVQ_S, V16QImode, op0, operands[1]));
      emit_move_insn (operands[0], gen_lowpart (QImode, op0));
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:543 */
rtx
gen_reduc_plus_scal_v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_plus_scal_v8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 549 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    {
      rtx step1 = gen_reg_rtx (V4HImode);

      emit_insn (gen_quad_halves_plusv8hi (step1, operands[1]));
      emit_insn (gen_reduc_plus_scal_v4hi (operands[0], step1));
    }
  else
    {
      /* vaddv generates a 32 bits accumulator.  */
      rtx op0 = gen_reg_rtx (SImode);

      emit_insn (gen_mve_vaddvq (VADDVQ_S, V8HImode, op0, operands[1]));
      emit_move_insn (operands[0], gen_lowpart (HImode, op0));
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:543 */
rtx
gen_reduc_plus_scal_v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_plus_scal_v4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 549 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    {
      rtx step1 = gen_reg_rtx (V2SImode);

      emit_insn (gen_quad_halves_plusv4si (step1, operands[1]));
      emit_insn (gen_reduc_plus_scal_v2si (operands[0], step1));
    }
  else
    {
      /* vaddv generates a 32 bits accumulator.  */
      rtx op0 = gen_reg_rtx (SImode);

      emit_insn (gen_mve_vaddvq (VADDVQ_S, V4SImode, op0, operands[1]));
      emit_move_insn (operands[0], gen_lowpart (SImode, op0));
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:543 */
rtx
gen_reduc_plus_scal_v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_plus_scal_v4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 549 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_NEON)
    {
      rtx step1 = gen_reg_rtx (V2SFmode);

      emit_insn (gen_quad_halves_plusv4sf (step1, operands[1]));
      emit_insn (gen_reduc_plus_scal_v2sf (operands[0], step1));
    }
  else
    {
      /* vaddv generates a 32 bits accumulator.  */
      rtx op0 = gen_reg_rtx (SImode);

      emit_insn (gen_mve_vaddvq (VADDVQ_S, V4SFmode, op0, operands[1]));
      emit_move_insn (operands[0], gen_lowpart (SFmode, op0));
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:569 */
rtx
gen_avgv16qi3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 574 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_HAVE_MVE)
    emit_insn (gen_mve_vhaddq (VHADDQ_S, V16QImode,
			       operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vhadd (UNSPEC_VHADD_S, UNSPEC_VHADD_S, V16QImode,
			       operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:569 */
rtx
gen_avgv8hi3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 574 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_HAVE_MVE)
    emit_insn (gen_mve_vhaddq (VHADDQ_S, V8HImode,
			       operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vhadd (UNSPEC_VHADD_S, UNSPEC_VHADD_S, V8HImode,
			       operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:569 */
rtx
gen_avgv4si3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 574 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_HAVE_MVE)
    emit_insn (gen_mve_vhaddq (VHADDQ_S, V4SImode,
			       operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vhadd (UNSPEC_VHADD_S, UNSPEC_VHADD_S, V4SImode,
			       operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:584 */
rtx
gen_uavgv16qi3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 589 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_HAVE_MVE)
    emit_insn (gen_mve_vhaddq (VHADDQ_U, V16QImode,
			       operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vhadd (UNSPEC_VHADD_U, UNSPEC_VHADD_U, V16QImode,
			       operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:584 */
rtx
gen_uavgv8hi3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 589 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_HAVE_MVE)
    emit_insn (gen_mve_vhaddq (VHADDQ_U, V8HImode,
			       operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vhadd (UNSPEC_VHADD_U, UNSPEC_VHADD_U, V8HImode,
			       operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:584 */
rtx
gen_uavgv4si3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 589 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_HAVE_MVE)
    emit_insn (gen_mve_vhaddq (VHADDQ_U, V4SImode,
			       operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vhadd (UNSPEC_VHADD_U, UNSPEC_VHADD_U, V4SImode,
			       operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:599 */
rtx
gen_avgv16qi3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 604 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_HAVE_MVE)
    emit_insn (gen_mve_vrhaddq (VRHADDQ_S, V16QImode,
				operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vhadd (UNSPEC_VRHADD_S, UNSPEC_VRHADD_S, V16QImode,
			       operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:599 */
rtx
gen_avgv8hi3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 604 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_HAVE_MVE)
    emit_insn (gen_mve_vrhaddq (VRHADDQ_S, V8HImode,
				operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vhadd (UNSPEC_VRHADD_S, UNSPEC_VRHADD_S, V8HImode,
			       operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:599 */
rtx
gen_avgv4si3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 604 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_HAVE_MVE)
    emit_insn (gen_mve_vrhaddq (VRHADDQ_S, V4SImode,
				operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vhadd (UNSPEC_VRHADD_S, UNSPEC_VRHADD_S, V4SImode,
			       operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:614 */
rtx
gen_uavgv16qi3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 619 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_HAVE_MVE)
    emit_insn (gen_mve_vrhaddq (VRHADDQ_U, V16QImode,
				operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vhadd (UNSPEC_VRHADD_U, UNSPEC_VRHADD_U, V16QImode,
			       operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:614 */
rtx
gen_uavgv8hi3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 619 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_HAVE_MVE)
    emit_insn (gen_mve_vrhaddq (VRHADDQ_U, V8HImode,
				operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vhadd (UNSPEC_VRHADD_U, UNSPEC_VRHADD_U, V8HImode,
			       operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:614 */
rtx
gen_uavgv4si3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 619 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  if (TARGET_HAVE_MVE)
    emit_insn (gen_mve_vrhaddq (VRHADDQ_U, V4SImode,
				operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vhadd (UNSPEC_VRHADD_U, UNSPEC_VRHADD_U, V4SImode,
			       operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:629 */
rtx
gen_clzv8qi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:629 */
rtx
gen_clzv16qi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:629 */
rtx
gen_clzv4hi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:629 */
rtx
gen_clzv8hi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:629 */
rtx
gen_clzv2si2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:629 */
rtx
gen_clzv4si2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:635 */
rtx
gen_vec_initv8qiqi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 639 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  neon_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:635 */
rtx
gen_vec_initv16qiqi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 639 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  neon_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:635 */
rtx
gen_vec_initv4hihi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 639 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  neon_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:635 */
rtx
gen_vec_initv8hihi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 639 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  neon_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:635 */
rtx
gen_vec_initv2sisi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 639 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  neon_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:635 */
rtx
gen_vec_initv4sisi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 639 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  neon_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:635 */
rtx
gen_vec_initv4hfhf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 639 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  neon_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:635 */
rtx
gen_vec_initv8hfhf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 639 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  neon_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:635 */
rtx
gen_vec_initv4bfbf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 639 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  neon_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:635 */
rtx
gen_vec_initv8bfbf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 639 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  neon_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:635 */
rtx
gen_vec_initv2sfsf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 639 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  neon_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:635 */
rtx
gen_vec_initv4sfsf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 639 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  neon_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:635 */
rtx
gen_vec_initdidi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 639 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  neon_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md:635 */
rtx
gen_vec_initv2didi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 639 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vec-common.md"
{
  neon_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:248 */
rtx
gen_iwmmxt_setwcgr0 (rtx operand0)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[1];
    operands[0] = operand0;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 252 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
  }
  emit_insn (gen_rtx_SET (gen_rtx_REG (SImode,
	96),
	operand0));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:255 */
rtx
gen_iwmmxt_setwcgr1 (rtx operand0)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[1];
    operands[0] = operand0;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 259 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
  }
  emit_insn (gen_rtx_SET (gen_rtx_REG (SImode,
	97),
	operand0));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:262 */
rtx
gen_iwmmxt_setwcgr2 (rtx operand0)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[1];
    operands[0] = operand0;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 266 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
  }
  emit_insn (gen_rtx_SET (gen_rtx_REG (SImode,
	98),
	operand0));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:269 */
rtx
gen_iwmmxt_setwcgr3 (rtx operand0)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[1];
    operands[0] = operand0;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 273 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
  }
  emit_insn (gen_rtx_SET (gen_rtx_REG (SImode,
	99),
	operand0));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:276 */
rtx
gen_iwmmxt_getwcgr0 (rtx operand0)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[1];
    operands[0] = operand0;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 280 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_REG (SImode,
	96)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:283 */
rtx
gen_iwmmxt_getwcgr1 (rtx operand0)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[1];
    operands[0] = operand0;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 287 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_REG (SImode,
	97)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:290 */
rtx
gen_iwmmxt_getwcgr2 (rtx operand0)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[1];
    operands[0] = operand0;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 294 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_REG (SImode,
	98)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md:297 */
rtx
gen_iwmmxt_getwcgr3 (rtx operand0)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[1];
    operands[0] = operand0;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 301 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/iwmmxt.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_REG (SImode,
	99)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:898 */
extern rtx_insn *gen_split_106 (rtx_insn *, rtx *);
rtx_insn *
gen_split_106 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_106 (vfp.md:898)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 909 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md"

  if (REGNO (operands[0]) == REGNO (operands[1]))
    {
      operands[0] = gen_highpart (SImode, operands[0]);
      operands[1] = gen_rtx_XOR (SImode, operands[0],
				 gen_int_mode (0x80000000, SImode));
    }
  else
    {
      rtx in_hi, in_lo, out_hi, out_lo;

      in_hi = gen_rtx_XOR (SImode, gen_highpart (SImode, operands[1]),
			   gen_int_mode (0x80000000, SImode));
      in_lo = gen_lowpart (SImode, operands[1]);
      out_hi = gen_highpart (SImode, operands[0]);
      out_lo = gen_lowpart (SImode, operands[0]);

      if (REGNO (in_lo) == REGNO (out_hi))
        {
          emit_insn (gen_rtx_SET (out_lo, in_lo));
	  operands[0] = out_hi;
          operands[1] = in_hi;
        }
      else
        {
          emit_insn (gen_rtx_SET (out_hi, in_hi));
	  operands[0] = out_lo;
          operands[1] = in_lo;
        }
    }
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:955 */
rtx
gen_neon_vabshf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 960 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md"
{
  emit_insn (gen_abshf2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ABS (HFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1348 */
rtx
gen_neon_vfmahf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1354 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md"
{
  emit_insn (gen_fmahf4 (operands[0], operands[2], operands[3],
			 operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1383 */
rtx
gen_neon_vfmshf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1389 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md"
{
  emit_insn (gen_fmsubhf4_fp16 (operands[0], operands[2], operands[3],
				operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1745 */
extern rtx_insn *gen_split_107 (rtx_insn *, rtx *);
rtx_insn *
gen_split_107 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_107 (vfp.md:1745)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1757 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (gen_rtx_REG (CCFPmode,
	101),
	gen_rtx_COMPARE (CCFPmode,
	operand0,
	operand1)));
  emit_insn (gen_rtx_SET (gen_rtx_REG (CCFPmode,
	100),
	gen_rtx_REG (CCFPmode,
	101)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1760 */
extern rtx_insn *gen_split_108 (rtx_insn *, rtx *);
rtx_insn *
gen_split_108 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_108 (vfp.md:1760)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1772 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (gen_rtx_REG (CCFPEmode,
	101),
	gen_rtx_COMPARE (CCFPEmode,
	operand0,
	operand1)));
  emit_insn (gen_rtx_SET (gen_rtx_REG (CCFPEmode,
	100),
	gen_rtx_REG (CCFPEmode,
	101)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1775 */
extern rtx_insn *gen_split_109 (rtx_insn *, rtx *);
rtx_insn *
gen_split_109 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_109 (vfp.md:1775)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1787 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (gen_rtx_REG (CCFPmode,
	101),
	gen_rtx_COMPARE (CCFPmode,
	operand0,
	operand1)));
  emit_insn (gen_rtx_SET (gen_rtx_REG (CCFPmode,
	100),
	gen_rtx_REG (CCFPmode,
	101)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1790 */
extern rtx_insn *gen_split_110 (rtx_insn *, rtx *);
rtx_insn *
gen_split_110 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_110 (vfp.md:1790)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1802 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (gen_rtx_REG (CCFPEmode,
	101),
	gen_rtx_COMPARE (CCFPEmode,
	operand0,
	operand1)));
  emit_insn (gen_rtx_SET (gen_rtx_REG (CCFPEmode,
	100),
	gen_rtx_REG (CCFPEmode,
	101)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1951 */
rtx
gen_neon_vcvths_nhf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1957 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md"
{
  rtx op1 = gen_reg_rtx (SImode);

  arm_const_bounds (operands[2], 1, 33);

  emit_move_insn (op1, operands[1]);
  emit_insn (gen_neon_vcvths_nhf_unspec (op1, op1, operands[2],
					     operands[0]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	177));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1951 */
rtx
gen_neon_vcvthu_nhf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1957 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md"
{
  rtx op1 = gen_reg_rtx (SImode);

  arm_const_bounds (operands[2], 1, 33);

  emit_move_insn (op1, operands[1]);
  emit_insn (gen_neon_vcvthu_nhf_unspec (op1, op1, operands[2],
					     operands[0]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	178));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1992 */
rtx
gen_neon_vcvths_nsi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1999 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md"
{
  rtx op1 = gen_reg_rtx (SImode);

  arm_const_bounds (operands[2], 1, 33);
  emit_insn (gen_neon_vcvths_nsi_unspec (op1, operands[1], operands[2]));
  emit_move_insn (operands[0], op1);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	179));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:1992 */
rtx
gen_neon_vcvthu_nsi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1999 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md"
{
  rtx op1 = gen_reg_rtx (SImode);

  arm_const_bounds (operands[2], 1, 33);
  emit_insn (gen_neon_vcvthu_nsi_unspec (op1, operands[1], operands[2]));
  emit_move_insn (operands[0], op1);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	180));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2138 */
extern rtx_insn *gen_split_111 (rtx_insn *, rtx *);
rtx_insn *
gen_split_111 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_111 (vfp.md:2138)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2149 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md"
{
  long buf[2];
  int order = BYTES_BIG_ENDIAN ? 1 : 0;
  real_to_target (buf, CONST_DOUBLE_REAL_VALUE (operands[1]), DFmode);
  unsigned HOST_WIDE_INT ival = zext_hwi (buf[order], 32);
  ival |= (zext_hwi (buf[1 - order], 32) << 32);
  rtx cst = gen_int_mode (ival, DImode);
  emit_move_insn (operands[2], cst);
  emit_move_insn (operands[0],
		  simplify_gen_subreg (DFmode, operands[2], DImode, 0));
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:2165 */
extern rtx_insn *gen_split_112 (rtx_insn *, rtx *);
rtx_insn *
gen_split_112 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_112 (vfp.md:2165)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2175 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md"
{
  long buf;
  real_to_target (&buf, CONST_DOUBLE_REAL_VALUE (operands[1]), SFmode);
  rtx cst = gen_int_mode (buf, SImode);
  emit_move_insn (simplify_gen_subreg (SImode, operands[2], SFmode, 0), cst);
  emit_move_insn (operands[0], operands[2]);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:62 */
extern rtx_insn *gen_split_113 (rtx_insn *, rtx *);
rtx_insn *
gen_split_113 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_113 (thumb1.md:62)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 94 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"
{
    HOST_WIDE_INT offset = INTVAL (operands[2]);
    if (operands[1] == stack_pointer_rtx)
      offset -= 1020;
    else
      {
        if (offset > 255)
	  offset = 255;
	else if (offset < -255)
	  offset = -255;
      }
    operands[3] = GEN_INT (offset);
    operands[2] = GEN_INT (INTVAL (operands[2]) - offset);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	operand1,
	operand2)));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_PLUS (SImode,
	copy_rtx (operand0),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:115 */
extern rtx_insn *gen_peephole2_35 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_35 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_35 (thumb1.md:115)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 124 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_REG (SImode,
	13),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:198 */
extern rtx_insn *gen_split_114 (rtx_insn *, rtx *);
rtx_insn *
gen_split_114 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_114 (thumb1.md:198)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 207 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"
{
     HOST_WIDE_INT temp = INTVAL (operands[2]);

     operands[2] = GEN_INT (32 - temp - INTVAL (operands[3]));
     operands[3] = GEN_INT (32 - temp);
   }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand4,
	gen_rtx_ASHIFT (SImode,
	operand1,
	operand2)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (SImode,
	copy_rtx (operand4),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:215 */
extern rtx_insn *gen_split_115 (rtx_insn *, rtx *);
rtx_insn *
gen_split_115 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_115 (thumb1.md:215)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 223 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"
{
     HOST_WIDE_INT temp = INTVAL (operands[2]);

     operands[2] = GEN_INT (32 - temp - INTVAL (operands[3]));
     operands[3] = GEN_INT (32 - temp);
   }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (SImode,
	operand1,
	operand2)));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_ASHIFTRT (SImode,
	copy_rtx (operand0),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:330 */
extern rtx_insn *gen_split_116 (rtx_insn *, rtx *);
rtx_insn *
gen_split_116 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_116 (thumb1.md:330)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 340 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand2,
	gen_rtx_ASHIFTRT (SImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (31)])));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2))));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_XOR (SImode,
	copy_rtx (operand0),
	copy_rtx (operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:345 */
extern rtx_insn *gen_split_117 (rtx_insn *, rtx *);
rtx_insn *
gen_split_117 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_117 (thumb1.md:345)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 355 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand2,
	gen_rtx_ASHIFTRT (SImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (31)])));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand2),
	copy_rtx (operand1))));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_XOR (SImode,
	copy_rtx (operand0),
	copy_rtx (operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:509 */
extern rtx_insn *gen_split_118 (rtx_insn *, rtx *);
rtx_insn *
gen_split_118 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_118 (thumb1.md:509)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 515 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"
{
  rtx addr = XEXP (operands[1], 0);

  if (GET_CODE (addr) == CONST)
    addr = XEXP (addr, 0);

  if (GET_CODE (addr) == PLUS
      && REG_P (XEXP (addr, 0)) && REG_P (XEXP (addr, 1)))
    /* No split necessary.  */
    FAIL;

  if (GET_CODE (addr) == PLUS
      && !REG_P (XEXP (addr, 0)) && !REG_P (XEXP (addr, 1)))
    FAIL;

  if (reg_overlap_mentioned_p (operands[0], addr))
    {
      rtx t = gen_lowpart (QImode, operands[0]);
      emit_move_insn (t, operands[1]);
      emit_insn (gen_thumb1_extendqisi2 (operands[0], t));
      DONE;
    }

  if (REG_P (addr))
    {
      addr = gen_rtx_PLUS (Pmode, addr, operands[0]);
      operands[2] = const0_rtx;
    }
  else if (GET_CODE (addr) != PLUS)
    FAIL;
  else if (REG_P (XEXP (addr, 0)))
    {
      operands[2] = XEXP (addr, 1);
      addr = gen_rtx_PLUS (Pmode, XEXP (addr, 0), operands[0]);
    }
  else
    {
      operands[2] = XEXP (addr, 0);
      addr = gen_rtx_PLUS (Pmode, XEXP (addr, 1), operands[0]);
    }

  operands[3] = change_address (operands[1], QImode, addr);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand2));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_SIGN_EXTEND (SImode,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:559 */
extern rtx_insn *gen_peephole2_36 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_36 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_36 (thumb1.md:559)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 575 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"
{
  rtx addr = gen_rtx_PLUS (Pmode, operands[0], operands[2]);
  operands[4] = change_address (operands[4], QImode, addr);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand2,
	operand1));
  emit_insn (gen_rtx_SET (operand3,
	gen_rtx_SIGN_EXTEND (SImode,
	operand4)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:713 */
extern rtx_insn *gen_split_119 (rtx_insn *, rtx *);
rtx_insn *
gen_split_119 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_119 (thumb1.md:713)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 719 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"

  operands[2] = gen_highpart (SImode, operands[0]);
  operands[3] = gen_highpart_mode (SImode, GET_MODE (operands[0]),
                                  operands[1]);
  operands[0] = gen_lowpart (SImode, operands[0]);
  operands[1] = gen_lowpart (SImode, operands[1]);
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:713 */
extern rtx_insn *gen_split_120 (rtx_insn *, rtx *);
rtx_insn *
gen_split_120 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_120 (thumb1.md:713)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 719 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"

  operands[2] = gen_highpart (SImode, operands[0]);
  operands[3] = gen_highpart_mode (SImode, GET_MODE (operands[0]),
                                  operands[1]);
  operands[0] = gen_lowpart (SImode, operands[0]);
  operands[1] = gen_lowpart (SImode, operands[1]);
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:713 */
extern rtx_insn *gen_split_121 (rtx_insn *, rtx *);
rtx_insn *
gen_split_121 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_121 (thumb1.md:713)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 719 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"

  operands[2] = gen_highpart (SImode, operands[0]);
  operands[3] = gen_highpart_mode (SImode, GET_MODE (operands[0]),
                                  operands[1]);
  operands[0] = gen_lowpart (SImode, operands[0]);
  operands[1] = gen_lowpart (SImode, operands[1]);
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:713 */
extern rtx_insn *gen_split_122 (rtx_insn *, rtx *);
rtx_insn *
gen_split_122 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_122 (thumb1.md:713)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 719 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"

  operands[2] = gen_highpart (SImode, operands[0]);
  operands[3] = gen_highpart_mode (SImode, GET_MODE (operands[0]),
                                  operands[1]);
  operands[0] = gen_lowpart (SImode, operands[0]);
  operands[1] = gen_lowpart (SImode, operands[1]);
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:713 */
extern rtx_insn *gen_split_123 (rtx_insn *, rtx *);
rtx_insn *
gen_split_123 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_123 (thumb1.md:713)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 719 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"

  operands[2] = gen_highpart (SImode, operands[0]);
  operands[3] = gen_highpart_mode (SImode, GET_MODE (operands[0]),
                                  operands[1]);
  operands[0] = gen_lowpart (SImode, operands[0]);
  operands[1] = gen_lowpart (SImode, operands[1]);
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:713 */
extern rtx_insn *gen_split_124 (rtx_insn *, rtx *);
rtx_insn *
gen_split_124 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_124 (thumb1.md:713)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 719 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"

  operands[2] = gen_highpart (SImode, operands[0]);
  operands[3] = gen_highpart_mode (SImode, GET_MODE (operands[0]),
                                  operands[1]);
  operands[0] = gen_lowpart (SImode, operands[0]);
  operands[1] = gen_lowpart (SImode, operands[1]);
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:713 */
extern rtx_insn *gen_split_125 (rtx_insn *, rtx *);
rtx_insn *
gen_split_125 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_125 (thumb1.md:713)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 719 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"

  operands[2] = gen_highpart (SImode, operands[0]);
  operands[3] = gen_highpart_mode (SImode, GET_MODE (operands[0]),
                                  operands[1]);
  operands[0] = gen_lowpart (SImode, operands[0]);
  operands[1] = gen_lowpart (SImode, operands[1]);
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:728 */
extern rtx_insn *gen_split_126 (rtx_insn *, rtx *);
rtx_insn *
gen_split_126 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_126 (thumb1.md:728)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 734 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"

  {
    operands[1] = GEN_INT (- INTVAL (operands[1]));
    operands[2] = can_create_pseudo_p () ? gen_reg_rtx (SImode) : operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand2,
	operand1));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (SImode,
	copy_rtx (operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:741 */
extern rtx_insn *gen_split_127 (rtx_insn *, rtx *);
rtx_insn *
gen_split_127 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_127 (thumb1.md:741)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 748 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"

  {
    unsigned HOST_WIDE_INT val = INTVAL (operands[1]) & 0xffffffffu;
    unsigned HOST_WIDE_INT mask = 0xff;
    int i;

    for (i = 0; i < 25; i++)
      if ((val & (mask << i)) == val)
        break;

    /* Don't split if the shift is zero.  */
    if (i == 0)
      FAIL;

    operands[1] = GEN_INT (val >> i);
    operands[2] = can_create_pseudo_p () ? gen_reg_rtx (SImode) : operands[0];
    operands[3] = GEN_INT (i);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand2,
	operand1));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (SImode,
	copy_rtx (operand2),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:769 */
extern rtx_insn *gen_split_128 (rtx_insn *, rtx *);
rtx_insn *
gen_split_128 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_128 (thumb1.md:769)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 776 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"

  {
    operands[1] = GEN_INT (INTVAL (operands[1]) - 255);
    operands[2] = can_create_pseudo_p () ? gen_reg_rtx (SImode) : operands[0];
    operands[3] = GEN_INT (255);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand2,
	operand1));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand2),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:784 */
extern rtx_insn *gen_split_129 (rtx_insn *, rtx *);
rtx_insn *
gen_split_129 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_129 (thumb1.md:784)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 793 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"

    thumb1_gen_const_int_rtl (operands[0], INTVAL (operands[1]));
    DONE;
  
#undef DONE
#undef FAIL
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	const0_rtx));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:839 */
rtx
gen_thumb_movhi_clobber (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 844 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"

  if (strict_memory_address_p (HImode, XEXP (operands[0], 0))
      && REGNO (operands[1]) <= LAST_LO_REGNUM)
    {
      emit_insn (gen_movhi (operands[0], operands[1]));
      DONE;
    }
  /* XXX Fixme, need to handle other cases here as well.  */
  gcc_unreachable ();
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:1040 */
rtx
gen_cbranchqi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1048 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"
{
  rtx xops[4];
  xops[1] = gen_reg_rtx (SImode);
  emit_insn (gen_zero_extendqisi2 (xops[1], operands[1]));
  xops[2] = GEN_INT (127);
  xops[0] = gen_rtx_fmt_ee (GET_CODE (operands[0]) == GE ? LEU : GTU,
			    VOIDmode, xops[1], xops[2]);
  xops[3] = operands[3];
  emit_insn (gen_cbranchsi4 (xops[0], xops[1], xops[2], xops[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_jump_insn (gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand0), VOIDmode,
		operand1,
		operand2),
	gen_rtx_LABEL_REF (VOIDmode,
	operand3),
	pc_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:1211 */
rtx
gen_cbranchsi4_neg_late (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand4), VOIDmode,
		operand1,
		operand2),
	gen_rtx_LABEL_REF (VOIDmode,
	operand3),
	pc_rtx)),
		gen_rtx_CLOBBER (VOIDmode,
	operand0)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:1695 */
rtx
gen_cstoresi_eq0_thumb1 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1702 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"
operands[2] = gen_reg_rtx (SImode);
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_EQ (SImode,
	operand1,
	const0_rtx)),
		gen_rtx_CLOBBER (VOIDmode,
	operand2))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:1705 */
rtx
gen_cstoresi_ne0_thumb1 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1712 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"
operands[2] = gen_reg_rtx (SImode);
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_NE (SImode,
	operand1,
	const0_rtx)),
		gen_rtx_CLOBBER (VOIDmode,
	operand2))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:1749 */
extern rtx_insn *gen_split_130 (rtx_insn *, rtx *);
rtx_insn *
gen_split_130 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_130 (thumb1.md:1749)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1759 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"
operands[3] = gen_reg_rtx (SImode);
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	gen_rtx_NEG (SImode,
	gen_rtx_LTU (SImode,
	operand1,
	operand2))));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (SImode,
	copy_rtx (operand3))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:1918 */
rtx
gen_thumb1_casesi_internal_pic (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1924 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"
{
    rtx reg0;
    rtx test = gen_rtx_GTU (VOIDmode, operands[0], operands[1]);
    emit_jump_insn (gen_cbranchsi4 (test, operands[0], operands[1],
				    operands[3]));
    reg0 = gen_rtx_REG (SImode, 0);
    emit_move_insn (reg0, operands[0]);
    emit_jump_insn (gen_thumb1_casesi_dispatch (operands[2]/*, operands[3]*/));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:1991 */
rtx
gen_tablejump (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1995 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"

  if (flag_pic)
    {
      /* Hopefully, CSE will eliminate this copy.  */
      rtx reg1 = copy_addr_to_reg (gen_rtx_LABEL_REF (Pmode, operands[1]));
      rtx reg2 = gen_reg_rtx (SImode);

      emit_insn (gen_addsi3 (reg2, operands[0], reg1));
      operands[0] = reg2;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_jump_insn (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (pc_rtx,
	operand0),
		gen_rtx_USE (VOIDmode,
	gen_rtx_LABEL_REF (VOIDmode,
	operand1)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md:2028 */
extern rtx_insn *gen_split_131 (rtx_insn *, rtx *);
rtx_insn *
gen_split_131 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_131 (thumb1.md:2028)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2036 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb1.md"

  {
    thumb_set_return_address (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:29 */
extern rtx_insn *gen_split_132 (rtx_insn *, rtx *);
rtx_insn *
gen_split_132 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_132 (thumb2.md:29)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 43 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand2)));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_LT (SImode,
	gen_rtx_REG (CCmode,
	100),
	const0_rtx),
	gen_rtx_SET (operand0,
	copy_rtx (operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:50 */
extern rtx_insn *gen_split_133 (rtx_insn *, rtx *);
rtx_insn *
gen_split_133 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_133 (thumb2.md:50)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 64 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand2)));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_GE (SImode,
	gen_rtx_REG (CCmode,
	100),
	const0_rtx),
	gen_rtx_SET (operand0,
	copy_rtx (operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:71 */
extern rtx_insn *gen_split_134 (rtx_insn *, rtx *);
rtx_insn *
gen_split_134 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_134 (thumb2.md:71)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 85 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand2)));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_LTU (SImode,
	gen_rtx_REG (CCmode,
	100),
	const0_rtx),
	gen_rtx_SET (operand0,
	copy_rtx (operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:92 */
extern rtx_insn *gen_split_135 (rtx_insn *, rtx *);
rtx_insn *
gen_split_135 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_135 (thumb2.md:92)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 106 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (gen_rtx_REG (CCmode,
	100),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand2)));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_GEU (SImode,
	gen_rtx_REG (CCmode,
	100),
	const0_rtx),
	gen_rtx_SET (operand0,
	copy_rtx (operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:113 */
extern rtx_insn *gen_split_136 (rtx_insn *, rtx *);
rtx_insn *
gen_split_136 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_136 (thumb2.md:113)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 124 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"
{
    if (REGNO(operands[0]) == REGNO(operands[1]))
      {
       rtx cc_reg = gen_rtx_REG (CCmode, CC_REGNUM);

       emit_insn (gen_rtx_SET (cc_reg, gen_rtx_COMPARE (CCmode, operands[0],
       							const0_rtx)));
       emit_insn (gen_rtx_COND_EXEC (VOIDmode,
                                    (gen_rtx_LT (SImode,
                                                 cc_reg,
                                                 const0_rtx)),
                                    (gen_rtx_SET (operands[0],
                                                  (gen_rtx_MINUS (SImode,
                                                                  const0_rtx,
                                                                  operands[1]))))));
      }
    else
      {
        emit_insn (gen_rtx_SET (operands[0],
                                gen_rtx_XOR (SImode,
                                             gen_rtx_ASHIFTRT (SImode,
                                                               operands[1],
                                                               GEN_INT (31)),
                                             operands[1])));
        emit_insn (gen_rtx_SET (operands[0],
                                gen_rtx_MINUS (SImode,
                                               operands[0],
                                               gen_rtx_ASHIFTRT (SImode,
                                                                 operands[1],
                                                                 GEN_INT (31)))));
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:166 */
extern rtx_insn *gen_split_137 (rtx_insn *, rtx *);
rtx_insn *
gen_split_137 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_137 (thumb2.md:166)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 177 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"
{
    if (REGNO(operands[0]) == REGNO(operands[1]))
      {
       rtx cc_reg = gen_rtx_REG (CCmode, CC_REGNUM);

       emit_insn (gen_rtx_SET (cc_reg, gen_rtx_COMPARE (CCmode, operands[0],
							const0_rtx)));
       emit_insn (gen_rtx_COND_EXEC (VOIDmode,
                                    (gen_rtx_GT (SImode,
                                                 cc_reg,
                                                 const0_rtx)),
                                    (gen_rtx_SET (operands[0],
                                                  (gen_rtx_MINUS (SImode,
                                                                  const0_rtx,
                                                                  operands[1]))))));
      }
    else
      {
        emit_insn (gen_rtx_SET (operands[0],
                                gen_rtx_XOR (SImode,
                                             gen_rtx_ASHIFTRT (SImode,
                                                               operands[1],
                                                               GEN_INT (31)),
                                             operands[1])));
        emit_insn (gen_rtx_SET (operands[0],
                                gen_rtx_MINUS (SImode,
                                               gen_rtx_ASHIFTRT (SImode,
                                                                 operands[1],
                                                                 GEN_INT (31)),
                                               operands[0])));
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:322 */
extern rtx_insn *gen_split_138 (rtx_insn *, rtx *);
rtx_insn *
gen_split_138 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_138 (thumb2.md:322)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 333 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	operand1,
	const1_rtx,
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:340 */
extern rtx_insn *gen_split_139 (rtx_insn *, rtx *);
rtx_insn *
gen_split_139 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_139 (thumb2.md:340)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 353 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"
{
    operands[3] = GEN_INT (~0);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	operand1,
	operand3,
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:361 */
extern rtx_insn *gen_split_140 (rtx_insn *, rtx *);
rtx_insn *
gen_split_140 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_140 (thumb2.md:361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 375 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"
{
    operands[3] = GEN_INT (~0);
    machine_mode mode = GET_MODE (operands[2]);
    enum rtx_code rc = GET_CODE (operands[1]);

    if (mode == CCFPmode || mode == CCFPEmode)
      rc = reverse_condition_maybe_unordered (rc);
    else
      rc = reverse_condition (rc);
    operands[4] = gen_rtx_fmt_ee (rc, VOIDmode, operands[2], const0_rtx);

  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	operand3));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	operand4,
	gen_rtx_SET (copy_rtx (operand0),
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:392 */
extern rtx_insn *gen_split_141 (rtx_insn *, rtx *);
rtx_insn *
gen_split_141 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_141 (thumb2.md:392)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 403 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"
{
    operands[3] = GEN_INT (~1);
    operands[4] = GEN_INT (~0);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	operand1,
	operand3,
	operand4)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:412 */
extern rtx_insn *gen_split_142 (rtx_insn *, rtx *);
rtx_insn *
gen_split_142 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_142 (thumb2.md:412)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 425 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"
{
    operands[3] = GEN_INT (~0);
    operands[4] = gen_rtx_fmt_ee (GET_CODE (operands[1]),
                                  VOIDmode, operands[2], const0_rtx);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	operand3));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	operand4,
	gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_ASHIFT (SImode,
	copy_rtx (operand0),
	const1_rtx))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:435 */
extern rtx_insn *gen_split_143 (rtx_insn *, rtx *);
rtx_insn *
gen_split_143 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_143 (thumb2.md:435)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 464 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"
{
    enum rtx_code rev_code;
    machine_mode mode;
    rtx rev_cond;

    emit_insn (gen_rtx_COND_EXEC (VOIDmode,
                                  operands[3],
                                  gen_rtx_SET (operands[0], operands[1])));
    rev_code = GET_CODE (operands[3]);
    mode = GET_MODE (operands[4]);
    if (mode == CCFPmode || mode == CCFPEmode)
      rev_code = reverse_condition_maybe_unordered (rev_code);
    else
      rev_code = reverse_condition (rev_code);

    rev_cond = gen_rtx_fmt_ee (rev_code,
                               VOIDmode,
                               gen_rtx_REG (mode, CC_REGNUM),
                               const0_rtx);
    emit_insn (gen_rtx_COND_EXEC (VOIDmode,
                                  rev_cond,
                                  gen_rtx_SET (operands[0], operands[2])));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:613 */
extern rtx_insn *gen_split_144 (rtx_insn *, rtx *);
rtx_insn *
gen_split_144 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_144 (thumb2.md:613)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 624 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"
{
    machine_mode mode = GET_MODE (operands[2]);
    enum rtx_code rc = GET_CODE (operands[1]);

    if (mode == CCFPmode || mode == CCFPEmode)
      rc = reverse_condition_maybe_unordered (rc);
    else
      rc = reverse_condition (rc);
    operands[4] = gen_rtx_fmt_ee (rc, VOIDmode, operands[2], const0_rtx);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (SImode,
	operand3,
	const1_rtx)));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	operand4,
	gen_rtx_SET (copy_rtx (operand0),
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:641 */
extern rtx_insn *gen_split_145 (rtx_insn *, rtx *);
rtx_insn *
gen_split_145 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_145 (thumb2.md:641)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 656 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"
{
    machine_mode mode = GET_MODE (operands[2]);
    enum rtx_code rc = GET_CODE (operands[1]);

    operands[4] = gen_rtx_fmt_ee (rc, VOIDmode, operands[2], const0_rtx);
    if (mode == CCFPmode || mode == CCFPEmode)
      rc = reverse_condition_maybe_unordered (rc);
    else
      rc = reverse_condition (rc);
    operands[5] = gen_rtx_fmt_ee (rc, VOIDmode, operands[2], const0_rtx);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	operand5,
	gen_rtx_SET (operand0,
	operand3)));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	operand4,
	gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_IOR (SImode,
	copy_rtx (operand3),
	const1_rtx))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:672 */
extern rtx_insn *gen_split_146 (rtx_insn *, rtx *);
rtx_insn *
gen_split_146 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_146 (thumb2.md:672)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 683 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"
{
    machine_mode mode = GET_MODE (operands[3]);
    rtx_code rc = GET_CODE (operands[2]);

    if (mode == CCFPmode || mode == CCFPEmode)
      rc = reverse_condition_maybe_unordered (rc);
    else
      rc = reverse_condition (rc);
    operands[4] = gen_rtx_fmt_ee (rc, VOIDmode, operands[3], const0_rtx);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (SImode,
	operand1,
	const1_rtx)));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	operand4,
	gen_rtx_SET (copy_rtx (operand0),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:790 */
extern rtx_insn *gen_split_147 (rtx_insn *, rtx *);
rtx_insn *
gen_split_147 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_147 (thumb2.md:790)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 802 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"
{
    if (GET_CODE (operands[4]) == LT && operands[3] == const0_rtx)
      {
        /*  %i5 %0, %1, %2, lsr #31  */
        rtx shifted_op = gen_rtx_LSHIFTRT (SImode, operands[2], GEN_INT (31));
        rtx op = NULL_RTX;

        switch (GET_CODE (operands[5]))
          {
          case AND:
            op = gen_rtx_AND (SImode, shifted_op, operands[1]);
            break;
           case PLUS:
            op = gen_rtx_PLUS (SImode, shifted_op, operands[1]);
            break;
          default: gcc_unreachable ();
          }
        emit_insn (gen_rtx_SET (operands[0], op));
        DONE;
      }

    /*  "cmp  %2, %3"  */
    emit_insn (gen_rtx_SET (gen_rtx_REG (CCmode, CC_REGNUM),
                            gen_rtx_COMPARE (CCmode, operands[2],
					     operands[3])));

    if (GET_CODE (operands[5]) == AND)
      {
        /*  %i5  %0, %1, #1
            it%D4
            mov%D4  %0, #0  */
        enum rtx_code rc = reverse_condition (GET_CODE (operands[4]));
        emit_insn (gen_rtx_SET (operands[0], gen_rtx_AND (SImode, operands[1],
							  GEN_INT (1))));
        emit_insn (gen_rtx_COND_EXEC (VOIDmode,
                                      gen_rtx_fmt_ee (rc, VOIDmode, gen_rtx_REG (CCmode, CC_REGNUM), const0_rtx),
                                      gen_rtx_SET (operands[0], const0_rtx)));
        DONE;
      }
    else
      {
        /*  it\t%d4
            %i5%d4\t%0, %1, #1   */
        emit_insn (gen_rtx_COND_EXEC (VOIDmode, gen_rtx_fmt_ee (GET_CODE (operands[4]),
                                                                VOIDmode,
                                                                gen_rtx_REG (CCmode, CC_REGNUM), const0_rtx),
                                                gen_rtx_SET (operands[0],
                                                            gen_rtx_PLUS (SImode,
                                                                          operands[1],
                                                                          GEN_INT (1)))));
        DONE;
      }
     FAIL;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:893 */
extern rtx_insn *gen_split_148 (rtx_insn *, rtx *);
rtx_insn *
gen_split_148 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_148 (thumb2.md:893)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 903 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"
{
    rtx cc_reg = gen_rtx_REG (CCmode, CC_REGNUM);

    if (GET_CODE (operands[3]) == LT && operands[2] == const0_rtx)
      {
        /* Emit asr\t%0, %1, #31 */
        emit_insn (gen_rtx_SET (operands[0],
                                gen_rtx_ASHIFTRT (SImode,
                                                  operands[1],
                                                  GEN_INT (31))));
        DONE;
      }
    else if (GET_CODE (operands[3]) == NE && !arm_restrict_it)
      {
        /* Emit subs\t%0, %1, %2\n\tit\tne\n\tmvnne\t%0, #0 */
        if (CONST_INT_P (operands[2]))
          emit_insn (gen_cmpsi2_addneg (operands[0], operands[1], operands[2],
                                        gen_int_mode (-INTVAL (operands[2]),
						      SImode)));
        else
          emit_insn (gen_subsi3_compare (operands[0], operands[1], operands[2]));

        emit_insn (gen_rtx_COND_EXEC (VOIDmode,
                                      gen_rtx_NE (SImode,
                                                  cc_reg,
                                                  const0_rtx),
                                      gen_rtx_SET (operands[0],
                                                   GEN_INT (~0))));
        DONE;
      }
    else
      {
       /* Emit:  cmp\t%1, %2\n\tmvn\t%0, #0\n\tit\t%D3\n\tmov%D3\t%0, #0\n\t*/
       enum rtx_code rc = reverse_condition (GET_CODE (operands[3]));
       machine_mode mode = SELECT_CC_MODE (rc, operands[1], operands[2]);
       rtx tmp1 = gen_rtx_REG (mode, CC_REGNUM);

       emit_insn (gen_rtx_SET (cc_reg, gen_rtx_COMPARE (CCmode, operands[1],
							operands[2])));

       emit_insn (gen_rtx_SET (operands[0], GEN_INT (~0)));

       emit_insn (gen_rtx_COND_EXEC (VOIDmode,
                                     gen_rtx_fmt_ee (rc,
                                                     VOIDmode,
                                                     tmp1,
                                                     const0_rtx),
                                     gen_rtx_SET (operands[0], const0_rtx)));
       DONE;
      }
    FAIL;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:1130 */
rtx
gen_thumb2_casesi_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1141 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"
{
  operands[4] = gen_rtx_MULT (SImode, operands[0], GEN_INT (4));
  operands[4] = gen_rtx_PLUS (SImode, operands[4],
			      gen_rtx_LABEL_REF (SImode, operands[2]));
  operands[4] = gen_rtx_MEM (SImode, operands[4]);
  MEM_READONLY_P (operands[4]) = 1;
  MEM_NOTRAP_P (operands[4]) = 1;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_jump_insn (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_LEU (VOIDmode,
	operand0,
	operand1),
	operand4,
	gen_rtx_LABEL_REF (SImode,
	operand3))),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_USE (VOIDmode,
	gen_rtx_LABEL_REF (SImode,
	operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:1168 */
rtx
gen_thumb2_casesi_internal_pic (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[7];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1180 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"
{
  operands[4] = gen_rtx_MULT (SImode, operands[0], GEN_INT (4));
  operands[4] = gen_rtx_PLUS (SImode, operands[4],
			      gen_rtx_LABEL_REF (SImode, operands[2]));
  operands[4] = gen_rtx_MEM (SImode, operands[4]);
  MEM_READONLY_P (operands[4]) = 1;
  MEM_NOTRAP_P (operands[4]) = 1;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_jump_insn (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_LEU (VOIDmode,
	operand0,
	operand1),
	operand4,
	gen_rtx_LABEL_REF (SImode,
	operand3))),
		gen_hard_reg_clobber (CCmode, 100),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_USE (VOIDmode,
	gen_rtx_LABEL_REF (SImode,
	operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:1235 */
extern rtx_insn *gen_split_149 (rtx_insn *, rtx *);
rtx_insn *
gen_split_149 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_149 (thumb2.md:1235)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1243 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"

  {
    thumb_set_return_address (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:1337 */
extern rtx_insn *gen_peephole2_37 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_37 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_37 (thumb2.md:1337)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1347 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"
operands[3] = GEN_INT (- INTVAL (operands[2]));
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	operand3)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:1350 */
extern rtx_insn *gen_peephole2_38 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_38 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[3] = peep2_find_free_register (0, 0, "l", SImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_38 (thumb2.md:1350)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1360 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"
operands[4] = GEN_INT (- INTVAL (operands[2]));
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand2)),
		gen_rtx_SET (operand3,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	operand4)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:1553 */
extern rtx_insn *gen_peephole2_39 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_39 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[3] = peep2_find_free_register (1, 1, "l", SImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_39 (thumb2.md:1553)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1576 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"

  operands[2] = GEN_INT (31 - INTVAL (operands[2]));
  operands[4] = gen_rtx_fmt_ee (GET_CODE (operands[4]) == NE ? LT : GE,
				VOIDmode, operands[0], const0_rtx);
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_ASHIFT (SImode,
	operand1,
	operand2),
	const0_rtx)),
		gen_rtx_CLOBBER (VOIDmode,
	operand3))), true);
  emit_jump_insn (gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand4), GET_MODE (operand4),
		copy_rtx (operand0),
		const0_rtx),
	operand5,
	operand6)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:1582 */
extern rtx_insn *gen_peephole2_40 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_40 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[3] = peep2_find_free_register (1, 1, "l", SImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_40 (thumb2.md:1582)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1605 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"

  operands[2] = GEN_INT (32 - INTVAL (operands[2]));
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_ASHIFT (SImode,
	operand1,
	operand2),
	const0_rtx)),
		gen_rtx_CLOBBER (VOIDmode,
	operand3))), true);
  emit_jump_insn (gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand4), GET_MODE (operand4),
		copy_rtx (operand0),
		const0_rtx),
	operand5,
	operand6)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:1611 */
rtx
gen_doloop_end (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1615 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"

 {
   /* Currently SMS relies on the do-loop pattern to recognize loops
      where (1) the control part consists of all insns defining and/or
      using a certain 'count' register and (2) the loop count can be
      adjusted by modifying this register prior to the loop.
      ??? The possible introduction of a new block to initialize the
      new IV can potentially affect branch optimizations.

      Also used to implement the low over head loops feature, which is part of
      the Armv8.1-M Mainline Low Overhead Branch (LOB) extension.  */
   if (optimize > 0 && (flag_modulo_sched || TARGET_HAVE_LOB))
   {
     rtx s0;
     rtx bcomp;
     rtx loc_ref;
     rtx cc_reg;
     rtx insn;
     rtx cmp;

     if (GET_MODE (operands[0]) != SImode)
       FAIL;

     s0 = operands [0];

     /* Low over head loop instructions require the first operand to be LR.  */
     if (TARGET_HAVE_LOB && arm_target_insn_ok_for_lob (operands [1]))
       s0 = gen_rtx_REG (SImode, LR_REGNUM);

     if (TARGET_THUMB2)
       insn = emit_insn (gen_thumb2_addsi3_compare0 (s0, s0, GEN_INT (-1)));
     else
       insn = emit_insn (gen_addsi3_compare0 (s0, s0, GEN_INT (-1)));

     cmp = XVECEXP (PATTERN (insn), 0, 0);
     cc_reg = SET_DEST (cmp);
     bcomp = gen_rtx_NE (VOIDmode, cc_reg, const0_rtx);
     loc_ref = gen_rtx_LABEL_REF (VOIDmode, operands [1]);
     emit_jump_insn (gen_rtx_SET (pc_rtx,
                                  gen_rtx_IF_THEN_ELSE (VOIDmode, bcomp,
                                                        loc_ref, pc_rtx)));
     DONE;
   }
 else
   FAIL;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_USE (VOIDmode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:1751 */
rtx
gen_doloop_begin (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1755 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"
{
    if (REGNO (operands[0]) == LR_REGNUM)
      {
	emit_insn (gen_dls_insn (operands[0]));
	DONE;
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:135 */
rtx
gen_movti (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 139 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  gcc_checking_assert (aligned_operand (operands[0], TImode));
  gcc_checking_assert (aligned_operand (operands[1], TImode));
  if (can_create_pseudo_p ())
    {
      if (!REG_P (operands[0]))
	operands[1] = force_reg (TImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:149 */
rtx
gen_movei (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 153 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  gcc_checking_assert (aligned_operand (operands[0], EImode));
  gcc_checking_assert (aligned_operand (operands[1], EImode));
  if (can_create_pseudo_p ())
    {
      if (!REG_P (operands[0]))
	operands[1] = force_reg (EImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:149 */
rtx
gen_movoi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 153 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  gcc_checking_assert (aligned_operand (operands[0], OImode));
  gcc_checking_assert (aligned_operand (operands[1], OImode));
  if (can_create_pseudo_p ())
    {
      if (!REG_P (operands[0]))
	operands[1] = force_reg (OImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:149 */
rtx
gen_movci (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 153 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  gcc_checking_assert (aligned_operand (operands[0], CImode));
  gcc_checking_assert (aligned_operand (operands[1], CImode));
  if (can_create_pseudo_p ())
    {
      if (!REG_P (operands[0]))
	operands[1] = force_reg (CImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:149 */
rtx
gen_movxi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 153 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  gcc_checking_assert (aligned_operand (operands[0], XImode));
  gcc_checking_assert (aligned_operand (operands[1], XImode));
  if (can_create_pseudo_p ())
    {
      if (!REG_P (operands[0]))
	operands[1] = force_reg (XImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:167 */
rtx
gen_movv4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 171 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  gcc_checking_assert (aligned_operand (operands[0], V4HFmode));
  gcc_checking_assert (aligned_operand (operands[1], V4HFmode));
  if (can_create_pseudo_p ())
    {
      if (!REG_P (operands[0]))
	operands[1] = force_reg (V4HFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:167 */
rtx
gen_movv4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 171 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  gcc_checking_assert (aligned_operand (operands[0], V4BFmode));
  gcc_checking_assert (aligned_operand (operands[1], V4BFmode));
  if (can_create_pseudo_p ())
    {
      if (!REG_P (operands[0]))
	operands[1] = force_reg (V4BFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:167 */
rtx
gen_movv8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 171 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  gcc_checking_assert (aligned_operand (operands[0], V8BFmode));
  gcc_checking_assert (aligned_operand (operands[1], V8BFmode));
  if (can_create_pseudo_p ())
    {
      if (!REG_P (operands[0]))
	operands[1] = force_reg (V8BFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:198 */
extern rtx_insn *gen_split_150 (rtx_insn *, rtx *);
rtx_insn *
gen_split_150 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_150 (neon.md:198)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 204 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  int rdest = REGNO (operands[0]);
  int rsrc = REGNO (operands[1]);
  rtx dest[2], src[2];

  dest[0] = gen_rtx_REG (TImode, rdest);
  src[0] = gen_rtx_REG (TImode, rsrc);
  dest[1] = gen_rtx_REG (DImode, rdest + 4);
  src[1] = gen_rtx_REG (DImode, rsrc + 4);

  neon_disambiguate_copy (operands, dest, src, 2);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:217 */
extern rtx_insn *gen_split_151 (rtx_insn *, rtx *);
rtx_insn *
gen_split_151 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_151 (neon.md:217)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 223 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  int rdest = REGNO (operands[0]);
  int rsrc = REGNO (operands[1]);
  rtx dest[2], src[2];

  dest[0] = gen_rtx_REG (TImode, rdest);
  src[0] = gen_rtx_REG (TImode, rsrc);
  dest[1] = gen_rtx_REG (TImode, rdest + 4);
  src[1] = gen_rtx_REG (TImode, rsrc + 4);

  neon_disambiguate_copy (operands, dest, src, 2);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:236 */
extern rtx_insn *gen_split_152 (rtx_insn *, rtx *);
rtx_insn *
gen_split_152 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_152 (neon.md:236)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 243 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  int rdest = REGNO (operands[0]);
  int rsrc = REGNO (operands[1]);
  rtx dest[3], src[3];

  dest[0] = gen_rtx_REG (TImode, rdest);
  src[0] = gen_rtx_REG (TImode, rsrc);
  dest[1] = gen_rtx_REG (TImode, rdest + 4);
  src[1] = gen_rtx_REG (TImode, rsrc + 4);
  dest[2] = gen_rtx_REG (TImode, rdest + 8);
  src[2] = gen_rtx_REG (TImode, rsrc + 8);

  neon_disambiguate_copy (operands, dest, src, 3);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  emit_insn (gen_rtx_SET (operand4,
	operand5));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:258 */
extern rtx_insn *gen_split_153 (rtx_insn *, rtx *);
rtx_insn *
gen_split_153 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_153 (neon.md:258)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 266 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  int rdest = REGNO (operands[0]);
  int rsrc = REGNO (operands[1]);
  rtx dest[4], src[4];

  dest[0] = gen_rtx_REG (TImode, rdest);
  src[0] = gen_rtx_REG (TImode, rsrc);
  dest[1] = gen_rtx_REG (TImode, rdest + 4);
  src[1] = gen_rtx_REG (TImode, rsrc + 4);
  dest[2] = gen_rtx_REG (TImode, rdest + 8);
  src[2] = gen_rtx_REG (TImode, rsrc + 8);
  dest[3] = gen_rtx_REG (TImode, rdest + 12);
  src[3] = gen_rtx_REG (TImode, rsrc + 12);

  neon_disambiguate_copy (operands, dest, src, 4);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_SET (operand2,
	operand3));
  emit_insn (gen_rtx_SET (operand4,
	operand5));
  emit_insn (gen_rtx_SET (operand6,
	operand7));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:507 */
rtx
gen_divv2sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 513 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    rtx rec = gen_reg_rtx (V2SFmode);
    rtx vrecps_temp = gen_reg_rtx (V2SFmode);

    /* Reciprocal estimate.  */
    emit_insn (gen_neon_vrecpev2sf (rec, operands[2]));

    /* Perform 2 iterations of newton-raphson method.  */
    for (int i = 0; i < 2; i++)
      {
	emit_insn (gen_neon_vrecpsv2sf (vrecps_temp, rec, operands[2]));
	emit_insn (gen_mulv2sf3 (rec, rec, vrecps_temp));
      }

    /* We now have reciprocal in rec, perform operands[0] = operands[1] * rec.  */
    emit_insn (gen_mulv2sf3 (operands[0], operands[1], rec));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_DIV (V2SFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:507 */
rtx
gen_divv4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 513 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    rtx rec = gen_reg_rtx (V4SFmode);
    rtx vrecps_temp = gen_reg_rtx (V4SFmode);

    /* Reciprocal estimate.  */
    emit_insn (gen_neon_vrecpev4sf (rec, operands[2]));

    /* Perform 2 iterations of newton-raphson method.  */
    for (int i = 0; i < 2; i++)
      {
	emit_insn (gen_neon_vrecpsv4sf (vrecps_temp, rec, operands[2]));
	emit_insn (gen_mulv4sf3 (rec, rec, vrecps_temp));
      }

    /* We now have reciprocal in rec, perform operands[0] = operands[1] * rec.  */
    emit_insn (gen_mulv4sf3 (operands[0], operands[1], rec));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_DIV (V4SFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:638 */
rtx
gen_ceilv2sf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	348));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:638 */
rtx
gen_btruncv2sf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	347));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:638 */
rtx
gen_floorv2sf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	349));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:638 */
rtx
gen_rintv2sf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	350));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:638 */
rtx
gen_roundv2sf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	351));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:638 */
rtx
gen_roundevenv2sf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	352));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:638 */
rtx
gen_ceilv4sf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	348));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:638 */
rtx
gen_btruncv4sf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	347));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:638 */
rtx
gen_floorv4sf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	349));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:638 */
rtx
gen_rintv4sf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	350));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:638 */
rtx
gen_roundv4sf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	351));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:638 */
rtx
gen_roundevenv4sf2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	352));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:655 */
rtx
gen_lceilv2sfv2si2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	348)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:655 */
rtx
gen_lfloorv2sfv2si2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	349)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:655 */
rtx
gen_lroundv2sfv2si2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	351)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:655 */
rtx
gen_lceiluv2sfv2si2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	348)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:655 */
rtx
gen_lflooruv2sfv2si2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	349)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:655 */
rtx
gen_lrounduv2sfv2si2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	351)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:655 */
rtx
gen_lceilv4sfv4si2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	348)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:655 */
rtx
gen_lfloorv4sfv4si2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	349)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:655 */
rtx
gen_lroundv4sfv4si2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	351)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:655 */
rtx
gen_lceiluv4sfv4si2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	348)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:655 */
rtx
gen_lflooruv4sfv4si2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	349)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:655 */
rtx
gen_lrounduv4sfv4si2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	351)));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:778 */
rtx
gen_neon_vabsv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 783 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_absv8hf2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ABS (V8HFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:778 */
rtx
gen_neon_vnegv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 783 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_negv8hf2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:778 */
rtx
gen_neon_vabsv4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 783 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_absv4hf2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ABS (V4HFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:778 */
rtx
gen_neon_vnegv4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 783 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_negv4hf2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:928 */
rtx
gen_widen_ssumv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 935 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    machine_mode mode = GET_MODE (operands[1]);
    rtx p1, p2;

    p1  = arm_simd_vect_par_cnst_half (mode, false);
    p2  = arm_simd_vect_par_cnst_half (mode, true);

    if (operands[0] != operands[2])
      emit_move_insn (operands[0], operands[2]);

    emit_insn (gen_vec_sel_widen_ssum_lov16qiv8qi3 (operands[0],
							 operands[1],
							 p1,
							 operands[0]));
    emit_insn (gen_vec_sel_widen_ssum_hiv16qiv8qi3 (operands[0],
							 operands[1],
							 p2,
							 operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand1),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:928 */
rtx
gen_widen_ssumv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 935 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    machine_mode mode = GET_MODE (operands[1]);
    rtx p1, p2;

    p1  = arm_simd_vect_par_cnst_half (mode, false);
    p2  = arm_simd_vect_par_cnst_half (mode, true);

    if (operands[0] != operands[2])
      emit_move_insn (operands[0], operands[2]);

    emit_insn (gen_vec_sel_widen_ssum_lov8hiv4hi3 (operands[0],
							 operands[1],
							 p1,
							 operands[0]));
    emit_insn (gen_vec_sel_widen_ssum_hiv8hiv4hi3 (operands[0],
							 operands[1],
							 p2,
							 operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:928 */
rtx
gen_widen_ssumv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 935 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    machine_mode mode = GET_MODE (operands[1]);
    rtx p1, p2;

    p1  = arm_simd_vect_par_cnst_half (mode, false);
    p2  = arm_simd_vect_par_cnst_half (mode, true);

    if (operands[0] != operands[2])
      emit_move_insn (operands[0], operands[2]);

    emit_insn (gen_vec_sel_widen_ssum_lov4siv2si3 (operands[0],
							 operands[1],
							 p1,
							 operands[0]));
    emit_insn (gen_vec_sel_widen_ssum_hiv4siv2si3 (operands[0],
							 operands[1],
							 p2,
							 operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand1),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:998 */
rtx
gen_widen_usumv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1005 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    machine_mode mode = GET_MODE (operands[1]);
    rtx p1, p2;

    p1  = arm_simd_vect_par_cnst_half (mode, false);
    p2  = arm_simd_vect_par_cnst_half (mode, true);

    if (operands[0] != operands[2])
      emit_move_insn (operands[0], operands[2]);

    emit_insn (gen_vec_sel_widen_usum_lov16qiv8qi3 (operands[0],
							 operands[1],
							 p1,
							 operands[0]));
    emit_insn (gen_vec_sel_widen_usum_hiv16qiv8qi3 (operands[0],
							 operands[1],
							 p2,
							 operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand1),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:998 */
rtx
gen_widen_usumv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1005 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    machine_mode mode = GET_MODE (operands[1]);
    rtx p1, p2;

    p1  = arm_simd_vect_par_cnst_half (mode, false);
    p2  = arm_simd_vect_par_cnst_half (mode, true);

    if (operands[0] != operands[2])
      emit_move_insn (operands[0], operands[2]);

    emit_insn (gen_vec_sel_widen_usum_lov8hiv4hi3 (operands[0],
							 operands[1],
							 p1,
							 operands[0]));
    emit_insn (gen_vec_sel_widen_usum_hiv8hiv4hi3 (operands[0],
							 operands[1],
							 p2,
							 operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:998 */
rtx
gen_widen_usumv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1005 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    machine_mode mode = GET_MODE (operands[1]);
    rtx p1, p2;

    p1  = arm_simd_vect_par_cnst_half (mode, false);
    p2  = arm_simd_vect_par_cnst_half (mode, true);

    if (operands[0] != operands[2])
      emit_move_insn (operands[0], operands[2]);

    emit_insn (gen_vec_sel_widen_usum_lov4siv2si3 (operands[0],
							 operands[1],
							 p1,
							 operands[0]));
    emit_insn (gen_vec_sel_widen_usum_hiv4siv2si3 (operands[0],
							 operands[1],
							 p2,
							 operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand1),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1133 */
rtx
gen_move_hi_quad_v2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1137 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (simplify_gen_subreg (DImode, operands[0], V2DImode,
				       GET_MODE_SIZE (DImode)),
		  operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1133 */
rtx
gen_move_hi_quad_v2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1137 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (simplify_gen_subreg (DFmode, operands[0], V2DFmode,
				       GET_MODE_SIZE (DFmode)),
		  operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1133 */
rtx
gen_move_hi_quad_v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1137 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (simplify_gen_subreg (V8QImode, operands[0], V16QImode,
				       GET_MODE_SIZE (V8QImode)),
		  operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1133 */
rtx
gen_move_hi_quad_v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1137 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (simplify_gen_subreg (V4HImode, operands[0], V8HImode,
				       GET_MODE_SIZE (V4HImode)),
		  operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1133 */
rtx
gen_move_hi_quad_v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1137 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (simplify_gen_subreg (V2SImode, operands[0], V4SImode,
				       GET_MODE_SIZE (V2SImode)),
		  operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1133 */
rtx
gen_move_hi_quad_v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1137 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (simplify_gen_subreg (V2SFmode, operands[0], V4SFmode,
				       GET_MODE_SIZE (V2SFmode)),
		  operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1144 */
rtx
gen_move_lo_quad_v2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1148 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (simplify_gen_subreg (DImode, operands[0],
				       V2DImode, 0),
		  operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1144 */
rtx
gen_move_lo_quad_v2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1148 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (simplify_gen_subreg (DFmode, operands[0],
				       V2DFmode, 0),
		  operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1144 */
rtx
gen_move_lo_quad_v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1148 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (simplify_gen_subreg (V8QImode, operands[0],
				       V16QImode, 0),
		  operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1144 */
rtx
gen_move_lo_quad_v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1148 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (simplify_gen_subreg (V4HImode, operands[0],
				       V8HImode, 0),
		  operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1144 */
rtx
gen_move_lo_quad_v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1148 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (simplify_gen_subreg (V2SImode, operands[0],
				       V4SImode, 0),
		  operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1144 */
rtx
gen_move_lo_quad_v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1148 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (simplify_gen_subreg (V2SFmode, operands[0],
				       V4SFmode, 0),
		  operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1157 */
rtx
gen_reduc_plus_scal_v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_plus_scal_v8qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1161 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx vec = gen_reg_rtx (V8QImode);
  neon_pairwise_reduce (vec, operands[1], V8QImode,
			&gen_neon_vpadd_internalv8qi);
  /* The same result is actually computed into every element.  */
  emit_insn (gen_vec_extractv8qiqi (operands[0], vec, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1157 */
rtx
gen_reduc_plus_scal_v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_plus_scal_v4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1161 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx vec = gen_reg_rtx (V4HImode);
  neon_pairwise_reduce (vec, operands[1], V4HImode,
			&gen_neon_vpadd_internalv4hi);
  /* The same result is actually computed into every element.  */
  emit_insn (gen_vec_extractv4hihi (operands[0], vec, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1157 */
rtx
gen_reduc_plus_scal_v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_plus_scal_v2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1161 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx vec = gen_reg_rtx (V2SImode);
  neon_pairwise_reduce (vec, operands[1], V2SImode,
			&gen_neon_vpadd_internalv2si);
  /* The same result is actually computed into every element.  */
  emit_insn (gen_vec_extractv2sisi (operands[0], vec, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1157 */
rtx
gen_reduc_plus_scal_v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_plus_scal_v2sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1161 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx vec = gen_reg_rtx (V2SFmode);
  neon_pairwise_reduce (vec, operands[1], V2SFmode,
			&gen_neon_vpadd_internalv2sf);
  /* The same result is actually computed into every element.  */
  emit_insn (gen_vec_extractv2sfsf (operands[0], vec, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1170 */
rtx
gen_reduc_plus_scal_v2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_plus_scal_v2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1174 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx vec = gen_reg_rtx (V2DImode);

  emit_insn (gen_arm_reduc_plus_internal_v2di (vec, operands[1]));
  emit_insn (gen_vec_extractv2didi (operands[0], vec, const0_rtx));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1192 */
rtx
gen_reduc_smin_scal_v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1196 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx vec = gen_reg_rtx (V8QImode);

  neon_pairwise_reduce (vec, operands[1], V8QImode,
			&gen_neon_vpsminv8qi);
  /* The result is computed into every element of the vector.  */
  emit_insn (gen_vec_extractv8qiqi (operands[0], vec, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1192 */
rtx
gen_reduc_smin_scal_v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1196 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx vec = gen_reg_rtx (V4HImode);

  neon_pairwise_reduce (vec, operands[1], V4HImode,
			&gen_neon_vpsminv4hi);
  /* The result is computed into every element of the vector.  */
  emit_insn (gen_vec_extractv4hihi (operands[0], vec, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1192 */
rtx
gen_reduc_smin_scal_v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1196 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx vec = gen_reg_rtx (V2SImode);

  neon_pairwise_reduce (vec, operands[1], V2SImode,
			&gen_neon_vpsminv2si);
  /* The result is computed into every element of the vector.  */
  emit_insn (gen_vec_extractv2sisi (operands[0], vec, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1192 */
rtx
gen_reduc_smin_scal_v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1196 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx vec = gen_reg_rtx (V2SFmode);

  neon_pairwise_reduce (vec, operands[1], V2SFmode,
			&gen_neon_vpsminv2sf);
  /* The result is computed into every element of the vector.  */
  emit_insn (gen_vec_extractv2sfsf (operands[0], vec, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1206 */
rtx
gen_reduc_smin_scal_v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1210 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx step1 = gen_reg_rtx (V8QImode);

  emit_insn (gen_quad_halves_sminv16qi (step1, operands[1]));
  emit_insn (gen_reduc_smin_scal_v8qi (operands[0], step1));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1206 */
rtx
gen_reduc_smin_scal_v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1210 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx step1 = gen_reg_rtx (V4HImode);

  emit_insn (gen_quad_halves_sminv8hi (step1, operands[1]));
  emit_insn (gen_reduc_smin_scal_v4hi (operands[0], step1));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1206 */
rtx
gen_reduc_smin_scal_v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1210 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx step1 = gen_reg_rtx (V2SImode);

  emit_insn (gen_quad_halves_sminv4si (step1, operands[1]));
  emit_insn (gen_reduc_smin_scal_v2si (operands[0], step1));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1206 */
rtx
gen_reduc_smin_scal_v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1210 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx step1 = gen_reg_rtx (V2SFmode);

  emit_insn (gen_quad_halves_sminv4sf (step1, operands[1]));
  emit_insn (gen_reduc_smin_scal_v2sf (operands[0], step1));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1219 */
rtx
gen_reduc_smax_scal_v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1223 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx vec = gen_reg_rtx (V8QImode);
  neon_pairwise_reduce (vec, operands[1], V8QImode,
			&gen_neon_vpsmaxv8qi);
  /* The result is computed into every element of the vector.  */
  emit_insn (gen_vec_extractv8qiqi (operands[0], vec, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1219 */
rtx
gen_reduc_smax_scal_v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1223 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx vec = gen_reg_rtx (V4HImode);
  neon_pairwise_reduce (vec, operands[1], V4HImode,
			&gen_neon_vpsmaxv4hi);
  /* The result is computed into every element of the vector.  */
  emit_insn (gen_vec_extractv4hihi (operands[0], vec, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1219 */
rtx
gen_reduc_smax_scal_v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1223 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx vec = gen_reg_rtx (V2SImode);
  neon_pairwise_reduce (vec, operands[1], V2SImode,
			&gen_neon_vpsmaxv2si);
  /* The result is computed into every element of the vector.  */
  emit_insn (gen_vec_extractv2sisi (operands[0], vec, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1219 */
rtx
gen_reduc_smax_scal_v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1223 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx vec = gen_reg_rtx (V2SFmode);
  neon_pairwise_reduce (vec, operands[1], V2SFmode,
			&gen_neon_vpsmaxv2sf);
  /* The result is computed into every element of the vector.  */
  emit_insn (gen_vec_extractv2sfsf (operands[0], vec, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1232 */
rtx
gen_reduc_smax_scal_v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1236 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx step1 = gen_reg_rtx (V8QImode);

  emit_insn (gen_quad_halves_smaxv16qi (step1, operands[1]));
  emit_insn (gen_reduc_smax_scal_v8qi (operands[0], step1));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1232 */
rtx
gen_reduc_smax_scal_v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1236 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx step1 = gen_reg_rtx (V4HImode);

  emit_insn (gen_quad_halves_smaxv8hi (step1, operands[1]));
  emit_insn (gen_reduc_smax_scal_v4hi (operands[0], step1));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1232 */
rtx
gen_reduc_smax_scal_v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1236 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx step1 = gen_reg_rtx (V2SImode);

  emit_insn (gen_quad_halves_smaxv4si (step1, operands[1]));
  emit_insn (gen_reduc_smax_scal_v2si (operands[0], step1));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1232 */
rtx
gen_reduc_smax_scal_v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1236 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx step1 = gen_reg_rtx (V2SFmode);

  emit_insn (gen_quad_halves_smaxv4sf (step1, operands[1]));
  emit_insn (gen_reduc_smax_scal_v2sf (operands[0], step1));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1245 */
rtx
gen_reduc_umin_scal_v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1249 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx vec = gen_reg_rtx (V8QImode);
  neon_pairwise_reduce (vec, operands[1], V8QImode,
			&gen_neon_vpuminv8qi);
  /* The result is computed into every element of the vector.  */
  emit_insn (gen_vec_extractv8qiqi (operands[0], vec, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1245 */
rtx
gen_reduc_umin_scal_v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1249 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx vec = gen_reg_rtx (V4HImode);
  neon_pairwise_reduce (vec, operands[1], V4HImode,
			&gen_neon_vpuminv4hi);
  /* The result is computed into every element of the vector.  */
  emit_insn (gen_vec_extractv4hihi (operands[0], vec, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1245 */
rtx
gen_reduc_umin_scal_v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1249 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx vec = gen_reg_rtx (V2SImode);
  neon_pairwise_reduce (vec, operands[1], V2SImode,
			&gen_neon_vpuminv2si);
  /* The result is computed into every element of the vector.  */
  emit_insn (gen_vec_extractv2sisi (operands[0], vec, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1258 */
rtx
gen_reduc_umin_scal_v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1262 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx step1 = gen_reg_rtx (V8QImode);

  emit_insn (gen_quad_halves_uminv16qi (step1, operands[1]));
  emit_insn (gen_reduc_umin_scal_v8qi (operands[0], step1));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1258 */
rtx
gen_reduc_umin_scal_v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1262 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx step1 = gen_reg_rtx (V4HImode);

  emit_insn (gen_quad_halves_uminv8hi (step1, operands[1]));
  emit_insn (gen_reduc_umin_scal_v4hi (operands[0], step1));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1258 */
rtx
gen_reduc_umin_scal_v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1262 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx step1 = gen_reg_rtx (V2SImode);

  emit_insn (gen_quad_halves_uminv4si (step1, operands[1]));
  emit_insn (gen_reduc_umin_scal_v2si (operands[0], step1));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1271 */
rtx
gen_reduc_umax_scal_v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1275 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx vec = gen_reg_rtx (V8QImode);
  neon_pairwise_reduce (vec, operands[1], V8QImode,
			&gen_neon_vpumaxv8qi);
  /* The result is computed into every element of the vector.  */
  emit_insn (gen_vec_extractv8qiqi (operands[0], vec, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1271 */
rtx
gen_reduc_umax_scal_v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1275 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx vec = gen_reg_rtx (V4HImode);
  neon_pairwise_reduce (vec, operands[1], V4HImode,
			&gen_neon_vpumaxv4hi);
  /* The result is computed into every element of the vector.  */
  emit_insn (gen_vec_extractv4hihi (operands[0], vec, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1271 */
rtx
gen_reduc_umax_scal_v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1275 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx vec = gen_reg_rtx (V2SImode);
  neon_pairwise_reduce (vec, operands[1], V2SImode,
			&gen_neon_vpumaxv2si);
  /* The result is computed into every element of the vector.  */
  emit_insn (gen_vec_extractv2sisi (operands[0], vec, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1284 */
rtx
gen_reduc_umax_scal_v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1288 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx step1 = gen_reg_rtx (V8QImode);

  emit_insn (gen_quad_halves_umaxv16qi (step1, operands[1]));
  emit_insn (gen_reduc_umax_scal_v8qi (operands[0], step1));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1284 */
rtx
gen_reduc_umax_scal_v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1288 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx step1 = gen_reg_rtx (V4HImode);

  emit_insn (gen_quad_halves_umaxv8hi (step1, operands[1]));
  emit_insn (gen_reduc_umax_scal_v4hi (operands[0], step1));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1284 */
rtx
gen_reduc_umax_scal_v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1288 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx step1 = gen_reg_rtx (V2SImode);

  emit_insn (gen_quad_halves_umaxv4si (step1, operands[1]));
  emit_insn (gen_reduc_umax_scal_v2si (operands[0], step1));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1412 */
rtx
gen_vec_cmpv8qiv8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1419 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V8QImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1412 */
rtx
gen_vec_cmpv16qiv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1419 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V16QImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1412 */
rtx
gen_vec_cmpv4hiv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1419 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V4HImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1412 */
rtx
gen_vec_cmpv8hiv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1419 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V8HImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1412 */
rtx
gen_vec_cmpv2siv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1419 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V2SImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1412 */
rtx
gen_vec_cmpv4siv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1419 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V4SImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1412 */
rtx
gen_vec_cmpv2sfv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1419 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V2SImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1412 */
rtx
gen_vec_cmpv4sfv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1419 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V4SImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1412 */
rtx
gen_vec_cmpv8hfv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1419 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V8HImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1412 */
rtx
gen_vec_cmpv4hfv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1419 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V4HImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1425 */
rtx
gen_vec_cmpuv8qiv8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1431 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V8QImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1425 */
rtx
gen_vec_cmpuv16qiv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1431 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V16QImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1425 */
rtx
gen_vec_cmpuv4hiv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1431 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V4HImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1425 */
rtx
gen_vec_cmpuv8hiv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1431 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V8HImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1425 */
rtx
gen_vec_cmpuv2siv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1431 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V2SImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1425 */
rtx
gen_vec_cmpuv4siv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1431 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V4SImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1437 */
rtx
gen_vcond_mask_v8qiv8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v8qiv8qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1445 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vbslv8qi (operands[0], operands[3], operands[1],
				  operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V8QImode,
	operand3,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1437 */
rtx
gen_vcond_mask_v16qiv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v16qiv16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1445 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vbslv16qi (operands[0], operands[3], operands[1],
				  operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V16QImode,
	operand3,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1437 */
rtx
gen_vcond_mask_v4hiv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v4hiv4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1445 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vbslv4hi (operands[0], operands[3], operands[1],
				  operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4HImode,
	operand3,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1437 */
rtx
gen_vcond_mask_v8hiv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v8hiv8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1445 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vbslv8hi (operands[0], operands[3], operands[1],
				  operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V8HImode,
	operand3,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1437 */
rtx
gen_vcond_mask_v2siv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v2siv2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1445 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vbslv2si (operands[0], operands[3], operands[1],
				  operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V2SImode,
	operand3,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1437 */
rtx
gen_vcond_mask_v4siv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v4siv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1445 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vbslv4si (operands[0], operands[3], operands[1],
				  operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4SImode,
	operand3,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1437 */
rtx
gen_vcond_mask_v2sfv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v2sfv2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1445 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vbslv2sf (operands[0], operands[3], operands[1],
				  operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V2SFmode,
	operand3,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1437 */
rtx
gen_vcond_mask_v4sfv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v4sfv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1445 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vbslv4sf (operands[0], operands[3], operands[1],
				  operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4SFmode,
	operand3,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1437 */
rtx
gen_vcond_mask_v8hfv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v8hfv8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1445 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vbslv8hf (operands[0], operands[3], operands[1],
				  operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V8HFmode,
	operand3,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1437 */
rtx
gen_vcond_mask_v4hfv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v4hfv4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1445 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vbslv4hf (operands[0], operands[3], operands[1],
				  operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4HFmode,
	operand3,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1455 */
rtx
gen_neon_vaddv2sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1460 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (ARM_HAVE_NEON_V2SF_ARITH)
    emit_insn (gen_addv2sf3 (operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vaddv2sf_unspec (operands[0], operands[1],
					   operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1455 */
rtx
gen_neon_vaddv4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1460 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (ARM_HAVE_NEON_V4SF_ARITH)
    emit_insn (gen_addv4sf3 (operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vaddv4sf_unspec (operands[0], operands[1],
					   operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1469 */
rtx
gen_neon_vaddv8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1474 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_addv8hf3 (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1469 */
rtx
gen_neon_vaddv4hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1474 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_addv4hf3 (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1479 */
rtx
gen_neon_vsubv8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1484 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_subv8hf3 (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1479 */
rtx
gen_neon_vsubv4hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1484 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_subv4hf3 (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1591 */
rtx
gen_neon_vmlav8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1597 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (ARM_HAVE_NEON_V8QI_ARITH)
    emit_insn (gen_mulv8qi3addv8qi_neon (operands[0], operands[1],
				             operands[2], operands[3]));
  else
    emit_insn (gen_neon_vmlav8qi_unspec (operands[0], operands[1],
					   operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1591 */
rtx
gen_neon_vmlav16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1597 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (ARM_HAVE_NEON_V16QI_ARITH)
    emit_insn (gen_mulv16qi3addv16qi_neon (operands[0], operands[1],
				             operands[2], operands[3]));
  else
    emit_insn (gen_neon_vmlav16qi_unspec (operands[0], operands[1],
					   operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1591 */
rtx
gen_neon_vmlav4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1597 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (ARM_HAVE_NEON_V4HI_ARITH)
    emit_insn (gen_mulv4hi3addv4hi_neon (operands[0], operands[1],
				             operands[2], operands[3]));
  else
    emit_insn (gen_neon_vmlav4hi_unspec (operands[0], operands[1],
					   operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1591 */
rtx
gen_neon_vmlav8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1597 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (ARM_HAVE_NEON_V8HI_ARITH)
    emit_insn (gen_mulv8hi3addv8hi_neon (operands[0], operands[1],
				             operands[2], operands[3]));
  else
    emit_insn (gen_neon_vmlav8hi_unspec (operands[0], operands[1],
					   operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1591 */
rtx
gen_neon_vmlav2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1597 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (ARM_HAVE_NEON_V2SI_ARITH)
    emit_insn (gen_mulv2si3addv2si_neon (operands[0], operands[1],
				             operands[2], operands[3]));
  else
    emit_insn (gen_neon_vmlav2si_unspec (operands[0], operands[1],
					   operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1591 */
rtx
gen_neon_vmlav4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1597 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (ARM_HAVE_NEON_V4SI_ARITH)
    emit_insn (gen_mulv4si3addv4si_neon (operands[0], operands[1],
				             operands[2], operands[3]));
  else
    emit_insn (gen_neon_vmlav4si_unspec (operands[0], operands[1],
					   operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1591 */
rtx
gen_neon_vmlav2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1597 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (ARM_HAVE_NEON_V2SF_ARITH)
    emit_insn (gen_mulv2sf3addv2sf_neon (operands[0], operands[1],
				             operands[2], operands[3]));
  else
    emit_insn (gen_neon_vmlav2sf_unspec (operands[0], operands[1],
					   operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1591 */
rtx
gen_neon_vmlav4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1597 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (ARM_HAVE_NEON_V4SF_ARITH)
    emit_insn (gen_mulv4sf3addv4sf_neon (operands[0], operands[1],
				             operands[2], operands[3]));
  else
    emit_insn (gen_neon_vmlav4sf_unspec (operands[0], operands[1],
					   operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1607 */
rtx
gen_neon_vfmav2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1613 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_fmav2sf4_intrinsic (operands[0], operands[2], operands[3],
				       operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1607 */
rtx
gen_neon_vfmav4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1613 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_fmav4sf4_intrinsic (operands[0], operands[2], operands[3],
				       operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1619 */
rtx
gen_neon_vfmav8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1625 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_fmav8hf4 (operands[0], operands[2], operands[3],
			     operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1619 */
rtx
gen_neon_vfmav4hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1625 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_fmav4hf4 (operands[0], operands[2], operands[3],
			     operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1631 */
rtx
gen_neon_vfmsv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1637 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_fmsubv2sf4_intrinsic (operands[0], operands[2], operands[3],
					 operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1631 */
rtx
gen_neon_vfmsv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1637 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_fmsubv4sf4_intrinsic (operands[0], operands[2], operands[3],
					 operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1643 */
rtx
gen_neon_vfmsv8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1649 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_fmsubv8hf4_intrinsic (operands[0], operands[2], operands[3],
					 operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1643 */
rtx
gen_neon_vfmsv4hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1649 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_fmsubv4hf4_intrinsic (operands[0], operands[2], operands[3],
					 operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1659 */
rtx
gen_neon_vfmal_lowv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1667 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx half = arm_simd_vect_par_cnst_half (V4HFmode, false);
  emit_insn (gen_vfmal_lowv2sf_intrinsic (operands[0],
							     operands[1],
							     operands[2],
							     operands[3],
							     half, half));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		gen_rtx_PLUS (V4HFmode,
	operand2,
	operand3)),
	366)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1659 */
rtx
gen_neon_vfmal_highv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1667 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx half = arm_simd_vect_par_cnst_half (V4HFmode, true);
  emit_insn (gen_vfmal_highv2sf_intrinsic (operands[0],
							     operands[1],
							     operands[2],
							     operands[3],
							     half, half));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		gen_rtx_PLUS (V4HFmode,
	operand2,
	operand3)),
	367)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1659 */
rtx
gen_neon_vfmsl_lowv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1667 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx half = arm_simd_vect_par_cnst_half (V4HFmode, false);
  emit_insn (gen_vfmsl_lowv2sf_intrinsic (operands[0],
							     operands[1],
							     operands[2],
							     operands[3],
							     half, half));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MINUS (V4HFmode,
	operand2,
	operand3)),
	366)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1659 */
rtx
gen_neon_vfmsl_highv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1667 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx half = arm_simd_vect_par_cnst_half (V4HFmode, true);
  emit_insn (gen_vfmsl_highv2sf_intrinsic (operands[0],
							     operands[1],
							     operands[2],
							     operands[3],
							     half, half));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MINUS (V4HFmode,
	operand2,
	operand3)),
	367)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1659 */
rtx
gen_neon_vfmal_lowv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1667 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx half = arm_simd_vect_par_cnst_half (V8HFmode, false);
  emit_insn (gen_vfmal_lowv4sf_intrinsic (operands[0],
							     operands[1],
							     operands[2],
							     operands[3],
							     half, half));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		gen_rtx_PLUS (V8HFmode,
	operand2,
	operand3)),
	366)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1659 */
rtx
gen_neon_vfmal_highv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1667 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx half = arm_simd_vect_par_cnst_half (V8HFmode, true);
  emit_insn (gen_vfmal_highv4sf_intrinsic (operands[0],
							     operands[1],
							     operands[2],
							     operands[3],
							     half, half));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		gen_rtx_PLUS (V8HFmode,
	operand2,
	operand3)),
	367)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1659 */
rtx
gen_neon_vfmsl_lowv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1667 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx half = arm_simd_vect_par_cnst_half (V8HFmode, false);
  emit_insn (gen_vfmsl_lowv4sf_intrinsic (operands[0],
							     operands[1],
							     operands[2],
							     operands[3],
							     half, half));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MINUS (V8HFmode,
	operand2,
	operand3)),
	366)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1659 */
rtx
gen_neon_vfmsl_highv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1667 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx half = arm_simd_vect_par_cnst_half (V8HFmode, true);
  emit_insn (gen_vfmsl_highv4sf_intrinsic (operands[0],
							     operands[1],
							     operands[2],
							     operands[3],
							     half, half));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MINUS (V8HFmode,
	operand2,
	operand3)),
	367)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1747 */
rtx
gen_neon_vfmal_lane_lowv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1756 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx lane = GEN_INT (NEON_ENDIAN_LANE_N (V4HFmode, INTVAL (operands[4])));
  rtx half = arm_simd_vect_par_cnst_half (V4HFmode, false);
  emit_insn (gen_vfmal_lane_lowv2sf_intrinsic
					       (operands[0], operands[1],
						operands[2], operands[3],
						half, lane));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (V4HFmode,
	operand2,
	operand3),
		operand4),
	366)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1747 */
rtx
gen_neon_vfmal_lane_highv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1756 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx lane = GEN_INT (NEON_ENDIAN_LANE_N (V4HFmode, INTVAL (operands[4])));
  rtx half = arm_simd_vect_par_cnst_half (V4HFmode, true);
  emit_insn (gen_vfmal_lane_highv2sf_intrinsic
					       (operands[0], operands[1],
						operands[2], operands[3],
						half, lane));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (V4HFmode,
	operand2,
	operand3),
		operand4),
	367)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1747 */
rtx
gen_neon_vfmsl_lane_lowv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1756 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx lane = GEN_INT (NEON_ENDIAN_LANE_N (V4HFmode, INTVAL (operands[4])));
  rtx half = arm_simd_vect_par_cnst_half (V4HFmode, false);
  emit_insn (gen_vfmsl_lane_lowv2sf_intrinsic
					       (operands[0], operands[1],
						operands[2], operands[3],
						half, lane));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (V4HFmode,
	operand2,
	operand3),
		operand4),
	366)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1747 */
rtx
gen_neon_vfmsl_lane_highv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1756 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx lane = GEN_INT (NEON_ENDIAN_LANE_N (V4HFmode, INTVAL (operands[4])));
  rtx half = arm_simd_vect_par_cnst_half (V4HFmode, true);
  emit_insn (gen_vfmsl_lane_highv2sf_intrinsic
					       (operands[0], operands[1],
						operands[2], operands[3],
						half, lane));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (V4HFmode,
	operand2,
	operand3),
		operand4),
	367)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1747 */
rtx
gen_neon_vfmal_lane_lowv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1756 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx lane = GEN_INT (NEON_ENDIAN_LANE_N (V8HFmode, INTVAL (operands[4])));
  rtx half = arm_simd_vect_par_cnst_half (V8HFmode, false);
  emit_insn (gen_vfmal_lane_lowv4sf_intrinsic
					       (operands[0], operands[1],
						operands[2], operands[3],
						half, lane));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (V8HFmode,
	operand2,
	operand3),
		operand4),
	366)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1747 */
rtx
gen_neon_vfmal_lane_highv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1756 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx lane = GEN_INT (NEON_ENDIAN_LANE_N (V8HFmode, INTVAL (operands[4])));
  rtx half = arm_simd_vect_par_cnst_half (V8HFmode, true);
  emit_insn (gen_vfmal_lane_highv4sf_intrinsic
					       (operands[0], operands[1],
						operands[2], operands[3],
						half, lane));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (V8HFmode,
	operand2,
	operand3),
		operand4),
	367)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1747 */
rtx
gen_neon_vfmsl_lane_lowv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1756 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx lane = GEN_INT (NEON_ENDIAN_LANE_N (V8HFmode, INTVAL (operands[4])));
  rtx half = arm_simd_vect_par_cnst_half (V8HFmode, false);
  emit_insn (gen_vfmsl_lane_lowv4sf_intrinsic
					       (operands[0], operands[1],
						operands[2], operands[3],
						half, lane));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (V8HFmode,
	operand2,
	operand3),
		operand4),
	366)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1747 */
rtx
gen_neon_vfmsl_lane_highv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1756 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx lane = GEN_INT (NEON_ENDIAN_LANE_N (V8HFmode, INTVAL (operands[4])));
  rtx half = arm_simd_vect_par_cnst_half (V8HFmode, true);
  emit_insn (gen_vfmsl_lane_highv4sf_intrinsic
					       (operands[0], operands[1],
						operands[2], operands[3],
						half, lane));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (V8HFmode,
	operand2,
	operand3),
		operand4),
	367)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1796 */
rtx
gen_neon_vfmal_lane_lowv8hfv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1805 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx lane
    = GEN_INT (NEON_ENDIAN_LANE_N (V8HFmode, INTVAL (operands[4])));
  rtx half = arm_simd_vect_par_cnst_half (V4HFmode, false);
  emit_insn (gen_vfmal_lane_lowv8hfv2sf_intrinsic
		(operands[0], operands[1], operands[2], operands[3],
		 half, lane));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (V4HFmode,
	operand2,
	operand3),
		operand4),
	366)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1796 */
rtx
gen_neon_vfmal_lane_highv8hfv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1805 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx lane
    = GEN_INT (NEON_ENDIAN_LANE_N (V8HFmode, INTVAL (operands[4])));
  rtx half = arm_simd_vect_par_cnst_half (V4HFmode, true);
  emit_insn (gen_vfmal_lane_highv8hfv2sf_intrinsic
		(operands[0], operands[1], operands[2], operands[3],
		 half, lane));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (V4HFmode,
	operand2,
	operand3),
		operand4),
	367)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1796 */
rtx
gen_neon_vfmsl_lane_lowv8hfv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1805 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx lane
    = GEN_INT (NEON_ENDIAN_LANE_N (V8HFmode, INTVAL (operands[4])));
  rtx half = arm_simd_vect_par_cnst_half (V4HFmode, false);
  emit_insn (gen_vfmsl_lane_lowv8hfv2sf_intrinsic
		(operands[0], operands[1], operands[2], operands[3],
		 half, lane));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (V4HFmode,
	operand2,
	operand3),
		operand4),
	366)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1796 */
rtx
gen_neon_vfmsl_lane_highv8hfv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1805 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx lane
    = GEN_INT (NEON_ENDIAN_LANE_N (V8HFmode, INTVAL (operands[4])));
  rtx half = arm_simd_vect_par_cnst_half (V4HFmode, true);
  emit_insn (gen_vfmsl_lane_highv8hfv2sf_intrinsic
		(operands[0], operands[1], operands[2], operands[3],
		 half, lane));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (V4HFmode,
	operand2,
	operand3),
		operand4),
	367)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1796 */
rtx
gen_neon_vfmal_lane_lowv4hfv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1805 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx lane
    = GEN_INT (NEON_ENDIAN_LANE_N (V4HFmode, INTVAL (operands[4])));
  rtx half = arm_simd_vect_par_cnst_half (V8HFmode, false);
  emit_insn (gen_vfmal_lane_lowv4hfv4sf_intrinsic
		(operands[0], operands[1], operands[2], operands[3],
		 half, lane));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (V8HFmode,
	operand2,
	operand3),
		operand4),
	366)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1796 */
rtx
gen_neon_vfmal_lane_highv4hfv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1805 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx lane
    = GEN_INT (NEON_ENDIAN_LANE_N (V4HFmode, INTVAL (operands[4])));
  rtx half = arm_simd_vect_par_cnst_half (V8HFmode, true);
  emit_insn (gen_vfmal_lane_highv4hfv4sf_intrinsic
		(operands[0], operands[1], operands[2], operands[3],
		 half, lane));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (V8HFmode,
	operand2,
	operand3),
		operand4),
	367)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1796 */
rtx
gen_neon_vfmsl_lane_lowv4hfv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1805 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx lane
    = GEN_INT (NEON_ENDIAN_LANE_N (V4HFmode, INTVAL (operands[4])));
  rtx half = arm_simd_vect_par_cnst_half (V8HFmode, false);
  emit_insn (gen_vfmsl_lane_lowv4hfv4sf_intrinsic
		(operands[0], operands[1], operands[2], operands[3],
		 half, lane));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (V8HFmode,
	operand2,
	operand3),
		operand4),
	366)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:1796 */
rtx
gen_neon_vfmsl_lane_highv4hfv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1805 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx lane
    = GEN_INT (NEON_ENDIAN_LANE_N (V4HFmode, INTVAL (operands[4])));
  rtx half = arm_simd_vect_par_cnst_half (V8HFmode, true);
  emit_insn (gen_vfmsl_lane_highv4hfv4sf_intrinsic
		(operands[0], operands[1], operands[2], operands[3],
		 half, lane));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (V8HFmode,
	operand2,
	operand3),
		operand4),
	367)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2082 */
rtx
gen_neon_vmlsv8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2088 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (ARM_HAVE_NEON_V8QI_ARITH)
    emit_insn (gen_mulv8qi3negv8qiaddv8qi_neon (operands[0],
		 operands[1], operands[2], operands[3]));
  else
    emit_insn (gen_neon_vmlsv8qi_unspec (operands[0], operands[1],
					   operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2082 */
rtx
gen_neon_vmlsv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2088 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (ARM_HAVE_NEON_V16QI_ARITH)
    emit_insn (gen_mulv16qi3negv16qiaddv16qi_neon (operands[0],
		 operands[1], operands[2], operands[3]));
  else
    emit_insn (gen_neon_vmlsv16qi_unspec (operands[0], operands[1],
					   operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2082 */
rtx
gen_neon_vmlsv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2088 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (ARM_HAVE_NEON_V4HI_ARITH)
    emit_insn (gen_mulv4hi3negv4hiaddv4hi_neon (operands[0],
		 operands[1], operands[2], operands[3]));
  else
    emit_insn (gen_neon_vmlsv4hi_unspec (operands[0], operands[1],
					   operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2082 */
rtx
gen_neon_vmlsv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2088 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (ARM_HAVE_NEON_V8HI_ARITH)
    emit_insn (gen_mulv8hi3negv8hiaddv8hi_neon (operands[0],
		 operands[1], operands[2], operands[3]));
  else
    emit_insn (gen_neon_vmlsv8hi_unspec (operands[0], operands[1],
					   operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2082 */
rtx
gen_neon_vmlsv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2088 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (ARM_HAVE_NEON_V2SI_ARITH)
    emit_insn (gen_mulv2si3negv2siaddv2si_neon (operands[0],
		 operands[1], operands[2], operands[3]));
  else
    emit_insn (gen_neon_vmlsv2si_unspec (operands[0], operands[1],
					   operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2082 */
rtx
gen_neon_vmlsv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2088 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (ARM_HAVE_NEON_V4SI_ARITH)
    emit_insn (gen_mulv4si3negv4siaddv4si_neon (operands[0],
		 operands[1], operands[2], operands[3]));
  else
    emit_insn (gen_neon_vmlsv4si_unspec (operands[0], operands[1],
					   operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2082 */
rtx
gen_neon_vmlsv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2088 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (ARM_HAVE_NEON_V2SF_ARITH)
    emit_insn (gen_mulv2sf3negv2sfaddv2sf_neon (operands[0],
		 operands[1], operands[2], operands[3]));
  else
    emit_insn (gen_neon_vmlsv2sf_unspec (operands[0], operands[1],
					   operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2082 */
rtx
gen_neon_vmlsv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2088 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (ARM_HAVE_NEON_V4SF_ARITH)
    emit_insn (gen_mulv4sf3negv4sfaddv4sf_neon (operands[0],
		 operands[1], operands[2], operands[3]));
  else
    emit_insn (gen_neon_vmlsv4sf_unspec (operands[0], operands[1],
					   operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2190 */
rtx
gen_neon_vsubv2sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2195 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (ARM_HAVE_NEON_V2SF_ARITH)
    emit_insn (gen_subv2sf3 (operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vsubv2sf_unspec (operands[0], operands[1],
					   operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2190 */
rtx
gen_neon_vsubv4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2195 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (ARM_HAVE_NEON_V4SF_ARITH)
    emit_insn (gen_subv4sf3 (operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vsubv4sf_unspec (operands[0], operands[1],
					   operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vceqv8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V8QImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vceqv8qi_insn_unspec because
           we define gen_neon_vceqv8qi_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V8QImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vceqv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vceqv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vceqv8qi_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V8QImode,
	gen_rtx_EQ (V8QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcgtv8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V8QImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcgtv8qi_insn_unspec because
           we define gen_neon_vceqv8qi_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V8QImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcgtv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcgtv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcgtv8qi_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V8QImode,
	gen_rtx_GT (V8QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcgev8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V8QImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcgev8qi_insn_unspec because
           we define gen_neon_vceqv8qi_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V8QImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcgev2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcgev4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcgev8qi_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V8QImode,
	gen_rtx_GE (V8QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vclev8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V8QImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vclev8qi_insn_unspec because
           we define gen_neon_vceqv8qi_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V8QImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vclev2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vclev4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vclev8qi_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V8QImode,
	gen_rtx_LE (V8QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcltv8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V8QImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcltv8qi_insn_unspec because
           we define gen_neon_vceqv8qi_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V8QImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcltv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcltv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcltv8qi_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V8QImode,
	gen_rtx_LT (V8QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vceqv16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V16QImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vceqv16qi_insn_unspec because
           we define gen_neon_vceqv16qi_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V16QImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vceqv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vceqv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vceqv16qi_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V16QImode,
	gen_rtx_EQ (V16QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcgtv16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V16QImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcgtv16qi_insn_unspec because
           we define gen_neon_vceqv16qi_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V16QImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcgtv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcgtv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcgtv16qi_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V16QImode,
	gen_rtx_GT (V16QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcgev16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V16QImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcgev16qi_insn_unspec because
           we define gen_neon_vceqv16qi_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V16QImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcgev2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcgev4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcgev16qi_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V16QImode,
	gen_rtx_GE (V16QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vclev16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V16QImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vclev16qi_insn_unspec because
           we define gen_neon_vceqv16qi_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V16QImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vclev2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vclev4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vclev16qi_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V16QImode,
	gen_rtx_LE (V16QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcltv16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V16QImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcltv16qi_insn_unspec because
           we define gen_neon_vceqv16qi_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V16QImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcltv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcltv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcltv16qi_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V16QImode,
	gen_rtx_LT (V16QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vceqv4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V4HImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vceqv4hi_insn_unspec because
           we define gen_neon_vceqv4hi_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V4HImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vceqv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vceqv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vceqv4hi_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V4HImode,
	gen_rtx_EQ (V4HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcgtv4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V4HImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcgtv4hi_insn_unspec because
           we define gen_neon_vceqv4hi_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V4HImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcgtv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcgtv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcgtv4hi_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V4HImode,
	gen_rtx_GT (V4HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcgev4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V4HImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcgev4hi_insn_unspec because
           we define gen_neon_vceqv4hi_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V4HImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcgev2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcgev4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcgev4hi_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V4HImode,
	gen_rtx_GE (V4HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vclev4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V4HImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vclev4hi_insn_unspec because
           we define gen_neon_vceqv4hi_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V4HImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vclev2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vclev4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vclev4hi_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V4HImode,
	gen_rtx_LE (V4HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcltv4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V4HImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcltv4hi_insn_unspec because
           we define gen_neon_vceqv4hi_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V4HImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcltv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcltv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcltv4hi_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V4HImode,
	gen_rtx_LT (V4HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vceqv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V8HImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vceqv8hi_insn_unspec because
           we define gen_neon_vceqv8hi_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V8HImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vceqv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vceqv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vceqv8hi_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V8HImode,
	gen_rtx_EQ (V8HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcgtv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V8HImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcgtv8hi_insn_unspec because
           we define gen_neon_vceqv8hi_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V8HImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcgtv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcgtv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcgtv8hi_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V8HImode,
	gen_rtx_GT (V8HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcgev8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V8HImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcgev8hi_insn_unspec because
           we define gen_neon_vceqv8hi_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V8HImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcgev2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcgev4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcgev8hi_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V8HImode,
	gen_rtx_GE (V8HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vclev8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V8HImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vclev8hi_insn_unspec because
           we define gen_neon_vceqv8hi_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V8HImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vclev2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vclev4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vclev8hi_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V8HImode,
	gen_rtx_LE (V8HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcltv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V8HImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcltv8hi_insn_unspec because
           we define gen_neon_vceqv8hi_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V8HImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcltv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcltv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcltv8hi_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V8HImode,
	gen_rtx_LT (V8HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vceqv2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V2SImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vceqv2si_insn_unspec because
           we define gen_neon_vceqv2si_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V2SImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vceqv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vceqv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vceqv2si_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V2SImode,
	gen_rtx_EQ (V2SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcgtv2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V2SImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcgtv2si_insn_unspec because
           we define gen_neon_vceqv2si_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V2SImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcgtv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcgtv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcgtv2si_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V2SImode,
	gen_rtx_GT (V2SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcgev2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V2SImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcgev2si_insn_unspec because
           we define gen_neon_vceqv2si_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V2SImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcgev2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcgev4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcgev2si_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V2SImode,
	gen_rtx_GE (V2SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vclev2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V2SImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vclev2si_insn_unspec because
           we define gen_neon_vceqv2si_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V2SImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vclev2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vclev4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vclev2si_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V2SImode,
	gen_rtx_LE (V2SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcltv2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V2SImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcltv2si_insn_unspec because
           we define gen_neon_vceqv2si_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V2SImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcltv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcltv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcltv2si_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V2SImode,
	gen_rtx_LT (V2SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vceqv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V4SImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vceqv4si_insn_unspec because
           we define gen_neon_vceqv4si_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V4SImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vceqv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vceqv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vceqv4si_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V4SImode,
	gen_rtx_EQ (V4SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcgtv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V4SImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcgtv4si_insn_unspec because
           we define gen_neon_vceqv4si_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V4SImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcgtv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcgtv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcgtv4si_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V4SImode,
	gen_rtx_GT (V4SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcgev4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V4SImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcgev4si_insn_unspec because
           we define gen_neon_vceqv4si_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V4SImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcgev2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcgev4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcgev4si_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V4SImode,
	gen_rtx_GE (V4SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vclev4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V4SImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vclev4si_insn_unspec because
           we define gen_neon_vceqv4si_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V4SImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vclev2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vclev4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vclev4si_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V4SImode,
	gen_rtx_LE (V4SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcltv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V4SImode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcltv4si_insn_unspec because
           we define gen_neon_vceqv4si_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V4SImode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcltv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcltv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcltv4si_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V4SImode,
	gen_rtx_LT (V4SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vceqv2sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V2SFmode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vceqv2sf_insn_unspec because
           we define gen_neon_vceqv2sf_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V2SFmode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vceqv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vceqv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vceqv2sf_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V2SImode,
	gen_rtx_EQ (V2SFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcgtv2sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V2SFmode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcgtv2sf_insn_unspec because
           we define gen_neon_vceqv2sf_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V2SFmode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcgtv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcgtv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcgtv2sf_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V2SImode,
	gen_rtx_GT (V2SFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcgev2sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V2SFmode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcgev2sf_insn_unspec because
           we define gen_neon_vceqv2sf_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V2SFmode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcgev2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcgev4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcgev2sf_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V2SImode,
	gen_rtx_GE (V2SFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vclev2sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V2SFmode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vclev2sf_insn_unspec because
           we define gen_neon_vceqv2sf_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V2SFmode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vclev2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vclev4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vclev2sf_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V2SImode,
	gen_rtx_LE (V2SFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcltv2sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V2SFmode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcltv2sf_insn_unspec because
           we define gen_neon_vceqv2sf_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V2SFmode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcltv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcltv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcltv2sf_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V2SImode,
	gen_rtx_LT (V2SFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vceqv4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V4SFmode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vceqv4sf_insn_unspec because
           we define gen_neon_vceqv4sf_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V4SFmode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vceqv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vceqv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vceqv4sf_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V4SImode,
	gen_rtx_EQ (V4SFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcgtv4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V4SFmode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcgtv4sf_insn_unspec because
           we define gen_neon_vceqv4sf_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V4SFmode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcgtv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcgtv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcgtv4sf_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V4SImode,
	gen_rtx_GT (V4SFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcgev4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V4SFmode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcgev4sf_insn_unspec because
           we define gen_neon_vceqv4sf_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V4SFmode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcgev2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcgev4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcgev4sf_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V4SImode,
	gen_rtx_GE (V4SFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vclev4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V4SFmode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vclev4sf_insn_unspec because
           we define gen_neon_vceqv4sf_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V4SFmode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vclev2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vclev4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vclev4sf_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V4SImode,
	gen_rtx_LE (V4SFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2271 */
rtx
gen_neon_vcltv4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2277 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
       are enabled.  */
    if (GET_MODE_CLASS (V4SFmode) == MODE_VECTOR_FLOAT
        && !flag_unsafe_math_optimizations)
      {
        /* We don't just emit a gen_neon_vcltv4sf_insn_unspec because
           we define gen_neon_vceqv4sf_insn_unspec only for float modes
           whereas this expander iterates over the integer modes as well,
           but we will never expand to UNSPECs for the integer comparisons.  */
        switch (V4SFmode)
          {
            case E_V2SFmode:
              emit_insn (gen_neon_vcltv2sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            case E_V4SFmode:
              emit_insn (gen_neon_vcltv4sf_insn_unspec (operands[0],
                                                              operands[1],
                                                              operands[2]));
              break;
            default:
              gcc_unreachable ();
          }
      }
    else
      emit_insn (gen_neon_vcltv4sf_insn (operands[0],
                                                 operands[1],
                                                 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V4SImode,
	gen_rtx_LT (V4SFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2355 */
rtx
gen_neon_vceqv8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2362 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
     are enabled.  */
  if (GET_MODE_CLASS (V8HFmode) == MODE_VECTOR_FLOAT
      && !flag_unsafe_math_optimizations)
    emit_insn
      (gen_neon_vceqv8hf_fp16insn_unspec
       (operands[0], operands[1], operands[2]));
  else
    emit_insn
      (gen_neon_vceqv8hf_fp16insn
       (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V8HImode,
	gen_rtx_EQ (V8HFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2355 */
rtx
gen_neon_vcgtv8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2362 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
     are enabled.  */
  if (GET_MODE_CLASS (V8HFmode) == MODE_VECTOR_FLOAT
      && !flag_unsafe_math_optimizations)
    emit_insn
      (gen_neon_vcgtv8hf_fp16insn_unspec
       (operands[0], operands[1], operands[2]));
  else
    emit_insn
      (gen_neon_vcgtv8hf_fp16insn
       (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V8HImode,
	gen_rtx_GT (V8HFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2355 */
rtx
gen_neon_vcgev8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2362 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
     are enabled.  */
  if (GET_MODE_CLASS (V8HFmode) == MODE_VECTOR_FLOAT
      && !flag_unsafe_math_optimizations)
    emit_insn
      (gen_neon_vcgev8hf_fp16insn_unspec
       (operands[0], operands[1], operands[2]));
  else
    emit_insn
      (gen_neon_vcgev8hf_fp16insn
       (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V8HImode,
	gen_rtx_GE (V8HFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2355 */
rtx
gen_neon_vclev8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2362 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
     are enabled.  */
  if (GET_MODE_CLASS (V8HFmode) == MODE_VECTOR_FLOAT
      && !flag_unsafe_math_optimizations)
    emit_insn
      (gen_neon_vclev8hf_fp16insn_unspec
       (operands[0], operands[1], operands[2]));
  else
    emit_insn
      (gen_neon_vclev8hf_fp16insn
       (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V8HImode,
	gen_rtx_LE (V8HFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2355 */
rtx
gen_neon_vcltv8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2362 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
     are enabled.  */
  if (GET_MODE_CLASS (V8HFmode) == MODE_VECTOR_FLOAT
      && !flag_unsafe_math_optimizations)
    emit_insn
      (gen_neon_vcltv8hf_fp16insn_unspec
       (operands[0], operands[1], operands[2]));
  else
    emit_insn
      (gen_neon_vcltv8hf_fp16insn
       (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V8HImode,
	gen_rtx_LT (V8HFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2355 */
rtx
gen_neon_vceqv4hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2362 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
     are enabled.  */
  if (GET_MODE_CLASS (V4HFmode) == MODE_VECTOR_FLOAT
      && !flag_unsafe_math_optimizations)
    emit_insn
      (gen_neon_vceqv4hf_fp16insn_unspec
       (operands[0], operands[1], operands[2]));
  else
    emit_insn
      (gen_neon_vceqv4hf_fp16insn
       (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V4HImode,
	gen_rtx_EQ (V4HFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2355 */
rtx
gen_neon_vcgtv4hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2362 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
     are enabled.  */
  if (GET_MODE_CLASS (V4HFmode) == MODE_VECTOR_FLOAT
      && !flag_unsafe_math_optimizations)
    emit_insn
      (gen_neon_vcgtv4hf_fp16insn_unspec
       (operands[0], operands[1], operands[2]));
  else
    emit_insn
      (gen_neon_vcgtv4hf_fp16insn
       (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V4HImode,
	gen_rtx_GT (V4HFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2355 */
rtx
gen_neon_vcgev4hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2362 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
     are enabled.  */
  if (GET_MODE_CLASS (V4HFmode) == MODE_VECTOR_FLOAT
      && !flag_unsafe_math_optimizations)
    emit_insn
      (gen_neon_vcgev4hf_fp16insn_unspec
       (operands[0], operands[1], operands[2]));
  else
    emit_insn
      (gen_neon_vcgev4hf_fp16insn
       (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V4HImode,
	gen_rtx_GE (V4HFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2355 */
rtx
gen_neon_vclev4hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2362 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
     are enabled.  */
  if (GET_MODE_CLASS (V4HFmode) == MODE_VECTOR_FLOAT
      && !flag_unsafe_math_optimizations)
    emit_insn
      (gen_neon_vclev4hf_fp16insn_unspec
       (operands[0], operands[1], operands[2]));
  else
    emit_insn
      (gen_neon_vclev4hf_fp16insn
       (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V4HImode,
	gen_rtx_LE (V4HFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2355 */
rtx
gen_neon_vcltv4hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2362 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
     are enabled.  */
  if (GET_MODE_CLASS (V4HFmode) == MODE_VECTOR_FLOAT
      && !flag_unsafe_math_optimizations)
    emit_insn
      (gen_neon_vcltv4hf_fp16insn_unspec
       (operands[0], operands[1], operands[2]));
  else
    emit_insn
      (gen_neon_vcltv4hf_fp16insn
       (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_NEG (V4HImode,
	gen_rtx_LT (V4HFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2432 */
rtx
gen_neon_vcagtv2sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2439 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    if (flag_unsafe_math_optimizations)
      emit_insn (gen_neon_vcagtv2sf_insn (operands[0], operands[1],
                                                  operands[2]));
    else
      emit_insn (gen_neon_vcagtv2sf_insn_unspec (operands[0],
                                                         operands[1],
                                                         operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_GT (V2SImode,
	gen_rtx_ABS (V2SFmode,
	operand1),
	gen_rtx_ABS (V2SFmode,
	operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2432 */
rtx
gen_neon_vcagev2sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2439 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    if (flag_unsafe_math_optimizations)
      emit_insn (gen_neon_vcagev2sf_insn (operands[0], operands[1],
                                                  operands[2]));
    else
      emit_insn (gen_neon_vcagev2sf_insn_unspec (operands[0],
                                                         operands[1],
                                                         operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_GE (V2SImode,
	gen_rtx_ABS (V2SFmode,
	operand1),
	gen_rtx_ABS (V2SFmode,
	operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2432 */
rtx
gen_neon_vcaltv2sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2439 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    if (flag_unsafe_math_optimizations)
      emit_insn (gen_neon_vcaltv2sf_insn (operands[0], operands[1],
                                                  operands[2]));
    else
      emit_insn (gen_neon_vcaltv2sf_insn_unspec (operands[0],
                                                         operands[1],
                                                         operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_LT (V2SImode,
	gen_rtx_ABS (V2SFmode,
	operand1),
	gen_rtx_ABS (V2SFmode,
	operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2432 */
rtx
gen_neon_vcalev2sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2439 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    if (flag_unsafe_math_optimizations)
      emit_insn (gen_neon_vcalev2sf_insn (operands[0], operands[1],
                                                  operands[2]));
    else
      emit_insn (gen_neon_vcalev2sf_insn_unspec (operands[0],
                                                         operands[1],
                                                         operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_LE (V2SImode,
	gen_rtx_ABS (V2SFmode,
	operand1),
	gen_rtx_ABS (V2SFmode,
	operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2432 */
rtx
gen_neon_vcagtv4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2439 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    if (flag_unsafe_math_optimizations)
      emit_insn (gen_neon_vcagtv4sf_insn (operands[0], operands[1],
                                                  operands[2]));
    else
      emit_insn (gen_neon_vcagtv4sf_insn_unspec (operands[0],
                                                         operands[1],
                                                         operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_GT (V4SImode,
	gen_rtx_ABS (V4SFmode,
	operand1),
	gen_rtx_ABS (V4SFmode,
	operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2432 */
rtx
gen_neon_vcagev4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2439 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    if (flag_unsafe_math_optimizations)
      emit_insn (gen_neon_vcagev4sf_insn (operands[0], operands[1],
                                                  operands[2]));
    else
      emit_insn (gen_neon_vcagev4sf_insn_unspec (operands[0],
                                                         operands[1],
                                                         operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_GE (V4SImode,
	gen_rtx_ABS (V4SFmode,
	operand1),
	gen_rtx_ABS (V4SFmode,
	operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2432 */
rtx
gen_neon_vcaltv4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2439 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    if (flag_unsafe_math_optimizations)
      emit_insn (gen_neon_vcaltv4sf_insn (operands[0], operands[1],
                                                  operands[2]));
    else
      emit_insn (gen_neon_vcaltv4sf_insn_unspec (operands[0],
                                                         operands[1],
                                                         operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_LT (V4SImode,
	gen_rtx_ABS (V4SFmode,
	operand1),
	gen_rtx_ABS (V4SFmode,
	operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2432 */
rtx
gen_neon_vcalev4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2439 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    if (flag_unsafe_math_optimizations)
      emit_insn (gen_neon_vcalev4sf_insn (operands[0], operands[1],
                                                  operands[2]));
    else
      emit_insn (gen_neon_vcalev4sf_insn_unspec (operands[0],
                                                         operands[1],
                                                         operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_LE (V4SImode,
	gen_rtx_ABS (V4SFmode,
	operand1),
	gen_rtx_ABS (V4SFmode,
	operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2472 */
rtx
gen_neon_vcagtv8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2480 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (flag_unsafe_math_optimizations)
    emit_insn (gen_neon_vcagtv8hf_fp16insn
	       (operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vcagtv8hf_fp16insn_unspec
	       (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_GT (V8HImode,
	gen_rtx_ABS (V8HFmode,
	operand1),
	gen_rtx_ABS (V8HFmode,
	operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2472 */
rtx
gen_neon_vcagev8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2480 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (flag_unsafe_math_optimizations)
    emit_insn (gen_neon_vcagev8hf_fp16insn
	       (operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vcagev8hf_fp16insn_unspec
	       (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_GE (V8HImode,
	gen_rtx_ABS (V8HFmode,
	operand1),
	gen_rtx_ABS (V8HFmode,
	operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2472 */
rtx
gen_neon_vcaltv8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2480 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (flag_unsafe_math_optimizations)
    emit_insn (gen_neon_vcaltv8hf_fp16insn
	       (operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vcaltv8hf_fp16insn_unspec
	       (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_LT (V8HImode,
	gen_rtx_ABS (V8HFmode,
	operand1),
	gen_rtx_ABS (V8HFmode,
	operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2472 */
rtx
gen_neon_vcalev8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2480 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (flag_unsafe_math_optimizations)
    emit_insn (gen_neon_vcalev8hf_fp16insn
	       (operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vcalev8hf_fp16insn_unspec
	       (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_LE (V8HImode,
	gen_rtx_ABS (V8HFmode,
	operand1),
	gen_rtx_ABS (V8HFmode,
	operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2472 */
rtx
gen_neon_vcagtv4hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2480 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (flag_unsafe_math_optimizations)
    emit_insn (gen_neon_vcagtv4hf_fp16insn
	       (operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vcagtv4hf_fp16insn_unspec
	       (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_GT (V4HImode,
	gen_rtx_ABS (V4HFmode,
	operand1),
	gen_rtx_ABS (V4HFmode,
	operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2472 */
rtx
gen_neon_vcagev4hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2480 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (flag_unsafe_math_optimizations)
    emit_insn (gen_neon_vcagev4hf_fp16insn
	       (operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vcagev4hf_fp16insn_unspec
	       (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_GE (V4HImode,
	gen_rtx_ABS (V4HFmode,
	operand1),
	gen_rtx_ABS (V4HFmode,
	operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2472 */
rtx
gen_neon_vcaltv4hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2480 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (flag_unsafe_math_optimizations)
    emit_insn (gen_neon_vcaltv4hf_fp16insn
	       (operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vcaltv4hf_fp16insn_unspec
	       (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_LT (V4HImode,
	gen_rtx_ABS (V4HFmode,
	operand1),
	gen_rtx_ABS (V4HFmode,
	operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2472 */
rtx
gen_neon_vcalev4hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2480 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (flag_unsafe_math_optimizations)
    emit_insn (gen_neon_vcalev4hf_fp16insn
	       (operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_neon_vcalev4hf_fp16insn_unspec
	       (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_LE (V4HImode,
	gen_rtx_ABS (V4HFmode,
	operand1),
	gen_rtx_ABS (V4HFmode,
	operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2513 */
rtx
gen_neon_vceqzv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2520 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vceqv8hf (operands[0], operands[1],
					CONST0_RTX (V8HFmode)));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_EQ (V8HImode,
	operand1,
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2513 */
rtx
gen_neon_vcgtzv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2520 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vcgtv8hf (operands[0], operands[1],
					CONST0_RTX (V8HFmode)));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_GT (V8HImode,
	operand1,
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2513 */
rtx
gen_neon_vcgezv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2520 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vcgev8hf (operands[0], operands[1],
					CONST0_RTX (V8HFmode)));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_GE (V8HImode,
	operand1,
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2513 */
rtx
gen_neon_vclezv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2520 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vclev8hf (operands[0], operands[1],
					CONST0_RTX (V8HFmode)));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LE (V8HImode,
	operand1,
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2513 */
rtx
gen_neon_vcltzv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2520 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vcltv8hf (operands[0], operands[1],
					CONST0_RTX (V8HFmode)));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LT (V8HImode,
	operand1,
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2513 */
rtx
gen_neon_vceqzv4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2520 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vceqv4hf (operands[0], operands[1],
					CONST0_RTX (V4HFmode)));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_EQ (V4HImode,
	operand1,
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2513 */
rtx
gen_neon_vcgtzv4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2520 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vcgtv4hf (operands[0], operands[1],
					CONST0_RTX (V4HFmode)));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_GT (V4HImode,
	operand1,
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2513 */
rtx
gen_neon_vcgezv4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2520 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vcgev4hf (operands[0], operands[1],
					CONST0_RTX (V4HFmode)));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_GE (V4HImode,
	operand1,
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2513 */
rtx
gen_neon_vclezv4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2520 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vclev4hf (operands[0], operands[1],
					CONST0_RTX (V4HFmode)));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LE (V4HImode,
	operand1,
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2513 */
rtx
gen_neon_vcltzv4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2520 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vcltv4hf (operands[0], operands[1],
					CONST0_RTX (V4HFmode)));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LT (V4HImode,
	operand1,
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2601 */
rtx
gen_ssadv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2607 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    rtx reduc = gen_reg_rtx (V8HImode);
    rtx op1_highpart = gen_reg_rtx (V8QImode);
    rtx op2_highpart = gen_reg_rtx (V8QImode);

    emit_insn (gen_neon_vabdlsv8qi (reduc,
                                        gen_lowpart (V8QImode, operands[1]),
                                        gen_lowpart (V8QImode, operands[2])));

    emit_insn (gen_neon_vget_highv16qi (op1_highpart, operands[1]));
    emit_insn (gen_neon_vget_highv16qi (op2_highpart, operands[2]));
    emit_insn (gen_neon_vabalsv8qi (reduc, reduc,
                                        op1_highpart, op2_highpart));
    emit_insn (gen_neon_vpadalsv8hi (operands[3], operands[3], reduc));

    emit_move_insn (operands[0], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		gen_rtx_USE (VOIDmode,
	operand1),
		gen_rtx_USE (VOIDmode,
	operand2)),
	146));
  emit_insn (gen_rtx_USE (VOIDmode,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2601 */
rtx
gen_usadv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2607 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    rtx reduc = gen_reg_rtx (V8HImode);
    rtx op1_highpart = gen_reg_rtx (V8QImode);
    rtx op2_highpart = gen_reg_rtx (V8QImode);

    emit_insn (gen_neon_vabdluv8qi (reduc,
                                        gen_lowpart (V8QImode, operands[1]),
                                        gen_lowpart (V8QImode, operands[2])));

    emit_insn (gen_neon_vget_highv16qi (op1_highpart, operands[1]));
    emit_insn (gen_neon_vget_highv16qi (op2_highpart, operands[2]));
    emit_insn (gen_neon_vabaluv8qi (reduc, reduc,
                                        op1_highpart, op2_highpart));
    emit_insn (gen_neon_vpadaluv8hi (operands[3], operands[3], reduc));

    emit_move_insn (operands[0], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		gen_rtx_USE (VOIDmode,
	operand1),
		gen_rtx_USE (VOIDmode,
	operand2)),
	147));
  emit_insn (gen_rtx_USE (VOIDmode,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2703 */
rtx
gen_neon_vpaddv8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2708 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vpadd_internalv8qi (operands[0], operands[1],
					    operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2703 */
rtx
gen_neon_vpaddv4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2708 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vpadd_internalv4hi (operands[0], operands[1],
					    operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2703 */
rtx
gen_neon_vpaddv2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2708 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vpadd_internalv2si (operands[0], operands[1],
					    operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2703 */
rtx
gen_neon_vpaddv2sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2708 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vpadd_internalv2sf (operands[0], operands[1],
					    operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2795 */
rtx
gen_neon_vabsv8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2799 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_absv8qi2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2795 */
rtx
gen_neon_vabsv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2799 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_absv16qi2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2795 */
rtx
gen_neon_vabsv4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2799 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_absv4hi2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2795 */
rtx
gen_neon_vabsv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2799 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_absv8hi2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2795 */
rtx
gen_neon_vabsv2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2799 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_absv2si2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2795 */
rtx
gen_neon_vabsv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2799 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_absv4si2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2795 */
rtx
gen_neon_vabsv2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2799 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_absv2sf2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2795 */
rtx
gen_neon_vabsv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2799 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_absv4sf2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2821 */
rtx
gen_neon_vnegv8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2825 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_negv8qi2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2821 */
rtx
gen_neon_vnegv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2825 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_negv16qi2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2821 */
rtx
gen_neon_vnegv4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2825 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_negv4hi2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2821 */
rtx
gen_neon_vnegv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2825 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_negv8hi2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2821 */
rtx
gen_neon_vnegv2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2825 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_negv2si2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2821 */
rtx
gen_neon_vnegv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2825 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_negv4si2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2821 */
rtx
gen_neon_vnegv2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2825 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_negv2sf2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2821 */
rtx
gen_neon_vnegv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2825 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_negv4sf2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2906 */
rtx
gen_cmulv2sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmulv2sf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2912 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx res1 = gen_reg_rtx (V2SFmode);
  rtx tmp = force_reg (V2SFmode, CONST0_RTX (V2SFmode));
  emit_insn (gen_neon_vcmla0v2sf (res1, tmp,
					      operands[2], operands[1]));
  emit_insn (gen_neon_vcmla90v2sf (operands[0], res1,
					      operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	376)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2906 */
rtx
gen_cmul_conjv2sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmul_conjv2sf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2912 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx res1 = gen_reg_rtx (V2SFmode);
  rtx tmp = force_reg (V2SFmode, CONST0_RTX (V2SFmode));
  emit_insn (gen_neon_vcmla0v2sf (res1, tmp,
					      operands[2], operands[1]));
  emit_insn (gen_neon_vcmla270v2sf (operands[0], res1,
					      operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	380)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2906 */
rtx
gen_cmulv4hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmulv4hf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2912 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx res1 = gen_reg_rtx (V4HFmode);
  rtx tmp = force_reg (V4HFmode, CONST0_RTX (V4HFmode));
  emit_insn (gen_neon_vcmla0v4hf (res1, tmp,
					      operands[2], operands[1]));
  emit_insn (gen_neon_vcmla90v4hf (operands[0], res1,
					      operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	376)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2906 */
rtx
gen_cmul_conjv4hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmul_conjv4hf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2912 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx res1 = gen_reg_rtx (V4HFmode);
  rtx tmp = force_reg (V4HFmode, CONST0_RTX (V4HFmode));
  emit_insn (gen_neon_vcmla0v4hf (res1, tmp,
					      operands[2], operands[1]));
  emit_insn (gen_neon_vcmla270v4hf (operands[0], res1,
					      operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	380)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2956 */
rtx
gen_neon_sdotv8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	362),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2956 */
rtx
gen_neon_udotv8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	363),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2956 */
rtx
gen_neon_sdotv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	362),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:2956 */
rtx
gen_neon_udotv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	363),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3066 */
rtx
gen_usdot_prodv8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	364),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3066 */
rtx
gen_usdot_prodv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	364),
	operand3));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3077 */
rtx
gen_copysignv2sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"copysignv2sf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3082 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
     rtx v_bitmask_cast;
     rtx v_bitmask = gen_reg_rtx (V2SImode);
     rtx c = gen_int_mode (0x80000000, SImode);

     emit_move_insn (v_bitmask,
		     gen_const_vec_duplicate (V2SImode, c));
     emit_move_insn (operands[0], operands[2]);
     v_bitmask_cast = simplify_gen_subreg (V2SFmode, v_bitmask,
					   V2SImode, 0);
     emit_insn (gen_neon_vbslv2sf (operands[0], v_bitmask_cast, operands[0],
				     operands[1]));

     DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3077 */
rtx
gen_copysignv4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"copysignv4sf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3082 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
     rtx v_bitmask_cast;
     rtx v_bitmask = gen_reg_rtx (V4SImode);
     rtx c = gen_int_mode (0x80000000, SImode);

     emit_move_insn (v_bitmask,
		     gen_const_vec_duplicate (V4SImode, c));
     emit_move_insn (operands[0], operands[2]);
     v_bitmask_cast = simplify_gen_subreg (V4SFmode, v_bitmask,
					   V4SImode, 0);
     emit_insn (gen_neon_vbslv4sf (operands[0], v_bitmask_cast, operands[0],
				     operands[1]));

     DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3133 */
rtx
gen_neon_vcntv8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3137 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_popcountv8qi2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3133 */
rtx
gen_neon_vcntv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3137 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_popcountv16qi2 (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3169 */
rtx
gen_neon_vmvnv8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3173 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_one_cmplv8qi2_neon (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3169 */
rtx
gen_neon_vmvnv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3173 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_one_cmplv16qi2_neon (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3169 */
rtx
gen_neon_vmvnv4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3173 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_one_cmplv4hi2_neon (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3169 */
rtx
gen_neon_vmvnv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3173 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_one_cmplv8hi2_neon (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3169 */
rtx
gen_neon_vmvnv2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3173 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_one_cmplv2si2_neon (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3169 */
rtx
gen_neon_vmvnv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3173 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_one_cmplv4si2_neon (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3270 */
rtx
gen_neon_vget_lanev8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3275 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      /* The intrinsics are defined in terms of a model where the
	 element ordering in memory is vldm order, whereas the generic
	 RTL is defined in terms of a model where the element ordering
	 in memory is array order.  Convert the lane number to conform
	 to this model.  */
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V8QImode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }

  if (GET_MODE_UNIT_BITSIZE (V8QImode) == 32)
    emit_insn (gen_vec_extractv8qiqi (operands[0], operands[1],
						operands[2]));
  else
    emit_insn (gen_neon_vget_lanev8qi_sext_internal (operands[0],
						       operands[1],
						       operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3270 */
rtx
gen_neon_vget_lanev16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3275 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      /* The intrinsics are defined in terms of a model where the
	 element ordering in memory is vldm order, whereas the generic
	 RTL is defined in terms of a model where the element ordering
	 in memory is array order.  Convert the lane number to conform
	 to this model.  */
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V16QImode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }

  if (GET_MODE_UNIT_BITSIZE (V16QImode) == 32)
    emit_insn (gen_vec_extractv16qiqi (operands[0], operands[1],
						operands[2]));
  else
    emit_insn (gen_neon_vget_lanev16qi_sext_internal (operands[0],
						       operands[1],
						       operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3270 */
rtx
gen_neon_vget_lanev4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3275 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      /* The intrinsics are defined in terms of a model where the
	 element ordering in memory is vldm order, whereas the generic
	 RTL is defined in terms of a model where the element ordering
	 in memory is array order.  Convert the lane number to conform
	 to this model.  */
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V4HImode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }

  if (GET_MODE_UNIT_BITSIZE (V4HImode) == 32)
    emit_insn (gen_vec_extractv4hihi (operands[0], operands[1],
						operands[2]));
  else
    emit_insn (gen_neon_vget_lanev4hi_sext_internal (operands[0],
						       operands[1],
						       operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3270 */
rtx
gen_neon_vget_lanev8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3275 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      /* The intrinsics are defined in terms of a model where the
	 element ordering in memory is vldm order, whereas the generic
	 RTL is defined in terms of a model where the element ordering
	 in memory is array order.  Convert the lane number to conform
	 to this model.  */
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V8HImode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }

  if (GET_MODE_UNIT_BITSIZE (V8HImode) == 32)
    emit_insn (gen_vec_extractv8hihi (operands[0], operands[1],
						operands[2]));
  else
    emit_insn (gen_neon_vget_lanev8hi_sext_internal (operands[0],
						       operands[1],
						       operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3270 */
rtx
gen_neon_vget_lanev2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3275 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      /* The intrinsics are defined in terms of a model where the
	 element ordering in memory is vldm order, whereas the generic
	 RTL is defined in terms of a model where the element ordering
	 in memory is array order.  Convert the lane number to conform
	 to this model.  */
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V2SImode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }

  if (GET_MODE_UNIT_BITSIZE (V2SImode) == 32)
    emit_insn (gen_vec_extractv2sisi (operands[0], operands[1],
						operands[2]));
  else
    emit_insn (gen_neon_vget_lanev2si_sext_internal (operands[0],
						       operands[1],
						       operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3270 */
rtx
gen_neon_vget_lanev4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3275 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      /* The intrinsics are defined in terms of a model where the
	 element ordering in memory is vldm order, whereas the generic
	 RTL is defined in terms of a model where the element ordering
	 in memory is array order.  Convert the lane number to conform
	 to this model.  */
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V4SImode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }

  if (GET_MODE_UNIT_BITSIZE (V4SImode) == 32)
    emit_insn (gen_vec_extractv4sisi (operands[0], operands[1],
						operands[2]));
  else
    emit_insn (gen_neon_vget_lanev4si_sext_internal (operands[0],
						       operands[1],
						       operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3270 */
rtx
gen_neon_vget_lanev2sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3275 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      /* The intrinsics are defined in terms of a model where the
	 element ordering in memory is vldm order, whereas the generic
	 RTL is defined in terms of a model where the element ordering
	 in memory is array order.  Convert the lane number to conform
	 to this model.  */
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V2SFmode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }

  if (GET_MODE_UNIT_BITSIZE (V2SFmode) == 32)
    emit_insn (gen_vec_extractv2sfsf (operands[0], operands[1],
						operands[2]));
  else
    emit_insn (gen_neon_vget_lanev2sf_sext_internal (operands[0],
						       operands[1],
						       operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3270 */
rtx
gen_neon_vget_lanev4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3275 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      /* The intrinsics are defined in terms of a model where the
	 element ordering in memory is vldm order, whereas the generic
	 RTL is defined in terms of a model where the element ordering
	 in memory is array order.  Convert the lane number to conform
	 to this model.  */
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V4SFmode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }

  if (GET_MODE_UNIT_BITSIZE (V4SFmode) == 32)
    emit_insn (gen_vec_extractv4sfsf (operands[0], operands[1],
						operands[2]));
  else
    emit_insn (gen_neon_vget_lanev4sf_sext_internal (operands[0],
						       operands[1],
						       operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3300 */
rtx
gen_neon_vget_laneuv8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3305 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      /* The intrinsics are defined in terms of a model where the
	 element ordering in memory is vldm order, whereas the generic
	 RTL is defined in terms of a model where the element ordering
	 in memory is array order.  Convert the lane number to conform
	 to this model.  */
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V8QImode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }

  if (GET_MODE_UNIT_BITSIZE (V8QImode) == 32)
    emit_insn (gen_vec_extractv8qiqi (operands[0], operands[1],
						operands[2]));
  else
    emit_insn (gen_neon_vget_lanev8qi_zext_internal (operands[0],
						       operands[1],
						       operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3300 */
rtx
gen_neon_vget_laneuv16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3305 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      /* The intrinsics are defined in terms of a model where the
	 element ordering in memory is vldm order, whereas the generic
	 RTL is defined in terms of a model where the element ordering
	 in memory is array order.  Convert the lane number to conform
	 to this model.  */
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V16QImode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }

  if (GET_MODE_UNIT_BITSIZE (V16QImode) == 32)
    emit_insn (gen_vec_extractv16qiqi (operands[0], operands[1],
						operands[2]));
  else
    emit_insn (gen_neon_vget_lanev16qi_zext_internal (operands[0],
						       operands[1],
						       operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3300 */
rtx
gen_neon_vget_laneuv4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3305 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      /* The intrinsics are defined in terms of a model where the
	 element ordering in memory is vldm order, whereas the generic
	 RTL is defined in terms of a model where the element ordering
	 in memory is array order.  Convert the lane number to conform
	 to this model.  */
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V4HImode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }

  if (GET_MODE_UNIT_BITSIZE (V4HImode) == 32)
    emit_insn (gen_vec_extractv4hihi (operands[0], operands[1],
						operands[2]));
  else
    emit_insn (gen_neon_vget_lanev4hi_zext_internal (operands[0],
						       operands[1],
						       operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3300 */
rtx
gen_neon_vget_laneuv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3305 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      /* The intrinsics are defined in terms of a model where the
	 element ordering in memory is vldm order, whereas the generic
	 RTL is defined in terms of a model where the element ordering
	 in memory is array order.  Convert the lane number to conform
	 to this model.  */
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V8HImode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }

  if (GET_MODE_UNIT_BITSIZE (V8HImode) == 32)
    emit_insn (gen_vec_extractv8hihi (operands[0], operands[1],
						operands[2]));
  else
    emit_insn (gen_neon_vget_lanev8hi_zext_internal (operands[0],
						       operands[1],
						       operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3300 */
rtx
gen_neon_vget_laneuv2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3305 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      /* The intrinsics are defined in terms of a model where the
	 element ordering in memory is vldm order, whereas the generic
	 RTL is defined in terms of a model where the element ordering
	 in memory is array order.  Convert the lane number to conform
	 to this model.  */
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V2SImode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }

  if (GET_MODE_UNIT_BITSIZE (V2SImode) == 32)
    emit_insn (gen_vec_extractv2sisi (operands[0], operands[1],
						operands[2]));
  else
    emit_insn (gen_neon_vget_lanev2si_zext_internal (operands[0],
						       operands[1],
						       operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3300 */
rtx
gen_neon_vget_laneuv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3305 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      /* The intrinsics are defined in terms of a model where the
	 element ordering in memory is vldm order, whereas the generic
	 RTL is defined in terms of a model where the element ordering
	 in memory is array order.  Convert the lane number to conform
	 to this model.  */
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V4SImode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }

  if (GET_MODE_UNIT_BITSIZE (V4SImode) == 32)
    emit_insn (gen_vec_extractv4sisi (operands[0], operands[1],
						operands[2]));
  else
    emit_insn (gen_neon_vget_lanev4si_zext_internal (operands[0],
						       operands[1],
						       operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3330 */
rtx
gen_neon_vget_lanedi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3335 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3340 */
rtx
gen_neon_vget_lanev2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3345 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  int lane;

if (BYTES_BIG_ENDIAN)
    {
      /* The intrinsics are defined in terms of a model where the
	 element ordering in memory is vldm order, whereas the generic
	 RTL is defined in terms of a model where the element ordering
	 in memory is array order.  Convert the lane number to conform
	 to this model.  */
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts = 2;
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }

  lane = INTVAL (operands[2]);
  gcc_assert ((lane ==0) || (lane == 1));
  emit_move_insn (operands[0], lane == 0
				? gen_lowpart (DImode, operands[1])
				: gen_highpart (DImode, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3369 */
rtx
gen_neon_vset_lanev8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3375 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  unsigned int elt = INTVAL (operands[3]);

  if (BYTES_BIG_ENDIAN)
    {
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V8QImode);
      elt ^= reg_nelts - 1;
    }

  emit_insn (gen_vec_setv8qi_internal (operands[0], operands[1],
                                         GEN_INT (1 << elt), operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3369 */
rtx
gen_neon_vset_lanev16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3375 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  unsigned int elt = INTVAL (operands[3]);

  if (BYTES_BIG_ENDIAN)
    {
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V16QImode);
      elt ^= reg_nelts - 1;
    }

  emit_insn (gen_vec_setv16qi_internal (operands[0], operands[1],
                                         GEN_INT (1 << elt), operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3369 */
rtx
gen_neon_vset_lanev4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3375 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  unsigned int elt = INTVAL (operands[3]);

  if (BYTES_BIG_ENDIAN)
    {
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V4HImode);
      elt ^= reg_nelts - 1;
    }

  emit_insn (gen_vec_setv4hi_internal (operands[0], operands[1],
                                         GEN_INT (1 << elt), operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3369 */
rtx
gen_neon_vset_lanev8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3375 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  unsigned int elt = INTVAL (operands[3]);

  if (BYTES_BIG_ENDIAN)
    {
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V8HImode);
      elt ^= reg_nelts - 1;
    }

  emit_insn (gen_vec_setv8hi_internal (operands[0], operands[1],
                                         GEN_INT (1 << elt), operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3369 */
rtx
gen_neon_vset_lanev2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3375 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  unsigned int elt = INTVAL (operands[3]);

  if (BYTES_BIG_ENDIAN)
    {
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V2SImode);
      elt ^= reg_nelts - 1;
    }

  emit_insn (gen_vec_setv2si_internal (operands[0], operands[1],
                                         GEN_INT (1 << elt), operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3369 */
rtx
gen_neon_vset_lanev4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3375 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  unsigned int elt = INTVAL (operands[3]);

  if (BYTES_BIG_ENDIAN)
    {
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V4SImode);
      elt ^= reg_nelts - 1;
    }

  emit_insn (gen_vec_setv4si_internal (operands[0], operands[1],
                                         GEN_INT (1 << elt), operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3369 */
rtx
gen_neon_vset_lanev4hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3375 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  unsigned int elt = INTVAL (operands[3]);

  if (BYTES_BIG_ENDIAN)
    {
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V4HFmode);
      elt ^= reg_nelts - 1;
    }

  emit_insn (gen_vec_setv4hf_internal (operands[0], operands[1],
                                         GEN_INT (1 << elt), operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3369 */
rtx
gen_neon_vset_lanev8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3375 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  unsigned int elt = INTVAL (operands[3]);

  if (BYTES_BIG_ENDIAN)
    {
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V8HFmode);
      elt ^= reg_nelts - 1;
    }

  emit_insn (gen_vec_setv8hf_internal (operands[0], operands[1],
                                         GEN_INT (1 << elt), operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3369 */
rtx
gen_neon_vset_lanev2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3375 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  unsigned int elt = INTVAL (operands[3]);

  if (BYTES_BIG_ENDIAN)
    {
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V2SFmode);
      elt ^= reg_nelts - 1;
    }

  emit_insn (gen_vec_setv2sf_internal (operands[0], operands[1],
                                         GEN_INT (1 << elt), operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3369 */
rtx
gen_neon_vset_lanev4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3375 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  unsigned int elt = INTVAL (operands[3]);

  if (BYTES_BIG_ENDIAN)
    {
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V4SFmode);
      elt ^= reg_nelts - 1;
    }

  emit_insn (gen_vec_setv4sf_internal (operands[0], operands[1],
                                         GEN_INT (1 << elt), operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3369 */
rtx
gen_neon_vset_lanev2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3375 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  unsigned int elt = INTVAL (operands[3]);

  if (BYTES_BIG_ENDIAN)
    {
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V2DImode);
      elt ^= reg_nelts - 1;
    }

  emit_insn (gen_vec_setv2di_internal (operands[0], operands[1],
                                         GEN_INT (1 << elt), operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3392 */
rtx
gen_neon_vset_lanedi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3398 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3403 */
rtx
gen_neon_vcreatev8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3407 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx src = gen_lowpart (V8QImode, operands[1]);
  emit_move_insn (operands[0], src);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3403 */
rtx
gen_neon_vcreatev4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3407 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx src = gen_lowpart (V4HImode, operands[1]);
  emit_move_insn (operands[0], src);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3403 */
rtx
gen_neon_vcreatev2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3407 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx src = gen_lowpart (V2SImode, operands[1]);
  emit_move_insn (operands[0], src);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3403 */
rtx
gen_neon_vcreatev2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3407 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx src = gen_lowpart (V2SFmode, operands[1]);
  emit_move_insn (operands[0], src);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3403 */
rtx
gen_neon_vcreatedi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3407 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx src = gen_lowpart (DImode, operands[1]);
  emit_move_insn (operands[0], src);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3463 */
rtx
gen_neon_vdup_ndi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3467 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3528 */
rtx
gen_neon_vdup_lanev8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3533 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V8QImode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }
    emit_insn (gen_neon_vdup_lanev8qi_internal (operands[0], operands[1],
                                                  operands[2]));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3528 */
rtx
gen_neon_vdup_lanev16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3533 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V8QImode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }
    emit_insn (gen_neon_vdup_lanev16qi_internal (operands[0], operands[1],
                                                  operands[2]));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3528 */
rtx
gen_neon_vdup_lanev4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3533 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V4HImode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }
    emit_insn (gen_neon_vdup_lanev4hi_internal (operands[0], operands[1],
                                                  operands[2]));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3528 */
rtx
gen_neon_vdup_lanev8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3533 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V4HImode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }
    emit_insn (gen_neon_vdup_lanev8hi_internal (operands[0], operands[1],
                                                  operands[2]));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3528 */
rtx
gen_neon_vdup_lanev2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3533 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V2SImode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }
    emit_insn (gen_neon_vdup_lanev2si_internal (operands[0], operands[1],
                                                  operands[2]));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3528 */
rtx
gen_neon_vdup_lanev4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3533 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V2SImode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }
    emit_insn (gen_neon_vdup_lanev4si_internal (operands[0], operands[1],
                                                  operands[2]));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3528 */
rtx
gen_neon_vdup_lanev2sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3533 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V2SFmode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }
    emit_insn (gen_neon_vdup_lanev2sf_internal (operands[0], operands[1],
                                                  operands[2]));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3528 */
rtx
gen_neon_vdup_lanev4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3533 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V2SFmode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }
    emit_insn (gen_neon_vdup_lanev4sf_internal (operands[0], operands[1],
                                                  operands[2]));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3547 */
rtx
gen_neon_vdup_lanev8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3552 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V4HFmode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }
  emit_insn (gen_neon_vdup_lanev8hf_internal (operands[0], operands[1],
						operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3547 */
rtx
gen_neon_vdup_lanev4hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3552 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V4HFmode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }
  emit_insn (gen_neon_vdup_lanev4hf_internal (operands[0], operands[1],
						operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3547 */
rtx
gen_neon_vdup_lanev4bf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3552 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V4BFmode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }
  emit_insn (gen_neon_vdup_lanev4bf_internal (operands[0], operands[1],
						operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3547 */
rtx
gen_neon_vdup_lanev8bf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3552 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      unsigned int elt = INTVAL (operands[2]);
      unsigned int reg_nelts
	= 64 / GET_MODE_UNIT_BITSIZE (V4BFmode);
      elt ^= reg_nelts - 1;
      operands[2] = GEN_INT (elt);
    }
  emit_insn (gen_neon_vdup_lanev8bf_internal (operands[0], operands[1],
						operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3567 */
rtx
gen_neon_vdup_lanedi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3572 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3578 */
rtx
gen_neon_vdup_lanev2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3583 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vdup_nv2di (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3606 */
extern rtx_insn *gen_split_154 (rtx_insn *, rtx *);
rtx_insn *
gen_split_154 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_154 (neon.md:3606)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3615 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  neon_split_vcombine (operands);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3606 */
extern rtx_insn *gen_split_155 (rtx_insn *, rtx *);
rtx_insn *
gen_split_155 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_155 (neon.md:3606)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3615 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  neon_split_vcombine (operands);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3606 */
extern rtx_insn *gen_split_156 (rtx_insn *, rtx *);
rtx_insn *
gen_split_156 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_156 (neon.md:3606)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3615 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  neon_split_vcombine (operands);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3606 */
extern rtx_insn *gen_split_157 (rtx_insn *, rtx *);
rtx_insn *
gen_split_157 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_157 (neon.md:3606)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3615 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  neon_split_vcombine (operands);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3606 */
extern rtx_insn *gen_split_158 (rtx_insn *, rtx *);
rtx_insn *
gen_split_158 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_158 (neon.md:3606)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3615 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  neon_split_vcombine (operands);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3606 */
extern rtx_insn *gen_split_159 (rtx_insn *, rtx *);
rtx_insn *
gen_split_159 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_159 (neon.md:3606)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3615 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  neon_split_vcombine (operands);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3606 */
extern rtx_insn *gen_split_160 (rtx_insn *, rtx *);
rtx_insn *
gen_split_160 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_160 (neon.md:3606)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3615 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  neon_split_vcombine (operands);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3622 */
rtx
gen_neon_vget_highv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3626 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (operands[0],
		  simplify_gen_subreg (V8QImode, operands[1], V16QImode,
				       GET_MODE_SIZE (V8QImode)));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3622 */
rtx
gen_neon_vget_highv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3626 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (operands[0],
		  simplify_gen_subreg (V4HImode, operands[1], V8HImode,
				       GET_MODE_SIZE (V4HImode)));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3622 */
rtx
gen_neon_vget_highv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3626 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (operands[0],
		  simplify_gen_subreg (V4HFmode, operands[1], V8HFmode,
				       GET_MODE_SIZE (V4HFmode)));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3622 */
rtx
gen_neon_vget_highv8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3626 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (operands[0],
		  simplify_gen_subreg (V4BFmode, operands[1], V8BFmode,
				       GET_MODE_SIZE (V4BFmode)));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3622 */
rtx
gen_neon_vget_highv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3626 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (operands[0],
		  simplify_gen_subreg (V2SImode, operands[1], V4SImode,
				       GET_MODE_SIZE (V2SImode)));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3622 */
rtx
gen_neon_vget_highv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3626 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (operands[0],
		  simplify_gen_subreg (V2SFmode, operands[1], V4SFmode,
				       GET_MODE_SIZE (V2SFmode)));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3622 */
rtx
gen_neon_vget_highv2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3626 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (operands[0],
		  simplify_gen_subreg (DImode, operands[1], V2DImode,
				       GET_MODE_SIZE (DImode)));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3633 */
rtx
gen_neon_vget_lowv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3637 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (operands[0],
		  simplify_gen_subreg (V8QImode, operands[1],
				       V16QImode, 0));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3633 */
rtx
gen_neon_vget_lowv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3637 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (operands[0],
		  simplify_gen_subreg (V4HImode, operands[1],
				       V8HImode, 0));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3633 */
rtx
gen_neon_vget_lowv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3637 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (operands[0],
		  simplify_gen_subreg (V4HFmode, operands[1],
				       V8HFmode, 0));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3633 */
rtx
gen_neon_vget_lowv8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3637 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (operands[0],
		  simplify_gen_subreg (V4BFmode, operands[1],
				       V8BFmode, 0));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3633 */
rtx
gen_neon_vget_lowv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3637 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (operands[0],
		  simplify_gen_subreg (V2SImode, operands[1],
				       V4SImode, 0));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3633 */
rtx
gen_neon_vget_lowv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3637 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (operands[0],
		  simplify_gen_subreg (V2SFmode, operands[1],
				       V4SFmode, 0));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:3633 */
rtx
gen_neon_vget_lowv2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3637 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_move_insn (operands[0],
		  simplify_gen_subreg (DImode, operands[1],
				       V2DImode, 0));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4109 */
rtx
gen_neon_vmul_nv4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4114 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V4HImode);
  emit_insn (gen_neon_vset_lanev4hi (tmp, operands[2], tmp, const0_rtx));
  emit_insn (gen_neon_vmul_lanev4hi (operands[0], operands[1], tmp,
				       const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4109 */
rtx
gen_neon_vmul_nv2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4114 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SImode);
  emit_insn (gen_neon_vset_lanev2si (tmp, operands[2], tmp, const0_rtx));
  emit_insn (gen_neon_vmul_lanev2si (operands[0], operands[1], tmp,
				       const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4109 */
rtx
gen_neon_vmul_nv2sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4114 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SFmode);
  emit_insn (gen_neon_vset_lanev2sf (tmp, operands[2], tmp, const0_rtx));
  emit_insn (gen_neon_vmul_lanev2sf (operands[0], operands[1], tmp,
				       const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4122 */
rtx
gen_neon_vmul_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4127 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V4HImode);
  emit_insn (gen_neon_vset_lanev4hi (tmp, operands[2], tmp, const0_rtx));
  emit_insn (gen_neon_vmul_lanev8hi (operands[0], operands[1], tmp,
				       const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4122 */
rtx
gen_neon_vmul_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4127 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SImode);
  emit_insn (gen_neon_vset_lanev2si (tmp, operands[2], tmp, const0_rtx));
  emit_insn (gen_neon_vmul_lanev4si (operands[0], operands[1], tmp,
				       const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4122 */
rtx
gen_neon_vmul_nv4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4127 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SFmode);
  emit_insn (gen_neon_vset_lanev2sf (tmp, operands[2], tmp, const0_rtx));
  emit_insn (gen_neon_vmul_lanev4sf (operands[0], operands[1], tmp,
				       const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4135 */
rtx
gen_neon_vmul_nv8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4140 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V4HFmode);
  emit_insn (gen_neon_vset_lanev4hf (tmp, operands[2], tmp, const0_rtx));
  emit_insn (gen_neon_vmul_lanev8hf (operands[0], operands[1], tmp,
				       const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4135 */
rtx
gen_neon_vmul_nv4hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4140 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V4HFmode);
  emit_insn (gen_neon_vset_lanev4hf (tmp, operands[2], tmp, const0_rtx));
  emit_insn (gen_neon_vmul_lanev4hf (operands[0], operands[1], tmp,
				       const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4148 */
rtx
gen_neon_vmulls_nv4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4153 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V4HImode);
  emit_insn (gen_neon_vset_lanev4hi (tmp, operands[2], tmp, const0_rtx));
  emit_insn (gen_neon_vmulls_lanev4hi (operands[0], operands[1], tmp,
					 const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4148 */
rtx
gen_neon_vmulls_nv2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4153 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SImode);
  emit_insn (gen_neon_vset_lanev2si (tmp, operands[2], tmp, const0_rtx));
  emit_insn (gen_neon_vmulls_lanev2si (operands[0], operands[1], tmp,
					 const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4161 */
rtx
gen_neon_vmullu_nv4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4166 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V4HImode);
  emit_insn (gen_neon_vset_lanev4hi (tmp, operands[2], tmp, const0_rtx));
  emit_insn (gen_neon_vmullu_lanev4hi (operands[0], operands[1], tmp,
					 const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4161 */
rtx
gen_neon_vmullu_nv2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4166 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SImode);
  emit_insn (gen_neon_vset_lanev2si (tmp, operands[2], tmp, const0_rtx));
  emit_insn (gen_neon_vmullu_lanev2si (operands[0], operands[1], tmp,
					 const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4174 */
rtx
gen_neon_vqdmull_nv4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4179 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V4HImode);
  emit_insn (gen_neon_vset_lanev4hi (tmp, operands[2], tmp, const0_rtx));
  emit_insn (gen_neon_vqdmull_lanev4hi (operands[0], operands[1], tmp,
				          const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4174 */
rtx
gen_neon_vqdmull_nv2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4179 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SImode);
  emit_insn (gen_neon_vset_lanev2si (tmp, operands[2], tmp, const0_rtx));
  emit_insn (gen_neon_vqdmull_lanev2si (operands[0], operands[1], tmp,
				          const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4187 */
rtx
gen_neon_vqdmulh_nv4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4192 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V4HImode);
  emit_insn (gen_neon_vset_lanev4hi (tmp, operands[2], tmp, const0_rtx));
  emit_insn (gen_neon_vqdmulh_lanev4hi (operands[0], operands[1], tmp,
				          const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4187 */
rtx
gen_neon_vqdmulh_nv2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4192 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SImode);
  emit_insn (gen_neon_vset_lanev2si (tmp, operands[2], tmp, const0_rtx));
  emit_insn (gen_neon_vqdmulh_lanev2si (operands[0], operands[1], tmp,
				          const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4200 */
rtx
gen_neon_vqrdmulh_nv4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4205 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V4HImode);
  emit_insn (gen_neon_vset_lanev4hi (tmp, operands[2], tmp, const0_rtx));
  emit_insn (gen_neon_vqrdmulh_lanev4hi (operands[0], operands[1], tmp,
				          const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4200 */
rtx
gen_neon_vqrdmulh_nv2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4205 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SImode);
  emit_insn (gen_neon_vset_lanev2si (tmp, operands[2], tmp, const0_rtx));
  emit_insn (gen_neon_vqrdmulh_lanev2si (operands[0], operands[1], tmp,
				          const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4213 */
rtx
gen_neon_vqdmulh_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4218 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V4HImode);
  emit_insn (gen_neon_vset_lanev4hi (tmp, operands[2], tmp, const0_rtx));
  emit_insn (gen_neon_vqdmulh_lanev8hi (operands[0], operands[1], tmp,
					  const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4213 */
rtx
gen_neon_vqdmulh_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4218 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SImode);
  emit_insn (gen_neon_vset_lanev2si (tmp, operands[2], tmp, const0_rtx));
  emit_insn (gen_neon_vqdmulh_lanev4si (operands[0], operands[1], tmp,
					  const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4226 */
rtx
gen_neon_vqrdmulh_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4231 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V4HImode);
  emit_insn (gen_neon_vset_lanev4hi (tmp, operands[2], tmp, const0_rtx));
  emit_insn (gen_neon_vqrdmulh_lanev8hi (operands[0], operands[1], tmp,
					   const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4226 */
rtx
gen_neon_vqrdmulh_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4231 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SImode);
  emit_insn (gen_neon_vset_lanev2si (tmp, operands[2], tmp, const0_rtx));
  emit_insn (gen_neon_vqrdmulh_lanev4si (operands[0], operands[1], tmp,
					   const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4239 */
rtx
gen_neon_vmla_nv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4245 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V4HImode);
  emit_insn (gen_neon_vset_lanev4hi (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vmla_lanev4hi (operands[0], operands[1], operands[2],
				       tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4239 */
rtx
gen_neon_vmla_nv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4245 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SImode);
  emit_insn (gen_neon_vset_lanev2si (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vmla_lanev2si (operands[0], operands[1], operands[2],
				       tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4239 */
rtx
gen_neon_vmla_nv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4245 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SFmode);
  emit_insn (gen_neon_vset_lanev2sf (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vmla_lanev2sf (operands[0], operands[1], operands[2],
				       tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4253 */
rtx
gen_neon_vmla_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4259 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V4HImode);
  emit_insn (gen_neon_vset_lanev4hi (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vmla_lanev8hi (operands[0], operands[1], operands[2],
				       tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4253 */
rtx
gen_neon_vmla_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4259 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SImode);
  emit_insn (gen_neon_vset_lanev2si (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vmla_lanev4si (operands[0], operands[1], operands[2],
				       tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4253 */
rtx
gen_neon_vmla_nv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4259 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SFmode);
  emit_insn (gen_neon_vset_lanev2sf (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vmla_lanev4sf (operands[0], operands[1], operands[2],
				       tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4267 */
rtx
gen_neon_vmlals_nv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4273 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V4HImode);
  emit_insn (gen_neon_vset_lanev4hi (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vmlals_lanev4hi (operands[0], operands[1], operands[2],
					 tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4267 */
rtx
gen_neon_vmlals_nv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4273 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SImode);
  emit_insn (gen_neon_vset_lanev2si (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vmlals_lanev2si (operands[0], operands[1], operands[2],
					 tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4281 */
rtx
gen_neon_vmlalu_nv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4287 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V4HImode);
  emit_insn (gen_neon_vset_lanev4hi (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vmlalu_lanev4hi (operands[0], operands[1], operands[2],
					 tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4281 */
rtx
gen_neon_vmlalu_nv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4287 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SImode);
  emit_insn (gen_neon_vset_lanev2si (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vmlalu_lanev2si (operands[0], operands[1], operands[2],
					 tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4295 */
rtx
gen_neon_vqdmlal_nv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4301 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V4HImode);
  emit_insn (gen_neon_vset_lanev4hi (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vqdmlal_lanev4hi (operands[0], operands[1], operands[2],
					  tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4295 */
rtx
gen_neon_vqdmlal_nv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4301 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SImode);
  emit_insn (gen_neon_vset_lanev2si (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vqdmlal_lanev2si (operands[0], operands[1], operands[2],
					  tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4309 */
rtx
gen_neon_vmls_nv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4315 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V4HImode);
  emit_insn (gen_neon_vset_lanev4hi (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vmls_lanev4hi (operands[0], operands[1], operands[2],
				       tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4309 */
rtx
gen_neon_vmls_nv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4315 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SImode);
  emit_insn (gen_neon_vset_lanev2si (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vmls_lanev2si (operands[0], operands[1], operands[2],
				       tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4309 */
rtx
gen_neon_vmls_nv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4315 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SFmode);
  emit_insn (gen_neon_vset_lanev2sf (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vmls_lanev2sf (operands[0], operands[1], operands[2],
				       tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4323 */
rtx
gen_neon_vmls_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4329 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V4HImode);
  emit_insn (gen_neon_vset_lanev4hi (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vmls_lanev8hi (operands[0], operands[1], operands[2],
				       tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4323 */
rtx
gen_neon_vmls_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4329 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SImode);
  emit_insn (gen_neon_vset_lanev2si (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vmls_lanev4si (operands[0], operands[1], operands[2],
				       tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4323 */
rtx
gen_neon_vmls_nv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4329 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SFmode);
  emit_insn (gen_neon_vset_lanev2sf (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vmls_lanev4sf (operands[0], operands[1], operands[2],
				       tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4337 */
rtx
gen_neon_vmlsls_nv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4343 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V4HImode);
  emit_insn (gen_neon_vset_lanev4hi (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vmlsls_lanev4hi (operands[0], operands[1], operands[2],
					tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4337 */
rtx
gen_neon_vmlsls_nv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4343 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SImode);
  emit_insn (gen_neon_vset_lanev2si (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vmlsls_lanev2si (operands[0], operands[1], operands[2],
					tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4351 */
rtx
gen_neon_vmlslu_nv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4357 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V4HImode);
  emit_insn (gen_neon_vset_lanev4hi (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vmlslu_lanev4hi (operands[0], operands[1], operands[2],
					tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4351 */
rtx
gen_neon_vmlslu_nv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4357 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SImode);
  emit_insn (gen_neon_vset_lanev2si (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vmlslu_lanev2si (operands[0], operands[1], operands[2],
					tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4365 */
rtx
gen_neon_vqdmlsl_nv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4371 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V4HImode);
  emit_insn (gen_neon_vset_lanev4hi (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vqdmlsl_lanev4hi (operands[0], operands[1], operands[2],
					  tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4365 */
rtx
gen_neon_vqdmlsl_nv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4371 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmp = gen_reg_rtx (V2SImode);
  emit_insn (gen_neon_vset_lanev2si (tmp, operands[3], tmp, const0_rtx));
  emit_insn (gen_neon_vqdmlsl_lanev2si (operands[0], operands[1], operands[2],
					  tmp, const0_rtx));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4442 */
rtx
gen_neon_vbslv8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4449 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* We can't alias operands together if they have different modes.  */
  operands[1] = gen_lowpart (V8QImode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4442 */
rtx
gen_neon_vbslv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4449 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* We can't alias operands together if they have different modes.  */
  operands[1] = gen_lowpart (V16QImode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4442 */
rtx
gen_neon_vbslv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4449 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* We can't alias operands together if they have different modes.  */
  operands[1] = gen_lowpart (V4HImode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4442 */
rtx
gen_neon_vbslv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4449 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* We can't alias operands together if they have different modes.  */
  operands[1] = gen_lowpart (V8HImode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4442 */
rtx
gen_neon_vbslv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4449 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* We can't alias operands together if they have different modes.  */
  operands[1] = gen_lowpart (V2SImode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4442 */
rtx
gen_neon_vbslv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4449 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* We can't alias operands together if they have different modes.  */
  operands[1] = gen_lowpart (V4SImode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4442 */
rtx
gen_neon_vbslv4hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4449 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* We can't alias operands together if they have different modes.  */
  operands[1] = gen_lowpart (V4HFmode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4442 */
rtx
gen_neon_vbslv8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4449 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* We can't alias operands together if they have different modes.  */
  operands[1] = gen_lowpart (V8HFmode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4442 */
rtx
gen_neon_vbslv4bf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4449 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* We can't alias operands together if they have different modes.  */
  operands[1] = gen_lowpart (V4BFmode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4442 */
rtx
gen_neon_vbslv8bf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4449 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* We can't alias operands together if they have different modes.  */
  operands[1] = gen_lowpart (V8BFmode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4442 */
rtx
gen_neon_vbslv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4449 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* We can't alias operands together if they have different modes.  */
  operands[1] = gen_lowpart (V2SFmode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4442 */
rtx
gen_neon_vbslv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4449 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* We can't alias operands together if they have different modes.  */
  operands[1] = gen_lowpart (V4SFmode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4442 */
rtx
gen_neon_vbsldi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4449 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* We can't alias operands together if they have different modes.  */
  operands[1] = gen_lowpart (DImode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4442 */
rtx
gen_neon_vbslv2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4449 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  /* We can't alias operands together if they have different modes.  */
  operands[1] = gen_lowpart (V2DImode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	160)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4705 */
extern rtx_insn *gen_split_161 (rtx_insn *, rtx *);
rtx_insn *
gen_split_161 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_161 (neon.md:4705)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4714 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx op0, op1, op2, part0, part2;
  unsigned ofs;

  op0 = operands[0];
  op1 = gen_lowpart (TImode, operands[1]);
  op2 = operands[2];

  ofs = subreg_lowpart_offset (V8QImode, V16QImode);
  part0 = simplify_subreg (V8QImode, op0, V16QImode, ofs);
  part2 = simplify_subreg (V8QImode, op2, V16QImode, ofs);
  emit_insn (gen_neon_vtbl2v8qi (part0, op1, part2));

  ofs = subreg_highpart_offset (V8QImode, V16QImode);
  part0 = simplify_subreg (V8QImode, op0, V16QImode, ofs);
  part2 = simplify_subreg (V8QImode, op2, V16QImode, ofs);
  emit_insn (gen_neon_vtbl2v8qi (part0, op1, part2));
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4736 */
extern rtx_insn *gen_split_162 (rtx_insn *, rtx *);
rtx_insn *
gen_split_162 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_162 (neon.md:4736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4745 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx op0, op1, op2, part0, part2;
  unsigned ofs;

  op0 = operands[0];
  op1 = operands[1];
  op2 = operands[2];

  ofs = subreg_lowpart_offset (V8QImode, V16QImode);
  part0 = simplify_subreg (V8QImode, op0, V16QImode, ofs);
  part2 = simplify_subreg (V8QImode, op2, V16QImode, ofs);
  emit_insn (gen_neon_vtbl2v8qi (part0, op1, part2));

  ofs = subreg_highpart_offset (V8QImode, V16QImode);
  part0 = simplify_subreg (V8QImode, op0, V16QImode, ofs);
  part2 = simplify_subreg (V8QImode, op2, V16QImode, ofs);
  emit_insn (gen_neon_vtbl2v8qi (part0, op1, part2));
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4771 */
extern rtx_insn *gen_split_163 (rtx_insn *, rtx *);
rtx_insn *
gen_split_163 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_163 (neon.md:4771)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4780 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  neon_split_vcombine (operands);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4867 */
rtx
gen_neon_vtrnv8qi_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	337)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	338))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4867 */
rtx
gen_neon_vtrnv16qi_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	337)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	338))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4867 */
rtx
gen_neon_vtrnv4hi_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	337)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	338))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4867 */
rtx
gen_neon_vtrnv8hi_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	337)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	338))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4867 */
rtx
gen_neon_vtrnv2si_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	337)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	338))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4867 */
rtx
gen_neon_vtrnv4si_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	337)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	338))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4867 */
rtx
gen_neon_vtrnv2sf_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	337)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	338))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4867 */
rtx
gen_neon_vtrnv4sf_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	337)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	338))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4867 */
rtx
gen_neon_vtrnv8hf_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	337)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	338))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4867 */
rtx
gen_neon_vtrnv4hf_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	337)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	338))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4893 */
rtx
gen_neon_vzipv8qi_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	342)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	343))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4893 */
rtx
gen_neon_vzipv16qi_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	342)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	343))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4893 */
rtx
gen_neon_vzipv4hi_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	342)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	343))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4893 */
rtx
gen_neon_vzipv8hi_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	342)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	343))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4893 */
rtx
gen_neon_vzipv2si_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	342)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	343))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4893 */
rtx
gen_neon_vzipv4si_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	342)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	343))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4893 */
rtx
gen_neon_vzipv2sf_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	342)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	343))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4893 */
rtx
gen_neon_vzipv4sf_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	342)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	343))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4893 */
rtx
gen_neon_vzipv8hf_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	342)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	343))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4893 */
rtx
gen_neon_vzipv4hf_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	342)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	343))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4919 */
rtx
gen_neon_vuzpv8qi_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	340)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	341))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4919 */
rtx
gen_neon_vuzpv16qi_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	340)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	341))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4919 */
rtx
gen_neon_vuzpv4hi_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	340)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	341))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4919 */
rtx
gen_neon_vuzpv8hi_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	340)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	341))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4919 */
rtx
gen_neon_vuzpv2si_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	340)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	341))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4919 */
rtx
gen_neon_vuzpv4si_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	340)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	341))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4919 */
rtx
gen_neon_vuzpv2sf_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	340)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	341))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4919 */
rtx
gen_neon_vuzpv4sf_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	340)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	341))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4919 */
rtx
gen_neon_vuzpv8hf_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	340)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	341))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4919 */
rtx
gen_neon_vuzpv4hf_internal (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	340)),
		gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	341))));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4945 */
rtx
gen_vec_load_lanesv8qiv8qi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4945 */
rtx
gen_vec_load_lanesv16qiv16qi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4945 */
rtx
gen_vec_load_lanesv4hiv4hi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4945 */
rtx
gen_vec_load_lanesv8hiv8hi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4945 */
rtx
gen_vec_load_lanesv2siv2si (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4945 */
rtx
gen_vec_load_lanesv4siv4si (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4945 */
rtx
gen_vec_load_lanesv4hfv4hf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4945 */
rtx
gen_vec_load_lanesv8hfv8hf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4945 */
rtx
gen_vec_load_lanesv4bfv4bf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4945 */
rtx
gen_vec_load_lanesv8bfv8bf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4945 */
rtx
gen_vec_load_lanesv2sfv2sf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4945 */
rtx
gen_vec_load_lanesv4sfv4sf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4945 */
rtx
gen_vec_load_lanesdidi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:4945 */
rtx
gen_vec_load_lanesv2div2di (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5020 */
rtx
gen_neon_vld1_dupdi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	198));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5038 */
extern rtx_insn *gen_split_164 (rtx_insn *, rtx *);
rtx_insn *
gen_split_164 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_164 (neon.md:5038)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5045 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    rtx tmprtx = gen_lowpart (DImode, operands[0]);
    emit_insn (gen_neon_vld1_dupdi (tmprtx, operands[1]));
    emit_move_insn (gen_highpart (DImode, operands[0]), tmprtx );
    DONE;
    }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5055 */
rtx
gen_vec_store_lanesv8qiv8qi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5055 */
rtx
gen_vec_store_lanesv16qiv16qi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5055 */
rtx
gen_vec_store_lanesv4hiv4hi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5055 */
rtx
gen_vec_store_lanesv8hiv8hi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5055 */
rtx
gen_vec_store_lanesv2siv2si (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5055 */
rtx
gen_vec_store_lanesv4siv4si (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5055 */
rtx
gen_vec_store_lanesv4hfv4hf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5055 */
rtx
gen_vec_store_lanesv8hfv8hf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5055 */
rtx
gen_vec_store_lanesv4bfv4bf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5055 */
rtx
gen_vec_store_lanesv8bfv8bf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5055 */
rtx
gen_vec_store_lanesv2sfv2sf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5055 */
rtx
gen_vec_store_lanesv4sfv4sf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5055 */
rtx
gen_vec_store_lanesdidi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5055 */
rtx
gen_vec_store_lanesv2div2di (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	315));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5118 */
rtx
gen_vec_load_lanestiv8qi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5118 */
rtx
gen_vec_load_lanestiv4hi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5118 */
rtx
gen_vec_load_lanestiv4hf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5118 */
rtx
gen_vec_load_lanestiv4bf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5118 */
rtx
gen_vec_load_lanestiv2si (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5118 */
rtx
gen_vec_load_lanestiv2sf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5118 */
rtx
gen_vec_load_lanestidi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	200));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5245 */
rtx
gen_vec_store_lanestiv8qi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5245 */
rtx
gen_vec_store_lanestiv4hi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5245 */
rtx
gen_vec_store_lanestiv4hf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5245 */
rtx
gen_vec_store_lanestiv4bf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5245 */
rtx
gen_vec_store_lanestiv2si (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5245 */
rtx
gen_vec_store_lanestiv2sf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5245 */
rtx
gen_vec_store_lanestidi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	317));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5334 */
rtx
gen_vec_load_laneseiv8qi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	203));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5334 */
rtx
gen_vec_load_laneseiv4hi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	203));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5334 */
rtx
gen_vec_load_laneseiv4hf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	203));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5334 */
rtx
gen_vec_load_laneseiv4bf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	203));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5334 */
rtx
gen_vec_load_laneseiv2si (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	203));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5334 */
rtx
gen_vec_load_laneseiv2sf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	203));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5334 */
rtx
gen_vec_load_laneseidi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	203));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5359 */
rtx
gen_vec_load_lanesciv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesciv16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vld3v16qi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5359 */
rtx
gen_vec_load_lanesciv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesciv8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vld3v8hi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5359 */
rtx
gen_vec_load_lanesciv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesciv8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vld3v8hf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5359 */
rtx
gen_vec_load_lanesciv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesciv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vld3v4si (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5359 */
rtx
gen_vec_load_lanesciv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesciv4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vld3v4sf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5369 */
rtx
gen_neon_vld3v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5374 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[1], EImode, 0);
  emit_insn (gen_neon_vld3qav16qi (operands[0], mem));
  mem = adjust_address (mem, EImode, GET_MODE_SIZE (EImode));
  emit_insn (gen_neon_vld3qbv16qi (operands[0], mem, operands[0]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5369 */
rtx
gen_neon_vld3v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5374 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[1], EImode, 0);
  emit_insn (gen_neon_vld3qav8hi (operands[0], mem));
  mem = adjust_address (mem, EImode, GET_MODE_SIZE (EImode));
  emit_insn (gen_neon_vld3qbv8hi (operands[0], mem, operands[0]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5369 */
rtx
gen_neon_vld3v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5374 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[1], EImode, 0);
  emit_insn (gen_neon_vld3qav8hf (operands[0], mem));
  mem = adjust_address (mem, EImode, GET_MODE_SIZE (EImode));
  emit_insn (gen_neon_vld3qbv8hf (operands[0], mem, operands[0]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5369 */
rtx
gen_neon_vld3v8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5374 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[1], EImode, 0);
  emit_insn (gen_neon_vld3qav8bf (operands[0], mem));
  mem = adjust_address (mem, EImode, GET_MODE_SIZE (EImode));
  emit_insn (gen_neon_vld3qbv8bf (operands[0], mem, operands[0]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5369 */
rtx
gen_neon_vld3v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5374 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[1], EImode, 0);
  emit_insn (gen_neon_vld3qav4si (operands[0], mem));
  mem = adjust_address (mem, EImode, GET_MODE_SIZE (EImode));
  emit_insn (gen_neon_vld3qbv4si (operands[0], mem, operands[0]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5369 */
rtx
gen_neon_vld3v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5374 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[1], EImode, 0);
  emit_insn (gen_neon_vld3qav4sf (operands[0], mem));
  mem = adjust_address (mem, EImode, GET_MODE_SIZE (EImode));
  emit_insn (gen_neon_vld3qbv4sf (operands[0], mem, operands[0]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5527 */
rtx
gen_vec_store_laneseiv8qi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	319));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5527 */
rtx
gen_vec_store_laneseiv4hi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	319));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5527 */
rtx
gen_vec_store_laneseiv4hf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	319));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5527 */
rtx
gen_vec_store_laneseiv4bf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	319));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5527 */
rtx
gen_vec_store_laneseiv2si (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	319));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5527 */
rtx
gen_vec_store_laneseiv2sf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	319));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5527 */
rtx
gen_vec_store_laneseidi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (EImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	319));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5551 */
rtx
gen_vec_store_lanesciv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesciv16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5556 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vst3v16qi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5551 */
rtx
gen_vec_store_lanesciv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesciv8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5556 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vst3v8hi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5551 */
rtx
gen_vec_store_lanesciv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesciv8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5556 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vst3v8hf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5551 */
rtx
gen_vec_store_lanesciv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesciv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5556 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vst3v4si (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5551 */
rtx
gen_vec_store_lanesciv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesciv4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5556 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vst3v4sf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5561 */
rtx
gen_neon_vst3v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5566 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[0], EImode, 0);
  emit_insn (gen_neon_vst3qav16qi (mem, operands[1]));
  mem = adjust_address (mem, EImode, GET_MODE_SIZE (EImode));
  emit_insn (gen_neon_vst3qbv16qi (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5561 */
rtx
gen_neon_vst3v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5566 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[0], EImode, 0);
  emit_insn (gen_neon_vst3qav8hi (mem, operands[1]));
  mem = adjust_address (mem, EImode, GET_MODE_SIZE (EImode));
  emit_insn (gen_neon_vst3qbv8hi (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5561 */
rtx
gen_neon_vst3v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5566 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[0], EImode, 0);
  emit_insn (gen_neon_vst3qav8hf (mem, operands[1]));
  mem = adjust_address (mem, EImode, GET_MODE_SIZE (EImode));
  emit_insn (gen_neon_vst3qbv8hf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5561 */
rtx
gen_neon_vst3v8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5566 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[0], EImode, 0);
  emit_insn (gen_neon_vst3qav8bf (mem, operands[1]));
  mem = adjust_address (mem, EImode, GET_MODE_SIZE (EImode));
  emit_insn (gen_neon_vst3qbv8bf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5561 */
rtx
gen_neon_vst3v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5566 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[0], EImode, 0);
  emit_insn (gen_neon_vst3qav4si (mem, operands[1]));
  mem = adjust_address (mem, EImode, GET_MODE_SIZE (EImode));
  emit_insn (gen_neon_vst3qbv4si (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5561 */
rtx
gen_neon_vst3v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5566 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[0], EImode, 0);
  emit_insn (gen_neon_vst3qav4sf (mem, operands[1]));
  mem = adjust_address (mem, EImode, GET_MODE_SIZE (EImode));
  emit_insn (gen_neon_vst3qbv4sf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5672 */
rtx
gen_vec_load_lanesoiv8qi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	208));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5672 */
rtx
gen_vec_load_lanesoiv4hi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	208));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5672 */
rtx
gen_vec_load_lanesoiv4hf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	208));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5672 */
rtx
gen_vec_load_lanesoiv4bf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	208));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5672 */
rtx
gen_vec_load_lanesoiv2si (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	208));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5672 */
rtx
gen_vec_load_lanesoiv2sf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	208));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5672 */
rtx
gen_vec_load_lanesoidi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	208));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5697 */
rtx
gen_neon_vld4v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5702 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[1], OImode, 0);
  emit_insn (gen_neon_vld4qav16qi (operands[0], mem));
  mem = adjust_address (mem, OImode, GET_MODE_SIZE (OImode));
  emit_insn (gen_neon_vld4qbv16qi (operands[0], mem, operands[0]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5697 */
rtx
gen_neon_vld4v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5702 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[1], OImode, 0);
  emit_insn (gen_neon_vld4qav8hi (operands[0], mem));
  mem = adjust_address (mem, OImode, GET_MODE_SIZE (OImode));
  emit_insn (gen_neon_vld4qbv8hi (operands[0], mem, operands[0]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5697 */
rtx
gen_neon_vld4v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5702 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[1], OImode, 0);
  emit_insn (gen_neon_vld4qav8hf (operands[0], mem));
  mem = adjust_address (mem, OImode, GET_MODE_SIZE (OImode));
  emit_insn (gen_neon_vld4qbv8hf (operands[0], mem, operands[0]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5697 */
rtx
gen_neon_vld4v8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5702 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[1], OImode, 0);
  emit_insn (gen_neon_vld4qav8bf (operands[0], mem));
  mem = adjust_address (mem, OImode, GET_MODE_SIZE (OImode));
  emit_insn (gen_neon_vld4qbv8bf (operands[0], mem, operands[0]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5697 */
rtx
gen_neon_vld4v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5702 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[1], OImode, 0);
  emit_insn (gen_neon_vld4qav4si (operands[0], mem));
  mem = adjust_address (mem, OImode, GET_MODE_SIZE (OImode));
  emit_insn (gen_neon_vld4qbv4si (operands[0], mem, operands[0]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5697 */
rtx
gen_neon_vld4v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5702 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[1], OImode, 0);
  emit_insn (gen_neon_vld4qav4sf (operands[0], mem));
  mem = adjust_address (mem, OImode, GET_MODE_SIZE (OImode));
  emit_insn (gen_neon_vld4qbv4sf (operands[0], mem, operands[0]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5863 */
rtx
gen_vec_store_lanesoiv8qi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	323));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5863 */
rtx
gen_vec_store_lanesoiv4hi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	323));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5863 */
rtx
gen_vec_store_lanesoiv4hf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	323));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5863 */
rtx
gen_vec_store_lanesoiv4bf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	323));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5863 */
rtx
gen_vec_store_lanesoiv2si (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	323));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5863 */
rtx
gen_vec_store_lanesoiv2sf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	323));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5863 */
rtx
gen_vec_store_lanesoidi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (OImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		const0_rtx),
	327)),
	323));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5888 */
rtx
gen_neon_vst4v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5893 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[0], OImode, 0);
  emit_insn (gen_neon_vst4qav16qi (mem, operands[1]));
  mem = adjust_address (mem, OImode, GET_MODE_SIZE (OImode));
  emit_insn (gen_neon_vst4qbv16qi (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5888 */
rtx
gen_neon_vst4v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5893 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[0], OImode, 0);
  emit_insn (gen_neon_vst4qav8hi (mem, operands[1]));
  mem = adjust_address (mem, OImode, GET_MODE_SIZE (OImode));
  emit_insn (gen_neon_vst4qbv8hi (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5888 */
rtx
gen_neon_vst4v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5893 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[0], OImode, 0);
  emit_insn (gen_neon_vst4qav8hf (mem, operands[1]));
  mem = adjust_address (mem, OImode, GET_MODE_SIZE (OImode));
  emit_insn (gen_neon_vst4qbv8hf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5888 */
rtx
gen_neon_vst4v8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5893 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[0], OImode, 0);
  emit_insn (gen_neon_vst4qav8bf (mem, operands[1]));
  mem = adjust_address (mem, OImode, GET_MODE_SIZE (OImode));
  emit_insn (gen_neon_vst4qbv8bf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5888 */
rtx
gen_neon_vst4v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5893 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[0], OImode, 0);
  emit_insn (gen_neon_vst4qav4si (mem, operands[1]));
  mem = adjust_address (mem, OImode, GET_MODE_SIZE (OImode));
  emit_insn (gen_neon_vst4qbv4si (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:5888 */
rtx
gen_neon_vst4v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5893 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx mem;

  mem = adjust_address (operands[0], OImode, 0);
  emit_insn (gen_neon_vst4qav4sf (mem, operands[1]));
  mem = adjust_address (mem, OImode, GET_MODE_SIZE (OImode));
  emit_insn (gen_neon_vst4qbv4sf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6023 */
rtx
gen_vec_unpacks_hi_v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6027 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (16/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (16/2); i++)
     RTVEC_ELT (v, i) = GEN_INT ((16/2) + i);
  
   t1 = gen_rtx_PARALLEL (V16QImode, v);
   emit_insn (gen_neon_vec_unpacks_hi_v16qi (operands[0], 
                                                 operands[1], 
					         t1));
   DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6023 */
rtx
gen_vec_unpacku_hi_v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6027 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (16/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (16/2); i++)
     RTVEC_ELT (v, i) = GEN_INT ((16/2) + i);
  
   t1 = gen_rtx_PARALLEL (V16QImode, v);
   emit_insn (gen_neon_vec_unpacku_hi_v16qi (operands[0], 
                                                 operands[1], 
					         t1));
   DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6023 */
rtx
gen_vec_unpacks_hi_v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6027 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (8/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (8/2); i++)
     RTVEC_ELT (v, i) = GEN_INT ((8/2) + i);
  
   t1 = gen_rtx_PARALLEL (V8HImode, v);
   emit_insn (gen_neon_vec_unpacks_hi_v8hi (operands[0], 
                                                 operands[1], 
					         t1));
   DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6023 */
rtx
gen_vec_unpacku_hi_v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6027 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (8/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (8/2); i++)
     RTVEC_ELT (v, i) = GEN_INT ((8/2) + i);
  
   t1 = gen_rtx_PARALLEL (V8HImode, v);
   emit_insn (gen_neon_vec_unpacku_hi_v8hi (operands[0], 
                                                 operands[1], 
					         t1));
   DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6023 */
rtx
gen_vec_unpacks_hi_v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6027 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (4/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (4/2); i++)
     RTVEC_ELT (v, i) = GEN_INT ((4/2) + i);
  
   t1 = gen_rtx_PARALLEL (V4SImode, v);
   emit_insn (gen_neon_vec_unpacks_hi_v4si (operands[0], 
                                                 operands[1], 
					         t1));
   DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6023 */
rtx
gen_vec_unpacku_hi_v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6027 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (4/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (4/2); i++)
     RTVEC_ELT (v, i) = GEN_INT ((4/2) + i);
  
   t1 = gen_rtx_PARALLEL (V4SImode, v);
   emit_insn (gen_neon_vec_unpacku_hi_v4si (operands[0], 
                                                 operands[1], 
					         t1));
   DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6042 */
rtx
gen_vec_unpacks_lo_v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6046 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (16/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (16/2) ; i++)
     RTVEC_ELT (v, i) = GEN_INT (i);
   t1 = gen_rtx_PARALLEL (V16QImode, v);
   emit_insn (gen_neon_vec_unpacks_lo_v16qi (operands[0], 
                                                 operands[1], 
				   	         t1));
   DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6042 */
rtx
gen_vec_unpacku_lo_v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6046 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (16/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (16/2) ; i++)
     RTVEC_ELT (v, i) = GEN_INT (i);
   t1 = gen_rtx_PARALLEL (V16QImode, v);
   emit_insn (gen_neon_vec_unpacku_lo_v16qi (operands[0], 
                                                 operands[1], 
				   	         t1));
   DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6042 */
rtx
gen_vec_unpacks_lo_v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6046 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (8/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (8/2) ; i++)
     RTVEC_ELT (v, i) = GEN_INT (i);
   t1 = gen_rtx_PARALLEL (V8HImode, v);
   emit_insn (gen_neon_vec_unpacks_lo_v8hi (operands[0], 
                                                 operands[1], 
				   	         t1));
   DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6042 */
rtx
gen_vec_unpacku_lo_v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6046 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (8/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (8/2) ; i++)
     RTVEC_ELT (v, i) = GEN_INT (i);
   t1 = gen_rtx_PARALLEL (V8HImode, v);
   emit_insn (gen_neon_vec_unpacku_lo_v8hi (operands[0], 
                                                 operands[1], 
				   	         t1));
   DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6042 */
rtx
gen_vec_unpacks_lo_v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6046 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (4/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (4/2) ; i++)
     RTVEC_ELT (v, i) = GEN_INT (i);
   t1 = gen_rtx_PARALLEL (V4SImode, v);
   emit_insn (gen_neon_vec_unpacks_lo_v4si (operands[0], 
                                                 operands[1], 
				   	         t1));
   DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6042 */
rtx
gen_vec_unpacku_lo_v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6046 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (4/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (4/2) ; i++)
     RTVEC_ELT (v, i) = GEN_INT (i);
   t1 = gen_rtx_PARALLEL (V4SImode, v);
   emit_insn (gen_neon_vec_unpacku_lo_v4si (operands[0], 
                                                 operands[1], 
				   	         t1));
   DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6073 */
rtx
gen_vec_widen_smult_lo_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6078 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (16/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (16/2) ; i++)
     RTVEC_ELT (v, i) = GEN_INT (i);
   t1 = gen_rtx_PARALLEL (V16QImode, v);

   emit_insn (gen_neon_vec_smult_lo_v16qi (operands[0],
 					       operands[1],
					       t1,
					       operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6073 */
rtx
gen_vec_widen_umult_lo_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6078 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (16/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (16/2) ; i++)
     RTVEC_ELT (v, i) = GEN_INT (i);
   t1 = gen_rtx_PARALLEL (V16QImode, v);

   emit_insn (gen_neon_vec_umult_lo_v16qi (operands[0],
 					       operands[1],
					       t1,
					       operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6073 */
rtx
gen_vec_widen_smult_lo_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6078 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (8/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (8/2) ; i++)
     RTVEC_ELT (v, i) = GEN_INT (i);
   t1 = gen_rtx_PARALLEL (V8HImode, v);

   emit_insn (gen_neon_vec_smult_lo_v8hi (operands[0],
 					       operands[1],
					       t1,
					       operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6073 */
rtx
gen_vec_widen_umult_lo_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6078 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (8/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (8/2) ; i++)
     RTVEC_ELT (v, i) = GEN_INT (i);
   t1 = gen_rtx_PARALLEL (V8HImode, v);

   emit_insn (gen_neon_vec_umult_lo_v8hi (operands[0],
 					       operands[1],
					       t1,
					       operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6073 */
rtx
gen_vec_widen_smult_lo_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6078 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (4/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (4/2) ; i++)
     RTVEC_ELT (v, i) = GEN_INT (i);
   t1 = gen_rtx_PARALLEL (V4SImode, v);

   emit_insn (gen_neon_vec_smult_lo_v4si (operands[0],
 					       operands[1],
					       t1,
					       operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6073 */
rtx
gen_vec_widen_umult_lo_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6078 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (4/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (4/2) ; i++)
     RTVEC_ELT (v, i) = GEN_INT (i);
   t1 = gen_rtx_PARALLEL (V4SImode, v);

   emit_insn (gen_neon_vec_umult_lo_v4si (operands[0],
 					       operands[1],
					       t1,
					       operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6107 */
rtx
gen_vec_widen_smult_hi_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6112 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (16/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (16/2) ; i++)
     RTVEC_ELT (v, i) = GEN_INT (16/2 + i);
   t1 = gen_rtx_PARALLEL (V16QImode, v);

   emit_insn (gen_neon_vec_smult_hi_v16qi (operands[0],
 					       operands[1],
					       t1,
					       operands[2]));
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6107 */
rtx
gen_vec_widen_umult_hi_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6112 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (16/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (16/2) ; i++)
     RTVEC_ELT (v, i) = GEN_INT (16/2 + i);
   t1 = gen_rtx_PARALLEL (V16QImode, v);

   emit_insn (gen_neon_vec_umult_hi_v16qi (operands[0],
 					       operands[1],
					       t1,
					       operands[2]));
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6107 */
rtx
gen_vec_widen_smult_hi_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6112 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (8/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (8/2) ; i++)
     RTVEC_ELT (v, i) = GEN_INT (8/2 + i);
   t1 = gen_rtx_PARALLEL (V8HImode, v);

   emit_insn (gen_neon_vec_smult_hi_v8hi (operands[0],
 					       operands[1],
					       t1,
					       operands[2]));
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6107 */
rtx
gen_vec_widen_umult_hi_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6112 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (8/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (8/2) ; i++)
     RTVEC_ELT (v, i) = GEN_INT (8/2 + i);
   t1 = gen_rtx_PARALLEL (V8HImode, v);

   emit_insn (gen_neon_vec_umult_hi_v8hi (operands[0],
 					       operands[1],
					       t1,
					       operands[2]));
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6107 */
rtx
gen_vec_widen_smult_hi_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6112 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (4/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (4/2) ; i++)
     RTVEC_ELT (v, i) = GEN_INT (4/2 + i);
   t1 = gen_rtx_PARALLEL (V4SImode, v);

   emit_insn (gen_neon_vec_smult_hi_v4si (operands[0],
 					       operands[1],
					       t1,
					       operands[2]));
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6107 */
rtx
gen_vec_widen_umult_hi_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6112 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtvec v = rtvec_alloc (4/2)  ;
   rtx t1;
   int i;
   for (i = 0; i < (4/2) ; i++)
     RTVEC_ELT (v, i) = GEN_INT (4/2 + i);
   t1 = gen_rtx_PARALLEL (V4SImode, v);

   emit_insn (gen_neon_vec_umult_hi_v4si (operands[0],
 					       operands[1],
					       t1,
					       operands[2]));
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6140 */
rtx
gen_vec_widen_sshiftl_lo_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6145 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vec_sshiftl_v8qi (operands[0],
		simplify_gen_subreg (V8QImode, operands[1], V16QImode, 0),
		operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6140 */
rtx
gen_vec_widen_ushiftl_lo_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6145 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vec_ushiftl_v8qi (operands[0],
		simplify_gen_subreg (V8QImode, operands[1], V16QImode, 0),
		operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6140 */
rtx
gen_vec_widen_sshiftl_lo_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6145 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vec_sshiftl_v4hi (operands[0],
		simplify_gen_subreg (V4HImode, operands[1], V8HImode, 0),
		operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6140 */
rtx
gen_vec_widen_ushiftl_lo_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6145 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vec_ushiftl_v4hi (operands[0],
		simplify_gen_subreg (V4HImode, operands[1], V8HImode, 0),
		operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6140 */
rtx
gen_vec_widen_sshiftl_lo_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6145 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vec_sshiftl_v2si (operands[0],
		simplify_gen_subreg (V2SImode, operands[1], V4SImode, 0),
		operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6140 */
rtx
gen_vec_widen_ushiftl_lo_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6145 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vec_ushiftl_v2si (operands[0],
		simplify_gen_subreg (V2SImode, operands[1], V4SImode, 0),
		operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6153 */
rtx
gen_vec_widen_sshiftl_hi_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6158 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vec_sshiftl_v8qi (operands[0],
                simplify_gen_subreg (V8QImode, operands[1], V16QImode,
				     GET_MODE_SIZE (V8QImode)),
                operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6153 */
rtx
gen_vec_widen_ushiftl_hi_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6158 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vec_ushiftl_v8qi (operands[0],
                simplify_gen_subreg (V8QImode, operands[1], V16QImode,
				     GET_MODE_SIZE (V8QImode)),
                operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6153 */
rtx
gen_vec_widen_sshiftl_hi_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6158 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vec_sshiftl_v4hi (operands[0],
                simplify_gen_subreg (V4HImode, operands[1], V8HImode,
				     GET_MODE_SIZE (V4HImode)),
                operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6153 */
rtx
gen_vec_widen_ushiftl_hi_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6158 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vec_ushiftl_v4hi (operands[0],
                simplify_gen_subreg (V4HImode, operands[1], V8HImode,
				     GET_MODE_SIZE (V4HImode)),
                operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6153 */
rtx
gen_vec_widen_sshiftl_hi_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6158 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vec_sshiftl_v2si (operands[0],
                simplify_gen_subreg (V2SImode, operands[1], V4SImode,
				     GET_MODE_SIZE (V2SImode)),
                operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6153 */
rtx
gen_vec_widen_ushiftl_hi_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6158 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  emit_insn (gen_neon_vec_ushiftl_v2si (operands[0],
                simplify_gen_subreg (V2SImode, operands[1], V4SImode,
				     GET_MODE_SIZE (V2SImode)),
                operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6176 */
rtx
gen_vec_unpacks_lo_v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6180 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmpreg = gen_reg_rtx (V8HImode);
  emit_insn (gen_neon_unpacks_v8qi (tmpreg, operands[1]));
  emit_insn (gen_neon_vget_lowv8hi (operands[0], tmpreg));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4HImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6176 */
rtx
gen_vec_unpacku_lo_v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6180 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmpreg = gen_reg_rtx (V8HImode);
  emit_insn (gen_neon_unpacku_v8qi (tmpreg, operands[1]));
  emit_insn (gen_neon_vget_lowv8hi (operands[0], tmpreg));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4HImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6176 */
rtx
gen_vec_unpacks_lo_v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6180 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmpreg = gen_reg_rtx (V4SImode);
  emit_insn (gen_neon_unpacks_v4hi (tmpreg, operands[1]));
  emit_insn (gen_neon_vget_lowv4si (operands[0], tmpreg));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2SImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6176 */
rtx
gen_vec_unpacku_lo_v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6180 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmpreg = gen_reg_rtx (V4SImode);
  emit_insn (gen_neon_unpacku_v4hi (tmpreg, operands[1]));
  emit_insn (gen_neon_vget_lowv4si (operands[0], tmpreg));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2SImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6176 */
rtx
gen_vec_unpacks_lo_v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6180 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmpreg = gen_reg_rtx (V2DImode);
  emit_insn (gen_neon_unpacks_v2si (tmpreg, operands[1]));
  emit_insn (gen_neon_vget_lowv2di (operands[0], tmpreg));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (DImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6176 */
rtx
gen_vec_unpacku_lo_v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6180 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmpreg = gen_reg_rtx (V2DImode);
  emit_insn (gen_neon_unpacku_v2si (tmpreg, operands[1]));
  emit_insn (gen_neon_vget_lowv2di (operands[0], tmpreg));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (DImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6189 */
rtx
gen_vec_unpacks_hi_v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6193 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmpreg = gen_reg_rtx (V8HImode);
  emit_insn (gen_neon_unpacks_v8qi (tmpreg, operands[1]));
  emit_insn (gen_neon_vget_highv8hi (operands[0], tmpreg));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4HImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6189 */
rtx
gen_vec_unpacku_hi_v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6193 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmpreg = gen_reg_rtx (V8HImode);
  emit_insn (gen_neon_unpacku_v8qi (tmpreg, operands[1]));
  emit_insn (gen_neon_vget_highv8hi (operands[0], tmpreg));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4HImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6189 */
rtx
gen_vec_unpacks_hi_v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6193 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmpreg = gen_reg_rtx (V4SImode);
  emit_insn (gen_neon_unpacks_v4hi (tmpreg, operands[1]));
  emit_insn (gen_neon_vget_highv4si (operands[0], tmpreg));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2SImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6189 */
rtx
gen_vec_unpacku_hi_v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6193 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmpreg = gen_reg_rtx (V4SImode);
  emit_insn (gen_neon_unpacku_v4hi (tmpreg, operands[1]));
  emit_insn (gen_neon_vget_highv4si (operands[0], tmpreg));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2SImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6189 */
rtx
gen_vec_unpacks_hi_v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6193 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmpreg = gen_reg_rtx (V2DImode);
  emit_insn (gen_neon_unpacks_v2si (tmpreg, operands[1]));
  emit_insn (gen_neon_vget_highv2di (operands[0], tmpreg));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (DImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6189 */
rtx
gen_vec_unpacku_hi_v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6193 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tmpreg = gen_reg_rtx (V2DImode);
  emit_insn (gen_neon_unpacku_v2si (tmpreg, operands[1]));
  emit_insn (gen_neon_vget_highv2di (operands[0], tmpreg));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (DImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6213 */
rtx
gen_vec_widen_smult_hi_v8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6218 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V8HImode);
   emit_insn (gen_neon_vec_smult_v8qi (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_highv8hi (operands[0], tmpreg));
 					    
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4HImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V4HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6213 */
rtx
gen_vec_widen_umult_hi_v8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6218 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V8HImode);
   emit_insn (gen_neon_vec_umult_v8qi (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_highv8hi (operands[0], tmpreg));
 					    
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4HImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V4HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6213 */
rtx
gen_vec_widen_smult_hi_v4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6218 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V4SImode);
   emit_insn (gen_neon_vec_smult_v4hi (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_highv4si (operands[0], tmpreg));
 					    
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2SImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V2SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6213 */
rtx
gen_vec_widen_umult_hi_v4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6218 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V4SImode);
   emit_insn (gen_neon_vec_umult_v4hi (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_highv4si (operands[0], tmpreg));
 					    
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2SImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V2SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6213 */
rtx
gen_vec_widen_smult_hi_v2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6218 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V2DImode);
   emit_insn (gen_neon_vec_smult_v2si (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_highv2di (operands[0], tmpreg));
 					    
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (DImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (DImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6213 */
rtx
gen_vec_widen_umult_hi_v2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6218 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V2DImode);
   emit_insn (gen_neon_vec_umult_v2si (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_highv2di (operands[0], tmpreg));
 					    
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (DImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (DImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6228 */
rtx
gen_vec_widen_smult_lo_v8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6233 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V8HImode);
   emit_insn (gen_neon_vec_smult_v8qi (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_lowv8hi (operands[0], tmpreg));
 					    
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4HImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V4HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6228 */
rtx
gen_vec_widen_umult_lo_v8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6233 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V8HImode);
   emit_insn (gen_neon_vec_umult_v8qi (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_lowv8hi (operands[0], tmpreg));
 					    
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4HImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V4HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6228 */
rtx
gen_vec_widen_smult_lo_v4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6233 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V4SImode);
   emit_insn (gen_neon_vec_smult_v4hi (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_lowv4si (operands[0], tmpreg));
 					    
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2SImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V2SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6228 */
rtx
gen_vec_widen_umult_lo_v4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6233 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V4SImode);
   emit_insn (gen_neon_vec_umult_v4hi (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_lowv4si (operands[0], tmpreg));
 					    
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2SImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V2SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6228 */
rtx
gen_vec_widen_smult_lo_v2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6233 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V2DImode);
   emit_insn (gen_neon_vec_smult_v2si (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_lowv2di (operands[0], tmpreg));
 					    
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (DImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (DImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6228 */
rtx
gen_vec_widen_umult_lo_v2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6233 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V2DImode);
   emit_insn (gen_neon_vec_umult_v2si (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_lowv2di (operands[0], tmpreg));
 					    
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (DImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (DImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6243 */
rtx
gen_vec_widen_sshiftl_hi_v8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6248 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V8HImode);
   emit_insn (gen_neon_vec_sshiftl_v8qi (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_highv8hi (operands[0], tmpreg));

   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4HImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6243 */
rtx
gen_vec_widen_ushiftl_hi_v8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6248 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V8HImode);
   emit_insn (gen_neon_vec_ushiftl_v8qi (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_highv8hi (operands[0], tmpreg));

   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4HImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6243 */
rtx
gen_vec_widen_sshiftl_hi_v4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6248 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V4SImode);
   emit_insn (gen_neon_vec_sshiftl_v4hi (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_highv4si (operands[0], tmpreg));

   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2SImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6243 */
rtx
gen_vec_widen_ushiftl_hi_v4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6248 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V4SImode);
   emit_insn (gen_neon_vec_ushiftl_v4hi (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_highv4si (operands[0], tmpreg));

   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2SImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6243 */
rtx
gen_vec_widen_sshiftl_hi_v2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6248 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V2DImode);
   emit_insn (gen_neon_vec_sshiftl_v2si (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_highv2di (operands[0], tmpreg));

   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (DImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6243 */
rtx
gen_vec_widen_ushiftl_hi_v2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6248 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V2DImode);
   emit_insn (gen_neon_vec_ushiftl_v2si (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_highv2di (operands[0], tmpreg));

   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (DImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6257 */
rtx
gen_vec_widen_sshiftl_lo_v8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6262 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V8HImode);
   emit_insn (gen_neon_vec_sshiftl_v8qi (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_lowv8hi (operands[0], tmpreg));

   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4HImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6257 */
rtx
gen_vec_widen_ushiftl_lo_v8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6262 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V8HImode);
   emit_insn (gen_neon_vec_ushiftl_v8qi (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_lowv8hi (operands[0], tmpreg));

   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4HImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6257 */
rtx
gen_vec_widen_sshiftl_lo_v4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6262 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V4SImode);
   emit_insn (gen_neon_vec_sshiftl_v4hi (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_lowv4si (operands[0], tmpreg));

   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2SImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6257 */
rtx
gen_vec_widen_ushiftl_lo_v4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6262 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V4SImode);
   emit_insn (gen_neon_vec_ushiftl_v4hi (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_lowv4si (operands[0], tmpreg));

   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2SImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6257 */
rtx
gen_vec_widen_sshiftl_lo_v2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6262 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V2DImode);
   emit_insn (gen_neon_vec_sshiftl_v2si (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_lowv2di (operands[0], tmpreg));

   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (DImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6257 */
rtx
gen_vec_widen_ushiftl_lo_v2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6262 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
   rtx tmpreg = gen_reg_rtx (V2DImode);
   emit_insn (gen_neon_vec_ushiftl_v2si (tmpreg, operands[1], operands[2]));
   emit_insn (gen_neon_vget_lowv2di (operands[0], tmpreg));

   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (DImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6297 */
rtx
gen_vec_pack_trunc_v4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6302 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tempreg = gen_reg_rtx (V8HImode);
  
  emit_insn (gen_move_lo_quad_v8hi (tempreg, operands[1])); 
  emit_insn (gen_move_hi_quad_v8hi (tempreg, operands[2])); 
  emit_insn (gen_neon_vec_pack_trunc_v8hi (operands[0], tempreg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6297 */
rtx
gen_vec_pack_trunc_v2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6302 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tempreg = gen_reg_rtx (V4SImode);
  
  emit_insn (gen_move_lo_quad_v4si (tempreg, operands[1])); 
  emit_insn (gen_move_hi_quad_v4si (tempreg, operands[2])); 
  emit_insn (gen_neon_vec_pack_trunc_v4si (operands[0], tempreg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6297 */
rtx
gen_vec_pack_trunc_di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6302 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx tempreg = gen_reg_rtx (V2DImode);
  
  emit_insn (gen_move_lo_quad_v2di (tempreg, operands[1])); 
  emit_insn (gen_move_hi_quad_v2di (tempreg, operands[2])); 
  emit_insn (gen_neon_vec_pack_trunc_v2di (operands[0], tempreg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6439 */
rtx
gen_neon_vbfcvtbf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6443 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
  rtx op0 = gen_reg_rtx (V2SImode);
  rtx op1 = gen_reg_rtx (V2SImode);
  emit_insn (gen_neon_vbfcvtbf_cvtmodev2si (op1, operands[1]));
  emit_insn (gen_neon_vshl_nv2si (op0, op1, gen_int_mode(16, SImode)));
  emit_insn (gen_neon_vbfcvtbf_cvtmodesf (operands[0], op0));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	384));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6500 */
rtx
gen_neon_vfmab_laneqv8bf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6508 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    int lane = INTVAL (operands[4]);
    gcc_assert (IN_RANGE(lane, 0, 7));
    if (lane < 4)
    {
	emit_insn (gen_neon_vfmab_lanev8bf (operands[0], operands[1], operands[2], operands[3], operands[4]));
    }
    else
      {
	rtx op_highpart = gen_reg_rtx (V4BFmode);
	emit_insn (gen_neon_vget_highv8bf (op_highpart, operands[3]));
	operands[4] = GEN_INT (lane - 4);
	emit_insn (gen_neon_vfmab_lanev8bf (operands[0], operands[1], operands[2], op_highpart, operands[4]));
      }
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	387))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md:6500 */
rtx
gen_neon_vfmat_laneqv8bf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6508 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/neon.md"
{
    int lane = INTVAL (operands[4]);
    gcc_assert (IN_RANGE(lane, 0, 7));
    if (lane < 4)
    {
	emit_insn (gen_neon_vfmat_lanev8bf (operands[0], operands[1], operands[2], operands[3], operands[4]));
    }
    else
      {
	rtx op_highpart = gen_reg_rtx (V4BFmode);
	emit_insn (gen_neon_vget_highv8bf (op_highpart, operands[3]));
	operands[4] = GEN_INT (lane - 4);
	emit_insn (gen_neon_vfmat_lanev8bf (operands[0], operands[1], operands[2], op_highpart, operands[4]));
      }
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	388))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md:32 */
rtx
gen_crypto_aesd (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 40 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md"
{
  if (fix_aes_erratum_1742098)
    {
      rtx op1_protect = gen_reg_rtx (V16QImode);
      emit_insn (gen_aes_op_protect (op1_protect, operands[1]));
      operands[1] = op1_protect;
      rtx op2_protect = gen_reg_rtx (V16QImode);
      emit_insn (gen_aes_op_protect (op2_protect, operands[2]));
      operands[2] = op2_protect;
    }
  /* Fall through to default expansion.  */
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		gen_rtx_XOR (V16QImode,
	operand1,
	operand2)),
	129)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md:32 */
rtx
gen_crypto_aese (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 40 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md"
{
  if (fix_aes_erratum_1742098)
    {
      rtx op1_protect = gen_reg_rtx (V16QImode);
      emit_insn (gen_aes_op_protect (op1_protect, operands[1]));
      operands[1] = op1_protect;
      rtx op2_protect = gen_reg_rtx (V16QImode);
      emit_insn (gen_aes_op_protect (op2_protect, operands[2]));
      operands[2] = op2_protect;
    }
  /* Fall through to default expansion.  */
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		gen_rtx_XOR (V16QImode,
	operand1,
	operand2)),
	130)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md:235 */
rtx
gen_crypto_sha1h (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 239 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md"
{
  rtx op2 = GEN_INT (NEON_ENDIAN_LANE_N (V2SImode, 0));
  emit_insn (gen_crypto_sha1h_lb (operands[0], operands[1], op2));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md:271 */
rtx
gen_crypto_sha1c (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 279 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md"
{
  rtx op4 = GEN_INT (NEON_ENDIAN_LANE_N (V2SImode, 0));
  emit_insn (gen_crypto_sha1c_lb
	     (operands[0], operands[1], operands[2], operands[3], op4));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	134)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md:271 */
rtx
gen_crypto_sha1m (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 279 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md"
{
  rtx op4 = GEN_INT (NEON_ENDIAN_LANE_N (V2SImode, 0));
  emit_insn (gen_crypto_sha1m_lb
	     (operands[0], operands[1], operands[2], operands[3], op4));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	135)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md:271 */
rtx
gen_crypto_sha1p (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 279 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/crypto.md"
{
  rtx op4 = GEN_INT (NEON_ENDIAN_LANE_N (V2SImode, 0));
  emit_insn (gen_crypto_sha1p_lb
	     (operands[0], operands[1], operands[2], operands[3], op4));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	136)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:37 */
rtx
gen_memory_barrier (void)
{
  rtx operand0;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[1];
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 41 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
  operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
  MEM_VOLATILE_P (operands[0]) = 1;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (1,
		copy_rtx (operand0)),
	24)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:133 */
rtx
gen_atomic_loaddi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 139 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
  memmodel model = memmodel_from_int (INTVAL (operands[2]));

  /* For ARMv8-A we can use an LDAEXD to atomically load two 32-bit registers
     when acquire or stronger semantics are needed.  When the relaxed model is
     used this can be relaxed to a normal LDRD.  */
  if (TARGET_HAVE_LDACQEXD)
    {
      if (is_mm_relaxed (model))
	emit_insn (gen_arm_atomic_loaddi2_ldrd (operands[0], operands[1]));
      else
	emit_insn (gen_arm_load_acquire_exclusivedi (operands[0], operands[1]));

      DONE;
    }

  /* On LPAE targets LDRD and STRD accesses to 64-bit aligned
     locations are 64-bit single-copy atomic.  We still need barriers in the
     appropriate places to implement the ordering constraints.  */
  if (TARGET_HAVE_LPAE)
    emit_insn (gen_arm_atomic_loaddi2_ldrd (operands[0], operands[1]));
  else
    emit_insn (gen_arm_load_exclusivedi (operands[0], operands[1]));


  /* All non-relaxed models need a barrier after the load when load-acquire
     instructions are not available.  */
  if (!is_mm_relaxed (model))
    expand_mem_thread_fence (model);

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:172 */
rtx
gen_atomic_compare_and_swapqi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5,
	rtx operand6,
	rtx operand7)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[8];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
    operands[6] = operand6;
    operands[7] = operand7;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 182 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
  arm_expand_compare_and_swap (operands);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
    operand6 = operands[6];
    (void) operand6;
    operand7 = operands[7];
    (void) operand7;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit (operand5, true);
  emit (operand6, true);
  emit (operand7, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:172 */
rtx
gen_atomic_compare_and_swaphi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5,
	rtx operand6,
	rtx operand7)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[8];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
    operands[6] = operand6;
    operands[7] = operand7;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 182 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
  arm_expand_compare_and_swap (operands);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
    operand6 = operands[6];
    (void) operand6;
    operand7 = operands[7];
    (void) operand7;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit (operand5, true);
  emit (operand6, true);
  emit (operand7, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:172 */
rtx
gen_atomic_compare_and_swapsi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5,
	rtx operand6,
	rtx operand7)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[8];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
    operands[6] = operand6;
    operands[7] = operand7;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 182 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
  arm_expand_compare_and_swap (operands);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
    operand6 = operands[6];
    (void) operand6;
    operand7 = operands[7];
    (void) operand7;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit (operand5, true);
  emit (operand6, true);
  emit (operand7, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:172 */
rtx
gen_atomic_compare_and_swapdi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5,
	rtx operand6,
	rtx operand7)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[8];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
    operands[6] = operand6;
    operands[7] = operand7;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 182 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
  arm_expand_compare_and_swap (operands);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
    operand6 = operands[6];
    (void) operand6;
    operand7 = operands[7];
    (void) operand7;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit (operand5, true);
  emit (operand6, true);
  emit (operand7, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:189 */
extern rtx_insn *gen_split_165 (rtx_insn *, rtx *);
rtx_insn *
gen_split_165 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_165 (sync.md:189)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 208 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_compare_and_swap (operands);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:189 */
extern rtx_insn *gen_split_166 (rtx_insn *, rtx *);
rtx_insn *
gen_split_166 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_166 (sync.md:189)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 208 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_compare_and_swap (operands);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:189 */
extern rtx_insn *gen_split_167 (rtx_insn *, rtx *);
rtx_insn *
gen_split_167 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_167 (sync.md:189)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 208 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_compare_and_swap (operands);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:189 */
extern rtx_insn *gen_split_168 (rtx_insn *, rtx *);
rtx_insn *
gen_split_168 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_168 (sync.md:189)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 208 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_compare_and_swap (operands);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:221 */
extern rtx_insn *gen_split_169 (rtx_insn *, rtx *);
rtx_insn *
gen_split_169 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_169 (sync.md:221)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 239 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_compare_and_swap (operands);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:221 */
extern rtx_insn *gen_split_170 (rtx_insn *, rtx *);
rtx_insn *
gen_split_170 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_170 (sync.md:221)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 239 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_compare_and_swap (operands);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:221 */
extern rtx_insn *gen_split_171 (rtx_insn *, rtx *);
rtx_insn *
gen_split_171 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_171 (sync.md:221)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 239 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_compare_and_swap (operands);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:221 */
extern rtx_insn *gen_split_172 (rtx_insn *, rtx *);
rtx_insn *
gen_split_172 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_172 (sync.md:221)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 239 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_compare_and_swap (operands);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:245 */
extern rtx_insn *gen_split_173 (rtx_insn *, rtx *);
rtx_insn *
gen_split_173 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_173 (sync.md:245)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 259 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (SET, operands[0], NULL, operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:245 */
extern rtx_insn *gen_split_174 (rtx_insn *, rtx *);
rtx_insn *
gen_split_174 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_174 (sync.md:245)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 259 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (SET, operands[0], NULL, operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:245 */
extern rtx_insn *gen_split_175 (rtx_insn *, rtx *);
rtx_insn *
gen_split_175 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_175 (sync.md:245)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 259 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (SET, operands[0], NULL, operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:245 */
extern rtx_insn *gen_split_176 (rtx_insn *, rtx *);
rtx_insn *
gen_split_176 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_176 (sync.md:245)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 259 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (SET, operands[0], NULL, operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
extern rtx_insn *gen_split_177 (rtx_insn *, rtx *);
rtx_insn *
gen_split_177 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_177 (sync.md:286)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 300 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (PLUS, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
extern rtx_insn *gen_split_178 (rtx_insn *, rtx *);
rtx_insn *
gen_split_178 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_178 (sync.md:286)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 300 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (MINUS, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
extern rtx_insn *gen_split_179 (rtx_insn *, rtx *);
rtx_insn *
gen_split_179 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_179 (sync.md:286)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 300 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (IOR, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
extern rtx_insn *gen_split_180 (rtx_insn *, rtx *);
rtx_insn *
gen_split_180 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_180 (sync.md:286)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 300 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (XOR, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
extern rtx_insn *gen_split_181 (rtx_insn *, rtx *);
rtx_insn *
gen_split_181 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_181 (sync.md:286)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 300 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (AND, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
extern rtx_insn *gen_split_182 (rtx_insn *, rtx *);
rtx_insn *
gen_split_182 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_182 (sync.md:286)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 300 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (PLUS, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
extern rtx_insn *gen_split_183 (rtx_insn *, rtx *);
rtx_insn *
gen_split_183 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_183 (sync.md:286)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 300 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (MINUS, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
extern rtx_insn *gen_split_184 (rtx_insn *, rtx *);
rtx_insn *
gen_split_184 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_184 (sync.md:286)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 300 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (IOR, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
extern rtx_insn *gen_split_185 (rtx_insn *, rtx *);
rtx_insn *
gen_split_185 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_185 (sync.md:286)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 300 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (XOR, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
extern rtx_insn *gen_split_186 (rtx_insn *, rtx *);
rtx_insn *
gen_split_186 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_186 (sync.md:286)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 300 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (AND, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
extern rtx_insn *gen_split_187 (rtx_insn *, rtx *);
rtx_insn *
gen_split_187 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_187 (sync.md:286)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 300 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (PLUS, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
extern rtx_insn *gen_split_188 (rtx_insn *, rtx *);
rtx_insn *
gen_split_188 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_188 (sync.md:286)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 300 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (MINUS, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
extern rtx_insn *gen_split_189 (rtx_insn *, rtx *);
rtx_insn *
gen_split_189 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_189 (sync.md:286)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 300 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (IOR, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
extern rtx_insn *gen_split_190 (rtx_insn *, rtx *);
rtx_insn *
gen_split_190 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_190 (sync.md:286)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 300 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (XOR, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
extern rtx_insn *gen_split_191 (rtx_insn *, rtx *);
rtx_insn *
gen_split_191 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_191 (sync.md:286)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 300 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (AND, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
extern rtx_insn *gen_split_192 (rtx_insn *, rtx *);
rtx_insn *
gen_split_192 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_192 (sync.md:286)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 300 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (PLUS, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
extern rtx_insn *gen_split_193 (rtx_insn *, rtx *);
rtx_insn *
gen_split_193 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_193 (sync.md:286)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 300 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (MINUS, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
extern rtx_insn *gen_split_194 (rtx_insn *, rtx *);
rtx_insn *
gen_split_194 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_194 (sync.md:286)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 300 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (IOR, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
extern rtx_insn *gen_split_195 (rtx_insn *, rtx *);
rtx_insn *
gen_split_195 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_195 (sync.md:286)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 300 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (XOR, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:286 */
extern rtx_insn *gen_split_196 (rtx_insn *, rtx *);
rtx_insn *
gen_split_196 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_196 (sync.md:286)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 300 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (AND, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:309 */
extern rtx_insn *gen_split_197 (rtx_insn *, rtx *);
rtx_insn *
gen_split_197 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_197 (sync.md:309)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 324 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (NOT, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:309 */
extern rtx_insn *gen_split_198 (rtx_insn *, rtx *);
rtx_insn *
gen_split_198 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_198 (sync.md:309)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 324 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (NOT, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:309 */
extern rtx_insn *gen_split_199 (rtx_insn *, rtx *);
rtx_insn *
gen_split_199 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_199 (sync.md:309)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 324 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (NOT, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:309 */
extern rtx_insn *gen_split_200 (rtx_insn *, rtx *);
rtx_insn *
gen_split_200 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_200 (sync.md:309)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 324 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (NOT, NULL, operands[3], operands[0],
			 operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
extern rtx_insn *gen_split_201 (rtx_insn *, rtx *);
rtx_insn *
gen_split_201 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_201 (sync.md:348)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (PLUS, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
extern rtx_insn *gen_split_202 (rtx_insn *, rtx *);
rtx_insn *
gen_split_202 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_202 (sync.md:348)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (MINUS, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
extern rtx_insn *gen_split_203 (rtx_insn *, rtx *);
rtx_insn *
gen_split_203 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_203 (sync.md:348)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (IOR, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
extern rtx_insn *gen_split_204 (rtx_insn *, rtx *);
rtx_insn *
gen_split_204 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_204 (sync.md:348)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (XOR, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
extern rtx_insn *gen_split_205 (rtx_insn *, rtx *);
rtx_insn *
gen_split_205 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_205 (sync.md:348)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (AND, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
extern rtx_insn *gen_split_206 (rtx_insn *, rtx *);
rtx_insn *
gen_split_206 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_206 (sync.md:348)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (PLUS, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
extern rtx_insn *gen_split_207 (rtx_insn *, rtx *);
rtx_insn *
gen_split_207 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_207 (sync.md:348)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (MINUS, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
extern rtx_insn *gen_split_208 (rtx_insn *, rtx *);
rtx_insn *
gen_split_208 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_208 (sync.md:348)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (IOR, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
extern rtx_insn *gen_split_209 (rtx_insn *, rtx *);
rtx_insn *
gen_split_209 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_209 (sync.md:348)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (XOR, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
extern rtx_insn *gen_split_210 (rtx_insn *, rtx *);
rtx_insn *
gen_split_210 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_210 (sync.md:348)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (AND, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
extern rtx_insn *gen_split_211 (rtx_insn *, rtx *);
rtx_insn *
gen_split_211 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_211 (sync.md:348)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (PLUS, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
extern rtx_insn *gen_split_212 (rtx_insn *, rtx *);
rtx_insn *
gen_split_212 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_212 (sync.md:348)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (MINUS, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
extern rtx_insn *gen_split_213 (rtx_insn *, rtx *);
rtx_insn *
gen_split_213 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_213 (sync.md:348)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (IOR, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
extern rtx_insn *gen_split_214 (rtx_insn *, rtx *);
rtx_insn *
gen_split_214 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_214 (sync.md:348)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (XOR, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
extern rtx_insn *gen_split_215 (rtx_insn *, rtx *);
rtx_insn *
gen_split_215 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_215 (sync.md:348)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (AND, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
extern rtx_insn *gen_split_216 (rtx_insn *, rtx *);
rtx_insn *
gen_split_216 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_216 (sync.md:348)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (PLUS, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
extern rtx_insn *gen_split_217 (rtx_insn *, rtx *);
rtx_insn *
gen_split_217 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_217 (sync.md:348)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (MINUS, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
extern rtx_insn *gen_split_218 (rtx_insn *, rtx *);
rtx_insn *
gen_split_218 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_218 (sync.md:348)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (IOR, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
extern rtx_insn *gen_split_219 (rtx_insn *, rtx *);
rtx_insn *
gen_split_219 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_219 (sync.md:348)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (XOR, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:348 */
extern rtx_insn *gen_split_220 (rtx_insn *, rtx *);
rtx_insn *
gen_split_220 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_220 (sync.md:348)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 364 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (AND, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:373 */
extern rtx_insn *gen_split_221 (rtx_insn *, rtx *);
rtx_insn *
gen_split_221 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_221 (sync.md:373)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 390 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (NOT, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:373 */
extern rtx_insn *gen_split_222 (rtx_insn *, rtx *);
rtx_insn *
gen_split_222 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_222 (sync.md:373)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 390 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (NOT, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:373 */
extern rtx_insn *gen_split_223 (rtx_insn *, rtx *);
rtx_insn *
gen_split_223 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_223 (sync.md:373)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 390 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (NOT, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:373 */
extern rtx_insn *gen_split_224 (rtx_insn *, rtx *);
rtx_insn *
gen_split_224 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_224 (sync.md:373)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 390 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (NOT, operands[0], operands[4], operands[1],
			 operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
extern rtx_insn *gen_split_225 (rtx_insn *, rtx *);
rtx_insn *
gen_split_225 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_225 (sync.md:399)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 415 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (PLUS, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
extern rtx_insn *gen_split_226 (rtx_insn *, rtx *);
rtx_insn *
gen_split_226 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_226 (sync.md:399)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 415 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (MINUS, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
extern rtx_insn *gen_split_227 (rtx_insn *, rtx *);
rtx_insn *
gen_split_227 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_227 (sync.md:399)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 415 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (IOR, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
extern rtx_insn *gen_split_228 (rtx_insn *, rtx *);
rtx_insn *
gen_split_228 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_228 (sync.md:399)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 415 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (XOR, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
extern rtx_insn *gen_split_229 (rtx_insn *, rtx *);
rtx_insn *
gen_split_229 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_229 (sync.md:399)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 415 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (AND, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
extern rtx_insn *gen_split_230 (rtx_insn *, rtx *);
rtx_insn *
gen_split_230 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_230 (sync.md:399)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 415 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (PLUS, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
extern rtx_insn *gen_split_231 (rtx_insn *, rtx *);
rtx_insn *
gen_split_231 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_231 (sync.md:399)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 415 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (MINUS, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
extern rtx_insn *gen_split_232 (rtx_insn *, rtx *);
rtx_insn *
gen_split_232 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_232 (sync.md:399)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 415 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (IOR, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
extern rtx_insn *gen_split_233 (rtx_insn *, rtx *);
rtx_insn *
gen_split_233 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_233 (sync.md:399)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 415 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (XOR, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
extern rtx_insn *gen_split_234 (rtx_insn *, rtx *);
rtx_insn *
gen_split_234 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_234 (sync.md:399)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 415 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (AND, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
extern rtx_insn *gen_split_235 (rtx_insn *, rtx *);
rtx_insn *
gen_split_235 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_235 (sync.md:399)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 415 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (PLUS, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
extern rtx_insn *gen_split_236 (rtx_insn *, rtx *);
rtx_insn *
gen_split_236 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_236 (sync.md:399)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 415 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (MINUS, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
extern rtx_insn *gen_split_237 (rtx_insn *, rtx *);
rtx_insn *
gen_split_237 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_237 (sync.md:399)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 415 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (IOR, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
extern rtx_insn *gen_split_238 (rtx_insn *, rtx *);
rtx_insn *
gen_split_238 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_238 (sync.md:399)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 415 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (XOR, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
extern rtx_insn *gen_split_239 (rtx_insn *, rtx *);
rtx_insn *
gen_split_239 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_239 (sync.md:399)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 415 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (AND, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
extern rtx_insn *gen_split_240 (rtx_insn *, rtx *);
rtx_insn *
gen_split_240 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_240 (sync.md:399)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 415 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (PLUS, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
extern rtx_insn *gen_split_241 (rtx_insn *, rtx *);
rtx_insn *
gen_split_241 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_241 (sync.md:399)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 415 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (MINUS, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
extern rtx_insn *gen_split_242 (rtx_insn *, rtx *);
rtx_insn *
gen_split_242 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_242 (sync.md:399)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 415 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (IOR, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
extern rtx_insn *gen_split_243 (rtx_insn *, rtx *);
rtx_insn *
gen_split_243 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_243 (sync.md:399)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 415 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (XOR, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:399 */
extern rtx_insn *gen_split_244 (rtx_insn *, rtx *);
rtx_insn *
gen_split_244 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_244 (sync.md:399)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 415 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (AND, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:424 */
extern rtx_insn *gen_split_245 (rtx_insn *, rtx *);
rtx_insn *
gen_split_245 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_245 (sync.md:424)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (NOT, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:424 */
extern rtx_insn *gen_split_246 (rtx_insn *, rtx *);
rtx_insn *
gen_split_246 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_246 (sync.md:424)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (NOT, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:424 */
extern rtx_insn *gen_split_247 (rtx_insn *, rtx *);
rtx_insn *
gen_split_247 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_247 (sync.md:424)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (NOT, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md:424 */
extern rtx_insn *gen_split_248 (rtx_insn *, rtx *);
rtx_insn *
gen_split_248 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_248 (sync.md:424)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/sync.md"
{
    arm_split_atomic_op (NOT, NULL, operands[0], operands[1],
			 operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:31 */
rtx
gen_addv4qq3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 36 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (ARM_GE_BITS_READ)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4QQmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:31 */
rtx
gen_addv2hq3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 36 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (ARM_GE_BITS_READ)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2HQmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:31 */
rtx
gen_addv2ha3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 36 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (ARM_GE_BITS_READ)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2HAmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:60 */
rtx
gen_ssaddv4qq3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 65 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (0)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V4QQmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:60 */
rtx
gen_ssaddv2hq3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 65 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (0)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V2HQmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:60 */
rtx
gen_ssaddqq3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 65 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (0)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (QQmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:60 */
rtx
gen_ssaddhq3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 65 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (0)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (HQmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:60 */
rtx
gen_ssaddv2ha3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 65 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (0)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V2HAmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:60 */
rtx
gen_ssaddha3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 65 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (0)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (HAmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:60 */
rtx
gen_ssaddsq3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 65 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (ARM_Q_BIT_READ)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (SQmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:60 */
rtx
gen_ssaddsa3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 65 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (ARM_Q_BIT_READ)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (SAmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:90 */
rtx
gen_subv4qq3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 95 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (ARM_GE_BITS_READ)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4QQmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:90 */
rtx
gen_subv2hq3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 95 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (ARM_GE_BITS_READ)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2HQmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:90 */
rtx
gen_subv2ha3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 95 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (ARM_GE_BITS_READ)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2HAmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:120 */
rtx
gen_sssubv4qq3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 125 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (0)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V4QQmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:120 */
rtx
gen_sssubv2hq3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 125 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (0)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V2HQmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:120 */
rtx
gen_sssubqq3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 125 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (0)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (QQmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:120 */
rtx
gen_sssubhq3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 125 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (0)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (HQmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:120 */
rtx
gen_sssubv2ha3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 125 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (0)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V2HAmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:120 */
rtx
gen_sssubha3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 125 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (0)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (HAmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:120 */
rtx
gen_sssubsq3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 125 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (ARM_Q_BIT_READ)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (SQmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:120 */
rtx
gen_sssubsa3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 125 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (ARM_Q_BIT_READ)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (SAmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:144 */
rtx
gen_mulqq3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 149 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
  rtx tmp1 = gen_reg_rtx (HImode);
  rtx tmp2 = gen_reg_rtx (HImode);
  rtx tmp3 = gen_reg_rtx (SImode);

  emit_insn (gen_extendqihi2 (tmp1, gen_lowpart (QImode, operands[1])));
  emit_insn (gen_extendqihi2 (tmp2, gen_lowpart (QImode, operands[2])));
  emit_insn (gen_mulhisi3 (tmp3, tmp1, tmp2));
  emit_insn (gen_extv (gen_lowpart (SImode, operands[0]), tmp3, GEN_INT (8),
		       GEN_INT (7)));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (QQmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:162 */
rtx
gen_mulhq3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 167 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
  rtx tmp = gen_reg_rtx (SImode);

  emit_insn (gen_mulhisi3 (tmp, gen_lowpart (HImode, operands[1]),
			   gen_lowpart (HImode, operands[2])));
  /* We're doing a s.15 * s.15 multiplication, getting an s.30 result.  Extract
     an s.15 value from that.  This won't overflow/saturate for _Fract
     values.  */
  emit_insn (gen_extv (gen_lowpart (SImode, operands[0]), tmp,
		       GEN_INT (16), GEN_INT (15)));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (HQmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:180 */
rtx
gen_mulsq3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 185 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
  rtx tmp1 = gen_reg_rtx (DImode);
  rtx tmp2 = gen_reg_rtx (SImode);
  rtx tmp3 = gen_reg_rtx (SImode);

  /* s.31 * s.31 -> s.62 multiplication.  */
  emit_insn (gen_mulsidi3 (tmp1, gen_lowpart (SImode, operands[1]),
			   gen_lowpart (SImode, operands[2])));
  emit_insn (gen_lshrsi3 (tmp2, gen_lowpart (SImode, tmp1), GEN_INT (31)));
  emit_insn (gen_ashlsi3 (tmp3, gen_highpart (SImode, tmp1), GEN_INT (1)));
  emit_insn (gen_iorsi3 (gen_lowpart (SImode, operands[0]), tmp2, tmp3));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (SQmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:202 */
rtx
gen_mulsa3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 207 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
  rtx tmp1 = gen_reg_rtx (DImode);
  rtx tmp2 = gen_reg_rtx (SImode);
  rtx tmp3 = gen_reg_rtx (SImode);

  emit_insn (gen_mulsidi3 (tmp1, gen_lowpart (SImode, operands[1]),
			   gen_lowpart (SImode, operands[2])));
  emit_insn (gen_lshrsi3 (tmp2, gen_lowpart (SImode, tmp1), GEN_INT (15)));
  emit_insn (gen_ashlsi3 (tmp3, gen_highpart (SImode, tmp1), GEN_INT (17)));
  emit_insn (gen_iorsi3 (gen_lowpart (SImode, operands[0]), tmp2, tmp3));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (SAmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:221 */
rtx
gen_mulusa3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 226 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
  rtx tmp1 = gen_reg_rtx (DImode);
  rtx tmp2 = gen_reg_rtx (SImode);
  rtx tmp3 = gen_reg_rtx (SImode);

  emit_insn (gen_umulsidi3 (tmp1, gen_lowpart (SImode, operands[1]),
			    gen_lowpart (SImode, operands[2])));
  emit_insn (gen_lshrsi3 (tmp2, gen_lowpart (SImode, tmp1), GEN_INT (16)));
  emit_insn (gen_ashlsi3 (tmp3, gen_highpart (SImode, tmp1), GEN_INT (16)));
  emit_insn (gen_iorsi3 (gen_lowpart (SImode, operands[0]), tmp2, tmp3));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (USAmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:243 */
rtx
gen_ssmulsa3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 251 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (ARM_Q_BIT_READ)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_SS_MULT (SAmode,
	operand1,
	operand2)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_hard_reg_clobber (CCmode, 100))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:315 */
rtx
gen_usmulusa3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 323 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
    if (ARM_Q_BIT_READ)
      FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_US_MULT (USAmode,
	operand1,
	operand2)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_hard_reg_clobber (CCmode, 100))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:387 */
rtx
gen_mulha3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 392 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
  rtx tmp = gen_reg_rtx (SImode);

  emit_insn (gen_mulhisi3 (tmp, gen_lowpart (HImode, operands[1]),
			   gen_lowpart (HImode, operands[2])));
  emit_insn (gen_extv (gen_lowpart (SImode, operands[0]), tmp, GEN_INT (16),
		       GEN_INT (7)));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (HAmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:403 */
rtx
gen_muluha3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 408 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
  rtx tmp1 = gen_reg_rtx (SImode);
  rtx tmp2 = gen_reg_rtx (SImode);
  rtx tmp3 = gen_reg_rtx (SImode);

  /* 8.8 * 8.8 -> 16.16 multiply.  */
  emit_insn (gen_zero_extendhisi2 (tmp1, gen_lowpart (HImode, operands[1])));
  emit_insn (gen_zero_extendhisi2 (tmp2, gen_lowpart (HImode, operands[2])));
  emit_insn (gen_mulsi3 (tmp3, tmp1, tmp2));
  emit_insn (gen_extzv (gen_lowpart (SImode, operands[0]), tmp3,
			GEN_INT (16), GEN_INT (8)));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (UHAmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:423 */
rtx
gen_ssmulha3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 428 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
  if (ARM_Q_BIT_READ)
    FAIL;
  rtx tmp = gen_reg_rtx (SImode);
  rtx rshift;

  emit_insn (gen_mulhisi3 (tmp, gen_lowpart (HImode, operands[1]),
			   gen_lowpart (HImode, operands[2])));

  rshift = gen_rtx_ASHIFTRT (SImode, tmp, GEN_INT (7));

  emit_insn (gen_rtx_SET (gen_lowpart (HImode, operands[0]),
			  gen_rtx_SS_TRUNCATE (HImode, rshift)));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MULT (HAmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md:445 */
rtx
gen_usmuluha3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 450 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm-fixed.md"
{
  if (ARM_Q_BIT_READ)
    FAIL;

  rtx tmp1 = gen_reg_rtx (SImode);
  rtx tmp2 = gen_reg_rtx (SImode);
  rtx tmp3 = gen_reg_rtx (SImode);
  rtx rshift_tmp = gen_reg_rtx (SImode);

  /* Note: there's no smul[bt][bt] equivalent for unsigned multiplies.  Use a
     normal 32x32->32-bit multiply instead.  */
  emit_insn (gen_zero_extendhisi2 (tmp1, gen_lowpart (HImode, operands[1])));
  emit_insn (gen_zero_extendhisi2 (tmp2, gen_lowpart (HImode, operands[2])));

  emit_insn (gen_mulsi3 (tmp3, tmp1, tmp2));

  /* The operand to "usat" is signed, so we cannot use the "..., asr #8"
     form of that instruction since the multiplication result TMP3 may have the
     top bit set, thus be negative and saturate to zero.  Use a separate
     logical right-shift instead.  */
  emit_insn (gen_lshrsi3 (rshift_tmp, tmp3, GEN_INT (8)));
  emit_insn (gen_arm_usatsihi (gen_lowpart (HImode, operands[0]), rshift_tmp));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_MULT (UHAmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:420 */
rtx
gen_mve_vmvnq_sv16qi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:420 */
rtx
gen_mve_vmvnq_sv8hi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:420 */
rtx
gen_mve_vmvnq_sv4si (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:454 */
rtx
gen_mve_vclzq_uv16qi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:454 */
rtx
gen_mve_vclzq_uv8hi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:454 */
rtx
gen_mve_vclzq_uv4si (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:936 */
rtx
gen_mve_vandq_sv16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:936 */
rtx
gen_mve_vandq_sv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:936 */
rtx
gen_mve_vandq_sv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:959 */
rtx
gen_mve_vbicq_sv16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V16QImode,
	gen_rtx_NOT (V16QImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:959 */
rtx
gen_mve_vbicq_sv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V8HImode,
	gen_rtx_NOT (V8HImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:959 */
rtx
gen_mve_vbicq_sv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V4SImode,
	gen_rtx_NOT (V4SImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:999 */
rtx
gen_cadd90v16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	368));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:999 */
rtx
gen_cadd270v16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	369));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:999 */
rtx
gen_cadd90v8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	368));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:999 */
rtx
gen_cadd270v8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	369));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:999 */
rtx
gen_cadd90v4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	368));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:999 */
rtx
gen_cadd270v4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	369));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1020 */
rtx
gen_mve_veorq_sv16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1020 */
rtx
gen_mve_veorq_sv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1020 */
rtx
gen_mve_veorq_sv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1419 */
rtx
gen_mve_vornq_uv16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V16QImode,
	gen_rtx_NOT (V16QImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1419 */
rtx
gen_mve_vornq_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V8HImode,
	gen_rtx_NOT (V8HImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1419 */
rtx
gen_mve_vornq_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V4SImode,
	gen_rtx_NOT (V4SImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1447 */
rtx
gen_mve_vorrq_uv16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1447 */
rtx
gen_mve_vorrq_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:1447 */
rtx
gen_mve_vorrq_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2677 */
rtx
gen_mve_vshlcq_vec_sv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2684 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn(gen_mve_vshlcq_sv16qi(operands[0], ignore_wb, operands[1],
				      operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	611));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2677 */
rtx
gen_mve_vshlcq_vec_uv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2684 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn(gen_mve_vshlcq_uv16qi(operands[0], ignore_wb, operands[1],
				      operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	612));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2677 */
rtx
gen_mve_vshlcq_vec_sv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2684 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn(gen_mve_vshlcq_sv8hi(operands[0], ignore_wb, operands[1],
				      operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	611));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2677 */
rtx
gen_mve_vshlcq_vec_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2684 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn(gen_mve_vshlcq_uv8hi(operands[0], ignore_wb, operands[1],
				      operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	612));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2677 */
rtx
gen_mve_vshlcq_vec_sv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2684 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn(gen_mve_vshlcq_sv4si(operands[0], ignore_wb, operands[1],
				      operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	611));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2677 */
rtx
gen_mve_vshlcq_vec_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2684 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn(gen_mve_vshlcq_uv4si(operands[0], ignore_wb, operands[1],
				      operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	612));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2691 */
rtx
gen_mve_vshlcq_carry_sv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2698 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V16QImode);
  emit_insn(gen_mve_vshlcq_sv16qi(ignore_vec, operands[0], operands[1],
				      operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	611));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2691 */
rtx
gen_mve_vshlcq_carry_uv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2698 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V16QImode);
  emit_insn(gen_mve_vshlcq_uv16qi(ignore_vec, operands[0], operands[1],
				      operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	612));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2691 */
rtx
gen_mve_vshlcq_carry_sv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2698 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V8HImode);
  emit_insn(gen_mve_vshlcq_sv8hi(ignore_vec, operands[0], operands[1],
				      operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	611));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2691 */
rtx
gen_mve_vshlcq_carry_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2698 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V8HImode);
  emit_insn(gen_mve_vshlcq_uv8hi(ignore_vec, operands[0], operands[1],
				      operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	612));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2691 */
rtx
gen_mve_vshlcq_carry_sv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2698 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V4SImode);
  emit_insn(gen_mve_vshlcq_sv4si(ignore_vec, operands[0], operands[1],
				      operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	611));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:2691 */
rtx
gen_mve_vshlcq_carry_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2698 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V4SImode);
  emit_insn(gen_mve_vshlcq_uv4si(ignore_vec, operands[0], operands[1],
				      operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	612));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7112 */
rtx
gen_mve_vstrbq_scatter_offset_sv16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7118 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrbq_scatter_offset_sv16qi_insn (ind, operands[1],
							      operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	994));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7112 */
rtx
gen_mve_vstrbq_scatter_offset_uv16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7118 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrbq_scatter_offset_uv16qi_insn (ind, operands[1],
							      operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	995));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7112 */
rtx
gen_mve_vstrbq_scatter_offset_sv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7118 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrbq_scatter_offset_sv8hi_insn (ind, operands[1],
							      operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	994));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7112 */
rtx
gen_mve_vstrbq_scatter_offset_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7118 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrbq_scatter_offset_uv8hi_insn (ind, operands[1],
							      operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	995));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7112 */
rtx
gen_mve_vstrbq_scatter_offset_sv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7118 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrbq_scatter_offset_sv4si_insn (ind, operands[1],
							      operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	994));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7112 */
rtx
gen_mve_vstrbq_scatter_offset_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7118 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrbq_scatter_offset_uv4si_insn (ind, operands[1],
							      operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	995));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7227 */
rtx
gen_mve_vstrbq_scatter_offset_p_sv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7234 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrbq_scatter_offset_p_sv16qi_insn (ind, operands[1],
						       operands[2],
						       operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	994));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7227 */
rtx
gen_mve_vstrbq_scatter_offset_p_uv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7234 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrbq_scatter_offset_p_uv16qi_insn (ind, operands[1],
						       operands[2],
						       operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	995));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7227 */
rtx
gen_mve_vstrbq_scatter_offset_p_sv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7234 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrbq_scatter_offset_p_sv8hi_insn (ind, operands[1],
						       operands[2],
						       operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	994));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7227 */
rtx
gen_mve_vstrbq_scatter_offset_p_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7234 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrbq_scatter_offset_p_uv8hi_insn (ind, operands[1],
						       operands[2],
						       operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	995));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7227 */
rtx
gen_mve_vstrbq_scatter_offset_p_sv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7234 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrbq_scatter_offset_p_sv4si_insn (ind, operands[1],
						       operands[2],
						       operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	994));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7227 */
rtx
gen_mve_vstrbq_scatter_offset_p_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7234 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrbq_scatter_offset_p_uv4si_insn (ind, operands[1],
						       operands[2],
						       operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	995));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7624 */
rtx
gen_mve_vld1q_fv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7629 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  emit_insn (gen_mve_vldrhq_fv8hf(operands[0],operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	1004));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7624 */
rtx
gen_mve_vld1q_fv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7629 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  emit_insn (gen_mve_vldrwq_fv4sf(operands[0],operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	1004));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7634 */
rtx
gen_mve_vld1q_sv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7639 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  emit_insn (gen_mve_vldrbq_sv16qi(operands[0],operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	1005));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7634 */
rtx
gen_mve_vld1q_uv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7639 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  emit_insn (gen_mve_vldrbq_uv16qi(operands[0],operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	1006));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7634 */
rtx
gen_mve_vld1q_sv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7639 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  emit_insn (gen_mve_vldrhq_sv8hi(operands[0],operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	1005));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7634 */
rtx
gen_mve_vld1q_uv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7639 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  emit_insn (gen_mve_vldrhq_uv8hi(operands[0],operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	1006));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7634 */
rtx
gen_mve_vld1q_sv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7639 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  emit_insn (gen_mve_vldrwq_sv4si(operands[0],operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	1005));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:7634 */
rtx
gen_mve_vld1q_uv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7639 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  emit_insn (gen_mve_vldrwq_uv4si(operands[0],operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	1006));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8125 */
rtx
gen_mve_vstrhq_scatter_offset_p_sv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8132 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrhq_scatter_offset_p_sv8hi_insn (ind, operands[1],
						       operands[2],
						       operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1035));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8125 */
rtx
gen_mve_vstrhq_scatter_offset_p_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8132 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrhq_scatter_offset_p_uv8hi_insn (ind, operands[1],
						       operands[2],
						       operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1095));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8125 */
rtx
gen_mve_vstrhq_scatter_offset_p_sv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8132 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrhq_scatter_offset_p_sv4si_insn (ind, operands[1],
						       operands[2],
						       operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1035));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8125 */
rtx
gen_mve_vstrhq_scatter_offset_p_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8132 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrhq_scatter_offset_p_uv4si_insn (ind, operands[1],
						       operands[2],
						       operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1095));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8157 */
rtx
gen_mve_vstrhq_scatter_offset_sv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8163 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrhq_scatter_offset_sv8hi_insn (ind, operands[1],
							      operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1035));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8157 */
rtx
gen_mve_vstrhq_scatter_offset_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8163 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrhq_scatter_offset_uv8hi_insn (ind, operands[1],
							      operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1095));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8157 */
rtx
gen_mve_vstrhq_scatter_offset_sv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8163 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrhq_scatter_offset_sv4si_insn (ind, operands[1],
							      operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1035));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8157 */
rtx
gen_mve_vstrhq_scatter_offset_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8163 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrhq_scatter_offset_uv4si_insn (ind, operands[1],
							      operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1095));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8185 */
rtx
gen_mve_vstrhq_scatter_shifted_offset_p_sv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8192 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrhq_scatter_shifted_offset_p_sv8hi_insn (ind, operands[1],
							       operands[2],
							       operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1096));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8185 */
rtx
gen_mve_vstrhq_scatter_shifted_offset_p_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8192 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrhq_scatter_shifted_offset_p_uv8hi_insn (ind, operands[1],
							       operands[2],
							       operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1097));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8185 */
rtx
gen_mve_vstrhq_scatter_shifted_offset_p_sv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8192 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrhq_scatter_shifted_offset_p_sv4si_insn (ind, operands[1],
							       operands[2],
							       operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1096));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8185 */
rtx
gen_mve_vstrhq_scatter_shifted_offset_p_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8192 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrhq_scatter_shifted_offset_p_uv4si_insn (ind, operands[1],
							       operands[2],
							       operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1097));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8217 */
rtx
gen_mve_vstrhq_scatter_shifted_offset_sv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8223 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrhq_scatter_shifted_offset_sv8hi_insn (ind, operands[1],
							     operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1096));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8217 */
rtx
gen_mve_vstrhq_scatter_shifted_offset_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8223 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrhq_scatter_shifted_offset_uv8hi_insn (ind, operands[1],
							     operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1097));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8217 */
rtx
gen_mve_vstrhq_scatter_shifted_offset_sv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8223 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrhq_scatter_shifted_offset_sv4si_insn (ind, operands[1],
							     operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1096));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8217 */
rtx
gen_mve_vstrhq_scatter_shifted_offset_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8223 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrhq_scatter_shifted_offset_uv4si_insn (ind, operands[1],
							     operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1097));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8342 */
rtx
gen_mve_vst1q_fv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8347 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  emit_insn (gen_mve_vstrhq_fv8hf(operands[0],operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	1040));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8342 */
rtx
gen_mve_vst1q_fv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8347 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  emit_insn (gen_mve_vstrwq_fv4sf(operands[0],operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	1040));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8352 */
rtx
gen_mve_vst1q_sv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8357 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  emit_insn (gen_mve_vstrbq_sv16qi(operands[0],operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	1033));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8352 */
rtx
gen_mve_vst1q_uv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8357 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  emit_insn (gen_mve_vstrbq_uv16qi(operands[0],operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	1034));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8352 */
rtx
gen_mve_vst1q_sv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8357 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  emit_insn (gen_mve_vstrhq_sv8hi(operands[0],operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	1033));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8352 */
rtx
gen_mve_vst1q_uv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8357 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  emit_insn (gen_mve_vstrhq_uv8hi(operands[0],operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	1034));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8352 */
rtx
gen_mve_vst1q_sv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8357 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  emit_insn (gen_mve_vstrwq_sv4si(operands[0],operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	1033));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8352 */
rtx
gen_mve_vst1q_uv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8357 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  emit_insn (gen_mve_vstrwq_uv4si(operands[0],operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	1034));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8410 */
rtx
gen_mve_vstrdq_scatter_offset_p_sv2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8417 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrdq_scatter_offset_p_sv2di_insn (ind, operands[1],
							      operands[2],
							      operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1043));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8410 */
rtx
gen_mve_vstrdq_scatter_offset_p_uv2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8417 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrdq_scatter_offset_p_uv2di_insn (ind, operands[1],
							      operands[2],
							      operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1044));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8441 */
rtx
gen_mve_vstrdq_scatter_offset_sv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8447 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrdq_scatter_offset_sv2di_insn (ind, operands[1],
							    operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1043));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8441 */
rtx
gen_mve_vstrdq_scatter_offset_uv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8447 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrdq_scatter_offset_uv2di_insn (ind, operands[1],
							    operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1044));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8469 */
rtx
gen_mve_vstrdq_scatter_shifted_offset_p_sv2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8476 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrdq_scatter_shifted_offset_p_sv2di_insn (ind, operands[1],
							     operands[2],
							     operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1045));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8469 */
rtx
gen_mve_vstrdq_scatter_shifted_offset_p_uv2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8476 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrdq_scatter_shifted_offset_p_uv2di_insn (ind, operands[1],
							     operands[2],
							     operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1046));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8501 */
rtx
gen_mve_vstrdq_scatter_shifted_offset_sv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8507 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrdq_scatter_shifted_offset_sv2di_insn (ind, operands[1],
							   operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1045));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8501 */
rtx
gen_mve_vstrdq_scatter_shifted_offset_uv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8507 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrdq_scatter_shifted_offset_uv2di_insn (ind, operands[1],
							   operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1046));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8530 */
rtx
gen_mve_vstrhq_scatter_offset_fv8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8536 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrhq_scatter_offset_fv8hf_insn (ind, operands[1],
						       operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1051));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8558 */
rtx
gen_mve_vstrhq_scatter_offset_p_fv8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8565 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrhq_scatter_offset_p_fv8hf_insn (ind, operands[1],
							 operands[2],
							 operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1051));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8589 */
rtx
gen_mve_vstrhq_scatter_shifted_offset_fv8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8595 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrhq_scatter_shifted_offset_fv8hf_insn (ind, operands[1],
							       operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1052));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8617 */
rtx
gen_mve_vstrhq_scatter_shifted_offset_p_fv8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8624 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn (ind, operands[1],
							operands[2],
							operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1052));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8694 */
rtx
gen_mve_vstrwq_scatter_offset_fv4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8700 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrwq_scatter_offset_fv4sf_insn (ind, operands[1],
						       operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1054));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8722 */
rtx
gen_mve_vstrwq_scatter_offset_p_fv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8729 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrwq_scatter_offset_p_fv4sf_insn (ind, operands[1],
							 operands[2],
							 operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1054));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8753 */
rtx
gen_mve_vstrwq_scatter_offset_p_sv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8760 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrwq_scatter_offset_p_sv4si_insn (ind, operands[1],
							      operands[2],
							      operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1047));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8753 */
rtx
gen_mve_vstrwq_scatter_offset_p_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8760 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrwq_scatter_offset_p_uv4si_insn (ind, operands[1],
							      operands[2],
							      operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1048));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8784 */
rtx
gen_mve_vstrwq_scatter_offset_sv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8790 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrwq_scatter_offset_sv4si_insn (ind, operands[1],
							    operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1047));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8784 */
rtx
gen_mve_vstrwq_scatter_offset_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8790 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrwq_scatter_offset_uv4si_insn (ind, operands[1],
							    operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1048));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8812 */
rtx
gen_mve_vstrwq_scatter_shifted_offset_fv4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8818 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (gen_mve_vstrwq_scatter_shifted_offset_fv4sf_insn (ind, operands[1],
							       operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1055));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8840 */
rtx
gen_mve_vstrwq_scatter_shifted_offset_p_fv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8847 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn (ind, operands[1],
							operands[2],
							operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1055));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8872 */
rtx
gen_mve_vstrwq_scatter_shifted_offset_p_sv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8879 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrwq_scatter_shifted_offset_p_sv4si_insn (ind, operands[1],
							     operands[2],
							     operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1049));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8872 */
rtx
gen_mve_vstrwq_scatter_shifted_offset_p_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8879 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrwq_scatter_shifted_offset_p_uv4si_insn (ind, operands[1],
							     operands[2],
							     operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1050));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8904 */
rtx
gen_mve_vstrwq_scatter_shifted_offset_sv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8910 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrwq_scatter_shifted_offset_sv4si_insn (ind, operands[1],
							   operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1049));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8904 */
rtx
gen_mve_vstrwq_scatter_shifted_offset_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8910 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ind = XEXP (operands[0], 0);
  gcc_assert (REG_P (ind));
  emit_insn (
    gen_mve_vstrwq_scatter_shifted_offset_uv4si_insn (ind, operands[1],
							   operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1050));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8961 */
rtx
gen_mve_vidupq_n_uv16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8966 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx temp = gen_reg_rtx (SImode);
  emit_move_insn (temp, operands[1]);
  rtx inc = gen_int_mode (INTVAL(operands[2]) * 16, SImode);
  emit_insn (gen_mve_vidupq_uv16qi_insn (operands[0], temp, operands[1],
					  operands[2], inc));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8961 */
rtx
gen_mve_vidupq_n_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8966 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx temp = gen_reg_rtx (SImode);
  emit_move_insn (temp, operands[1]);
  rtx inc = gen_int_mode (INTVAL(operands[2]) * 8, SImode);
  emit_insn (gen_mve_vidupq_uv8hi_insn (operands[0], temp, operands[1],
					  operands[2], inc));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8961 */
rtx
gen_mve_vidupq_n_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8966 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx temp = gen_reg_rtx (SImode);
  emit_move_insn (temp, operands[1]);
  rtx inc = gen_int_mode (INTVAL(operands[2]) * 4, SImode);
  emit_insn (gen_mve_vidupq_uv4si_insn (operands[0], temp, operands[1],
					  operands[2], inc));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8992 */
rtx
gen_mve_vidupq_m_n_uv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8999 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx temp = gen_reg_rtx (SImode);
  emit_move_insn (temp, operands[2]);
  rtx inc = gen_int_mode (INTVAL(operands[3]) * 16, SImode);
  emit_insn (gen_mve_vidupq_m_wb_uv16qi_insn(operands[0], operands[1], temp,
					     operands[2], operands[3],
					     operands[4], inc));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8992 */
rtx
gen_mve_vidupq_m_n_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8999 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx temp = gen_reg_rtx (SImode);
  emit_move_insn (temp, operands[2]);
  rtx inc = gen_int_mode (INTVAL(operands[3]) * 8, SImode);
  emit_insn (gen_mve_vidupq_m_wb_uv8hi_insn(operands[0], operands[1], temp,
					     operands[2], operands[3],
					     operands[4], inc));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:8992 */
rtx
gen_mve_vidupq_m_n_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8999 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx temp = gen_reg_rtx (SImode);
  emit_move_insn (temp, operands[2]);
  rtx inc = gen_int_mode (INTVAL(operands[3]) * 4, SImode);
  emit_insn (gen_mve_vidupq_m_wb_uv4si_insn(operands[0], operands[1], temp,
					     operands[2], operands[3],
					     operands[4], inc));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9029 */
rtx
gen_mve_vddupq_n_uv16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9034 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx temp = gen_reg_rtx (SImode);
  emit_move_insn (temp, operands[1]);
  rtx inc = gen_int_mode (INTVAL(operands[2]) * 16, SImode);
  emit_insn (gen_mve_vddupq_uv16qi_insn (operands[0], temp, operands[1],
					  operands[2], inc));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9029 */
rtx
gen_mve_vddupq_n_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9034 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx temp = gen_reg_rtx (SImode);
  emit_move_insn (temp, operands[1]);
  rtx inc = gen_int_mode (INTVAL(operands[2]) * 8, SImode);
  emit_insn (gen_mve_vddupq_uv8hi_insn (operands[0], temp, operands[1],
					  operands[2], inc));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9029 */
rtx
gen_mve_vddupq_n_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9034 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx temp = gen_reg_rtx (SImode);
  emit_move_insn (temp, operands[1]);
  rtx inc = gen_int_mode (INTVAL(operands[2]) * 4, SImode);
  emit_insn (gen_mve_vddupq_uv4si_insn (operands[0], temp, operands[1],
					  operands[2], inc));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9060 */
rtx
gen_mve_vddupq_m_n_uv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9067 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx temp = gen_reg_rtx (SImode);
  emit_move_insn (temp, operands[2]);
  rtx inc = gen_int_mode (INTVAL(operands[3]) * 16, SImode);
  emit_insn (gen_mve_vddupq_m_wb_uv16qi_insn(operands[0], operands[1], temp,
					     operands[2], operands[3],
					     operands[4], inc));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9060 */
rtx
gen_mve_vddupq_m_n_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9067 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx temp = gen_reg_rtx (SImode);
  emit_move_insn (temp, operands[2]);
  rtx inc = gen_int_mode (INTVAL(operands[3]) * 8, SImode);
  emit_insn (gen_mve_vddupq_m_wb_uv8hi_insn(operands[0], operands[1], temp,
					     operands[2], operands[3],
					     operands[4], inc));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9060 */
rtx
gen_mve_vddupq_m_n_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9067 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx temp = gen_reg_rtx (SImode);
  emit_move_insn (temp, operands[2]);
  rtx inc = gen_int_mode (INTVAL(operands[3]) * 4, SImode);
  emit_insn (gen_mve_vddupq_m_wb_uv4si_insn(operands[0], operands[1], temp,
					     operands[2], operands[3],
					     operands[4], inc));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9097 */
rtx
gen_mve_vdwdupq_n_uv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9103 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn (gen_mve_vdwdupq_wb_uv16qi_insn (operands[0], ignore_wb,
					      operands[1], operands[2],
					      operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9097 */
rtx
gen_mve_vdwdupq_n_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9103 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn (gen_mve_vdwdupq_wb_uv8hi_insn (operands[0], ignore_wb,
					      operands[1], operands[2],
					      operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9097 */
rtx
gen_mve_vdwdupq_n_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9103 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn (gen_mve_vdwdupq_wb_uv4si_insn (operands[0], ignore_wb,
					      operands[1], operands[2],
					      operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9114 */
rtx
gen_mve_vdwdupq_wb_uv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9121 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V16QImode);
  emit_insn (gen_mve_vdwdupq_wb_uv16qi_insn (ignore_vec, operands[0],
					      operands[1], operands[2],
					      operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9114 */
rtx
gen_mve_vdwdupq_wb_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9121 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V8HImode);
  emit_insn (gen_mve_vdwdupq_wb_uv8hi_insn (ignore_vec, operands[0],
					      operands[1], operands[2],
					      operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9114 */
rtx
gen_mve_vdwdupq_wb_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9121 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V4SImode);
  emit_insn (gen_mve_vdwdupq_wb_uv4si_insn (ignore_vec, operands[0],
					      operands[1], operands[2],
					      operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9150 */
rtx
gen_mve_vdwdupq_m_n_uv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9158 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn (gen_mve_vdwdupq_m_wb_uv16qi_insn (operands[0], ignore_wb,
						operands[1], operands[2],
						operands[3], operands[4],
						operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit (operand5, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9150 */
rtx
gen_mve_vdwdupq_m_n_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9158 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn (gen_mve_vdwdupq_m_wb_uv8hi_insn (operands[0], ignore_wb,
						operands[1], operands[2],
						operands[3], operands[4],
						operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit (operand5, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9150 */
rtx
gen_mve_vdwdupq_m_n_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9158 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn (gen_mve_vdwdupq_m_wb_uv4si_insn (operands[0], ignore_wb,
						operands[1], operands[2],
						operands[3], operands[4],
						operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit (operand5, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9170 */
rtx
gen_mve_vdwdupq_m_wb_uv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9178 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V16QImode);
  emit_insn (gen_mve_vdwdupq_m_wb_uv16qi_insn (ignore_vec, operands[0],
						operands[1], operands[2],
						operands[3], operands[4],
						operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit (operand5, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9170 */
rtx
gen_mve_vdwdupq_m_wb_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9178 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V8HImode);
  emit_insn (gen_mve_vdwdupq_m_wb_uv8hi_insn (ignore_vec, operands[0],
						operands[1], operands[2],
						operands[3], operands[4],
						operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit (operand5, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9170 */
rtx
gen_mve_vdwdupq_m_wb_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9178 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V4SImode);
  emit_insn (gen_mve_vdwdupq_m_wb_uv4si_insn (ignore_vec, operands[0],
						operands[1], operands[2],
						operands[3], operands[4],
						operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit (operand5, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9214 */
rtx
gen_mve_viwdupq_n_uv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9220 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn (gen_mve_viwdupq_wb_uv16qi_insn (operands[0], ignore_wb,
					      operands[1], operands[2],
					      operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9214 */
rtx
gen_mve_viwdupq_n_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9220 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn (gen_mve_viwdupq_wb_uv8hi_insn (operands[0], ignore_wb,
					      operands[1], operands[2],
					      operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9214 */
rtx
gen_mve_viwdupq_n_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9220 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn (gen_mve_viwdupq_wb_uv4si_insn (operands[0], ignore_wb,
					      operands[1], operands[2],
					      operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9231 */
rtx
gen_mve_viwdupq_wb_uv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9238 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V16QImode);
  emit_insn (gen_mve_viwdupq_wb_uv16qi_insn (ignore_vec, operands[0],
					      operands[1], operands[2],
					      operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9231 */
rtx
gen_mve_viwdupq_wb_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9238 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V8HImode);
  emit_insn (gen_mve_viwdupq_wb_uv8hi_insn (ignore_vec, operands[0],
					      operands[1], operands[2],
					      operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9231 */
rtx
gen_mve_viwdupq_wb_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9238 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V4SImode);
  emit_insn (gen_mve_viwdupq_wb_uv4si_insn (ignore_vec, operands[0],
					      operands[1], operands[2],
					      operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	327));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9267 */
rtx
gen_mve_viwdupq_m_n_uv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9275 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn (gen_mve_viwdupq_m_wb_uv16qi_insn (operands[0], ignore_wb,
						operands[1], operands[2],
						operands[3], operands[4],
						operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit (operand5, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9267 */
rtx
gen_mve_viwdupq_m_n_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9275 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn (gen_mve_viwdupq_m_wb_uv8hi_insn (operands[0], ignore_wb,
						operands[1], operands[2],
						operands[3], operands[4],
						operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit (operand5, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9267 */
rtx
gen_mve_viwdupq_m_n_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9275 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn (gen_mve_viwdupq_m_wb_uv4si_insn (operands[0], ignore_wb,
						operands[1], operands[2],
						operands[3], operands[4],
						operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit (operand5, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9287 */
rtx
gen_mve_viwdupq_m_wb_uv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9295 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V16QImode);
  emit_insn (gen_mve_viwdupq_m_wb_uv16qi_insn (ignore_vec, operands[0],
						operands[1], operands[2],
						operands[3], operands[4],
						operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit (operand5, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9287 */
rtx
gen_mve_viwdupq_m_wb_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9295 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V8HImode);
  emit_insn (gen_mve_viwdupq_m_wb_uv8hi_insn (ignore_vec, operands[0],
						operands[1], operands[2],
						operands[3], operands[4],
						operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit (operand5, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9287 */
rtx
gen_mve_viwdupq_m_wb_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9295 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V4SImode);
  emit_insn (gen_mve_viwdupq_m_wb_uv4si_insn (ignore_vec, operands[0],
						operands[1], operands[2],
						operands[3], operands[4],
						operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit (operand5, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9481 */
rtx
gen_mve_vldrwq_gather_base_wb_sv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9487 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_result = gen_reg_rtx (V4SImode);
  emit_insn (
  gen_mve_vldrwq_gather_base_wb_sv4si_insn (ignore_result, operands[0],
						 operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1066));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9481 */
rtx
gen_mve_vldrwq_gather_base_wb_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9487 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_result = gen_reg_rtx (V4SImode);
  emit_insn (
  gen_mve_vldrwq_gather_base_wb_uv4si_insn (ignore_result, operands[0],
						 operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1067));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9495 */
rtx
gen_mve_vldrwq_gather_base_nowb_sv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9501 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (V4SImode);
  emit_insn (
  gen_mve_vldrwq_gather_base_wb_sv4si_insn (operands[0], ignore_wb,
						 operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1066));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9495 */
rtx
gen_mve_vldrwq_gather_base_nowb_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9501 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (V4SImode);
  emit_insn (
  gen_mve_vldrwq_gather_base_wb_uv4si_insn (operands[0], ignore_wb,
						 operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1067));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9533 */
rtx
gen_mve_vldrwq_gather_base_wb_z_sv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9540 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_result = gen_reg_rtx (V4SImode);
  emit_insn (
  gen_mve_vldrwq_gather_base_wb_z_sv4si_insn (ignore_result, operands[0],
						   operands[1], operands[2],
						   operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1066));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9533 */
rtx
gen_mve_vldrwq_gather_base_wb_z_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9540 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_result = gen_reg_rtx (V4SImode);
  emit_insn (
  gen_mve_vldrwq_gather_base_wb_z_uv4si_insn (ignore_result, operands[0],
						   operands[1], operands[2],
						   operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1067));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9548 */
rtx
gen_mve_vldrwq_gather_base_nowb_z_sv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9555 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (V4SImode);
  emit_insn (
  gen_mve_vldrwq_gather_base_wb_z_sv4si_insn (operands[0], ignore_wb,
						   operands[1], operands[2],
						   operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1066));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9548 */
rtx
gen_mve_vldrwq_gather_base_nowb_z_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9555 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (V4SImode);
  emit_insn (
  gen_mve_vldrwq_gather_base_wb_z_uv4si_insn (operands[0], ignore_wb,
						   operands[1], operands[2],
						   operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1067));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9589 */
rtx
gen_mve_vldrwq_gather_base_wb_fv4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9595 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_result = gen_reg_rtx (V4SFmode);
  emit_insn (
  gen_mve_vldrwq_gather_base_wb_fv4sf_insn (ignore_result, operands[0],
					    operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1069));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9603 */
rtx
gen_mve_vldrwq_gather_base_nowb_fv4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9609 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (V4SImode);
  emit_insn (
  gen_mve_vldrwq_gather_base_wb_fv4sf_insn (operands[0], ignore_wb,
					    operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1069));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9641 */
rtx
gen_mve_vldrwq_gather_base_wb_z_fv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9648 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_result = gen_reg_rtx (V4SFmode);
  emit_insn (
  gen_mve_vldrwq_gather_base_wb_z_fv4sf_insn (ignore_result, operands[0],
					      operands[1], operands[2],
					      operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1069));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9657 */
rtx
gen_mve_vldrwq_gather_base_nowb_z_fv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9664 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (V4SImode);
  emit_insn (
  gen_mve_vldrwq_gather_base_wb_z_fv4sf_insn (operands[0], ignore_wb,
					      operands[1], operands[2],
					      operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1069));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9698 */
rtx
gen_mve_vldrdq_gather_base_wb_sv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9704 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_result = gen_reg_rtx (V2DImode);
  emit_insn (
  gen_mve_vldrdq_gather_base_wb_sv2di_insn (ignore_result, operands[0],
						 operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		const0_rtx),
	1072));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9698 */
rtx
gen_mve_vldrdq_gather_base_wb_uv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9704 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_result = gen_reg_rtx (V2DImode);
  emit_insn (
  gen_mve_vldrdq_gather_base_wb_uv2di_insn (ignore_result, operands[0],
						 operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		const0_rtx),
	1073));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9712 */
rtx
gen_mve_vldrdq_gather_base_nowb_sv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9718 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (V2DImode);
  emit_insn (
  gen_mve_vldrdq_gather_base_wb_sv2di_insn (operands[0], ignore_wb,
						 operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		const0_rtx),
	1072));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9712 */
rtx
gen_mve_vldrdq_gather_base_nowb_uv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9718 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (V2DImode);
  emit_insn (
  gen_mve_vldrdq_gather_base_wb_uv2di_insn (operands[0], ignore_wb,
						 operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		const0_rtx),
	1073));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9751 */
rtx
gen_mve_vldrdq_gather_base_wb_z_sv2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9758 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_result = gen_reg_rtx (V2DImode);
  emit_insn (
  gen_mve_vldrdq_gather_base_wb_z_sv2di_insn (ignore_result, operands[0],
						   operands[1], operands[2],
						   operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		const0_rtx),
	1072));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9751 */
rtx
gen_mve_vldrdq_gather_base_wb_z_uv2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9758 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_result = gen_reg_rtx (V2DImode);
  emit_insn (
  gen_mve_vldrdq_gather_base_wb_z_uv2di_insn (ignore_result, operands[0],
						   operands[1], operands[2],
						   operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		const0_rtx),
	1073));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9767 */
rtx
gen_mve_vldrdq_gather_base_nowb_z_sv2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9774 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (V2DImode);
  emit_insn (
  gen_mve_vldrdq_gather_base_wb_z_sv2di_insn (operands[0], ignore_wb,
						   operands[1], operands[2],
						   operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		const0_rtx),
	1072));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:9767 */
rtx
gen_mve_vldrdq_gather_base_nowb_z_uv2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9774 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (V2DImode);
  emit_insn (
  gen_mve_vldrdq_gather_base_wb_z_uv2di_insn (operands[0], ignore_wb,
						   operands[1], operands[2],
						   operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit_insn (gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		const0_rtx),
	1073));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10316 */
rtx
gen_mve_vshlcq_m_vec_sv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10324 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn (gen_mve_vshlcq_m_sv16qi (operands[0], ignore_wb, operands[1],
					    operands[2], operands[3],
					    operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	1094));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10316 */
rtx
gen_mve_vshlcq_m_vec_uv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10324 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn (gen_mve_vshlcq_m_uv16qi (operands[0], ignore_wb, operands[1],
					    operands[2], operands[3],
					    operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	1093));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10316 */
rtx
gen_mve_vshlcq_m_vec_sv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10324 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn (gen_mve_vshlcq_m_sv8hi (operands[0], ignore_wb, operands[1],
					    operands[2], operands[3],
					    operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	1094));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10316 */
rtx
gen_mve_vshlcq_m_vec_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10324 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn (gen_mve_vshlcq_m_uv8hi (operands[0], ignore_wb, operands[1],
					    operands[2], operands[3],
					    operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	1093));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10316 */
rtx
gen_mve_vshlcq_m_vec_sv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10324 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn (gen_mve_vshlcq_m_sv4si (operands[0], ignore_wb, operands[1],
					    operands[2], operands[3],
					    operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1094));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10316 */
rtx
gen_mve_vshlcq_m_vec_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10324 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_wb = gen_reg_rtx (SImode);
  emit_insn (gen_mve_vshlcq_m_uv4si (operands[0], ignore_wb, operands[1],
					    operands[2], operands[3],
					    operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1093));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10332 */
rtx
gen_mve_vshlcq_m_carry_sv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10340 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V16QImode);
  emit_insn (gen_mve_vshlcq_m_sv16qi (ignore_vec, operands[0],
					    operands[1], operands[2],
					    operands[3], operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	1094));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10332 */
rtx
gen_mve_vshlcq_m_carry_uv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10340 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V16QImode);
  emit_insn (gen_mve_vshlcq_m_uv16qi (ignore_vec, operands[0],
					    operands[1], operands[2],
					    operands[3], operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		const0_rtx),
	1093));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10332 */
rtx
gen_mve_vshlcq_m_carry_sv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10340 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V8HImode);
  emit_insn (gen_mve_vshlcq_m_sv8hi (ignore_vec, operands[0],
					    operands[1], operands[2],
					    operands[3], operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	1094));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10332 */
rtx
gen_mve_vshlcq_m_carry_uv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10340 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V8HImode);
  emit_insn (gen_mve_vshlcq_m_uv8hi (ignore_vec, operands[0],
					    operands[1], operands[2],
					    operands[3], operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		const0_rtx),
	1093));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10332 */
rtx
gen_mve_vshlcq_m_carry_sv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10340 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V4SImode);
  emit_insn (gen_mve_vshlcq_m_sv4si (ignore_vec, operands[0],
					    operands[1], operands[2],
					    operands[3], operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1094));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10332 */
rtx
gen_mve_vshlcq_m_carry_uv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10340 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  rtx ignore_vec = gen_reg_rtx (V4SImode);
  emit_insn (gen_mve_vshlcq_m_uv4si (ignore_vec, operands[0],
					    operands[1], operands[2],
					    operands[3], operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		const0_rtx),
	1093));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10504 */
rtx
gen_movv16bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10508 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
    if (!register_operand (operands[0], V16BImode))
      operands[1] = force_reg (V16BImode, operands[1]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10504 */
rtx
gen_movv8bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10508 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
    if (!register_operand (operands[0], V8BImode))
      operands[1] = force_reg (V8BImode, operands[1]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10504 */
rtx
gen_movv4bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10508 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
    if (!register_operand (operands[0], V4BImode))
      operands[1] = force_reg (V4BImode, operands[1]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10504 */
rtx
gen_movv2qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10508 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
    if (!register_operand (operands[0], V2QImode))
      operands[1] = force_reg (V2QImode, operands[1]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10516 */
rtx
gen_vec_cmpv16qiv16bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10523 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V16BImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10516 */
rtx
gen_vec_cmpv8hiv8bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10523 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V8BImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10516 */
rtx
gen_vec_cmpv4siv4bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10523 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V4BImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10516 */
rtx
gen_vec_cmpv8hfv8bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10523 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V8BImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10516 */
rtx
gen_vec_cmpv4sfv4bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10523 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V4BImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10529 */
rtx
gen_vec_cmpuv16qiv16bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10535 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V16BImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10529 */
rtx
gen_vec_cmpuv8hiv8bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10535 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V8BImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10529 */
rtx
gen_vec_cmpuv4siv4bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10535 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  arm_expand_vector_compare (operands[0], GET_CODE (operands[1]),
			     operands[2], operands[3], false);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), V4BImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10541 */
rtx
gen_vcond_mask_v16qiv16bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v16qiv16bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10548 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  switch (GET_MODE_CLASS (V16QImode))
    {
      case MODE_VECTOR_INT:
	emit_insn (gen_mve_vpselq (VPSELQ_S, V16QImode, operands[0],
				   operands[1], operands[2], operands[3]));
	break;
      case MODE_VECTOR_FLOAT:
	emit_insn (gen_mve_vpselq_f (V16QImode, operands[0],
				     operands[1], operands[2], operands[3]));
	break;
      default:
	gcc_unreachable ();
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V16QImode,
	operand3,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10541 */
rtx
gen_vcond_mask_v8hiv8bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v8hiv8bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10548 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  switch (GET_MODE_CLASS (V8HImode))
    {
      case MODE_VECTOR_INT:
	emit_insn (gen_mve_vpselq (VPSELQ_S, V8HImode, operands[0],
				   operands[1], operands[2], operands[3]));
	break;
      case MODE_VECTOR_FLOAT:
	emit_insn (gen_mve_vpselq_f (V8HImode, operands[0],
				     operands[1], operands[2], operands[3]));
	break;
      default:
	gcc_unreachable ();
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V8HImode,
	operand3,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10541 */
rtx
gen_vcond_mask_v4siv4bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v4siv4bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10548 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  switch (GET_MODE_CLASS (V4SImode))
    {
      case MODE_VECTOR_INT:
	emit_insn (gen_mve_vpselq (VPSELQ_S, V4SImode, operands[0],
				   operands[1], operands[2], operands[3]));
	break;
      case MODE_VECTOR_FLOAT:
	emit_insn (gen_mve_vpselq_f (V4SImode, operands[0],
				     operands[1], operands[2], operands[3]));
	break;
      default:
	gcc_unreachable ();
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4SImode,
	operand3,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10541 */
rtx
gen_vcond_mask_v8hfv8bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v8hfv8bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10548 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  switch (GET_MODE_CLASS (V8HFmode))
    {
      case MODE_VECTOR_INT:
	emit_insn (gen_mve_vpselq (VPSELQ_S, V8HFmode, operands[0],
				   operands[1], operands[2], operands[3]));
	break;
      case MODE_VECTOR_FLOAT:
	emit_insn (gen_mve_vpselq_f (V8HFmode, operands[0],
				     operands[1], operands[2], operands[3]));
	break;
      default:
	gcc_unreachable ();
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V8HFmode,
	operand3,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md:10541 */
rtx
gen_vcond_mask_v4sfv4bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v4sfv4bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10548 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/mve.md"
{
  switch (GET_MODE_CLASS (V4SFmode))
    {
      case MODE_VECTOR_INT:
	emit_insn (gen_mve_vpselq (VPSELQ_S, V4SFmode, operands[0],
				   operands[1], operands[2], operands[3]));
	break;
      case MODE_VECTOR_FLOAT:
	emit_insn (gen_mve_vpselq_f (V4SFmode, operands[0],
				     operands[1], operands[2], operands[3]));
	break;
      default:
	gcc_unreachable ();
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4SFmode,
	operand3,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:926 */
extern rtx_insn *gen_split_249 (rtx_insn *, rtx *);
rtx_insn *
gen_split_249 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_249 (arm.md:926)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 953 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  arm_split_constant (PLUS, SImode, curr_insn,
	              INTVAL (operands[2]), operands[0],
		      operands[1], 0);
  DONE;
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		const0_rtx),
	gen_rtx_CLOBBER (VOIDmode,
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:2002 */
extern rtx_insn *gen_split_250 (rtx_insn *, rtx *);
rtx_insn *
gen_split_250 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_250 (arm.md:2002)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2020 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  arm_split_constant (MINUS, SImode, curr_insn,
                      INTVAL (operands[1]), operands[0], operands[2], 0);
  DONE;
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		const0_rtx),
	gen_rtx_CLOBBER (VOIDmode,
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3005 */
extern rtx_insn *gen_split_251 (rtx_insn *, rtx *);
rtx_insn *
gen_split_251 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_251 (arm.md:3005)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3026 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"

  arm_split_constant  (AND, SImode, curr_insn,
	               INTVAL (operands[2]), operands[0], operands[1], 0);
  DONE;
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		const0_rtx),
	gen_rtx_CLOBBER (VOIDmode,
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3481 */
extern rtx_insn *gen_split_252 (rtx_insn *, rtx *);
rtx_insn *
gen_split_252 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_252 (arm.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3490 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
    /* Convert back to a normal AND operation, so that we can take advantage
       of BIC and AND when appropriate; we'll still emit BFC if that's the
       right thing to do.  */
    unsigned HOST_WIDE_INT width = UINTVAL (operands[1]);
    unsigned HOST_WIDE_INT lsb = UINTVAL (operands[2]);
    unsigned HOST_WIDE_INT mask = (HOST_WIDE_INT_1U << width) - 1;

    operands[1] = gen_int_mode (~(mask << lsb), SImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		const0_rtx),
	gen_rtx_SET (operand0,
	gen_rtx_AND (SImode,
	copy_rtx (operand0),
	operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3719 */
extern rtx_insn *gen_split_253 (rtx_insn *, rtx *);
rtx_insn *
gen_split_253 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_253 (arm.md:3719)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3735 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  arm_split_constant (IOR, SImode, curr_insn,
                      INTVAL (operands[2]), operands[0], operands[1], 0);
  DONE;
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		const0_rtx),
	gen_rtx_CLOBBER (VOIDmode,
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3825 */
extern rtx_insn *gen_split_254 (rtx_insn *, rtx *);
rtx_insn *
gen_split_254 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_254 (arm.md:3825)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3839 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
  arm_split_constant (XOR, SImode, curr_insn,
                      INTVAL (operands[2]), operands[0], operands[1], 0);
  DONE;
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		const0_rtx),
	gen_rtx_CLOBBER (VOIDmode,
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:3891 */
extern rtx_insn *gen_split_255 (rtx_insn *, rtx *);
rtx_insn *
gen_split_255 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_255 (arm.md:3891)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3901 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
     /* If operands[3] is a constant make sure to fold the NOT into it
	to avoid creating a NOT of a CONST_INT.  */
    rtx not_rtx = simplify_gen_unary (NOT, SImode, operands[3], SImode);
    if (CONST_INT_P (not_rtx))
      {
	operands[4] = operands[0];
	operands[5] = not_rtx;
      }
    else
      {
	operands[5] = operands[0];
	operands[4] = not_rtx;
      }
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand4), VOIDmode,
		operand5,
		const0_rtx),
	gen_rtx_SET (operand0,
	gen_rtx_IOR (SImode,
	operand1,
	operand2))));
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand4), VOIDmode,
		copy_rtx (operand5),
		const0_rtx),
	gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_AND (SImode,
	operand4,
	copy_rtx (operand5)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5237 */
extern rtx_insn *gen_split_256 (rtx_insn *, rtx *);
rtx_insn *
gen_split_256 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_256 (arm.md:5237)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5245 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
   /* if (which_alternative == 0) */
   if (REGNO(operands[0]) == REGNO(operands[1]))
     {
      /* Emit the pattern:
         cmp\t%0, #0\n\trsblt\t%0, %0, #0
         [(set (reg:CC CC_REGNUM)
               (compare:CC (match_dup 0) (const_int 0)))
          (cond_exec (lt:CC (reg:CC CC_REGNUM) (const_int 0))
                     (set (match_dup 0) (minus:SI (const_int 0) (match_dup 1))))]
      */
      emit_insn (gen_rtx_SET (gen_rtx_REG (CCmode, CC_REGNUM),
                              gen_rtx_COMPARE (CCmode, operands[0], const0_rtx)));
      emit_insn (gen_rtx_COND_EXEC (VOIDmode,
                                    (gen_rtx_LT (SImode,
                                                 gen_rtx_REG (CCmode, CC_REGNUM),
                                                 const0_rtx)),
                                    (gen_rtx_SET (operands[0],
                                                  (gen_rtx_MINUS (SImode,
                                                                  const0_rtx,
                                                                  operands[1]))))));
      DONE;
     }
   else
     {
      /* Emit the pattern:
         alt1: eor%?\t%0, %1, %1, asr #31\n\tsub%?\t%0, %0, %1, asr #31
         [(set (match_dup 0)
               (xor:SI (match_dup 1)
                       (ashiftrt:SI (match_dup 1) (const_int 31))))
          (set (match_dup 0)
               (minus:SI (match_dup 0)
                      (ashiftrt:SI (match_dup 1) (const_int 31))))]
      */
      emit_insn (gen_rtx_SET (operands[0],
                              gen_rtx_XOR (SImode,
                                           gen_rtx_ASHIFTRT (SImode,
                                                             operands[1],
                                                             GEN_INT (31)),
                                           operands[1])));
      emit_insn (gen_rtx_SET (operands[0],
                              gen_rtx_MINUS (SImode,
                                             operands[0],
                                             gen_rtx_ASHIFTRT (SImode,
                                                               operands[1],
                                                               GEN_INT (31)))));
      DONE;
     }
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand2), VOIDmode,
		operand3,
		const0_rtx),
	const0_rtx));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md:5301 */
extern rtx_insn *gen_split_257 (rtx_insn *, rtx *);
rtx_insn *
gen_split_257 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_257 (arm.md:5301)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5309 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/arm.md"
{
   /* if (which_alternative == 0) */
   if (REGNO (operands[0]) == REGNO (operands[1]))
     {
      /* Emit the pattern:
         cmp\t%0, #0\n\trsbgt\t%0, %0, #0
      */
      emit_insn (gen_rtx_SET (gen_rtx_REG (CCmode, CC_REGNUM),
                              gen_rtx_COMPARE (CCmode, operands[0], const0_rtx)));
      emit_insn (gen_rtx_COND_EXEC (VOIDmode,
                                    gen_rtx_GT (SImode,
                                                gen_rtx_REG (CCmode, CC_REGNUM),
                                                const0_rtx),
                                    gen_rtx_SET (operands[0],
                                                 (gen_rtx_MINUS (SImode,
                                                                 const0_rtx,
                                                                 operands[1])))));
     }
   else
     {
      /* Emit the pattern:
         eor%?\t%0, %1, %1, asr #31\n\trsb%?\t%0, %0, %1, asr #31
      */
      emit_insn (gen_rtx_SET (operands[0],
                              gen_rtx_XOR (SImode,
                                           gen_rtx_ASHIFTRT (SImode,
                                                             operands[1],
                                                             GEN_INT (31)),
                                           operands[1])));
      emit_insn (gen_rtx_SET (operands[0],
                              gen_rtx_MINUS (SImode,
                                             gen_rtx_ASHIFTRT (SImode,
                                                               operands[1],
                                                               GEN_INT (31)),
                                             operands[0])));
     }
   DONE;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand2), VOIDmode,
		operand3,
		const0_rtx),
	const0_rtx));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md:898 */
extern rtx_insn *gen_split_258 (rtx_insn *, rtx *);
rtx_insn *
gen_split_258 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_258 (vfp.md:898)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 909 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/vfp.md"

  if (REGNO (operands[0]) == REGNO (operands[1]))
    {
      operands[0] = gen_highpart (SImode, operands[0]);
      operands[1] = gen_rtx_XOR (SImode, operands[0],
				 gen_int_mode (0x80000000, SImode));
    }
  else
    {
      rtx in_hi, in_lo, out_hi, out_lo;

      in_hi = gen_rtx_XOR (SImode, gen_highpart (SImode, operands[1]),
			   gen_int_mode (0x80000000, SImode));
      in_lo = gen_lowpart (SImode, operands[1]);
      out_hi = gen_highpart (SImode, operands[0]);
      out_lo = gen_lowpart (SImode, operands[0]);

      if (REGNO (in_lo) == REGNO (out_hi))
        {
          emit_insn (gen_rtx_SET (out_lo, in_lo));
	  operands[0] = out_hi;
          operands[1] = in_hi;
        }
      else
        {
          emit_insn (gen_rtx_SET (out_hi, in_hi));
	  operands[0] = out_lo;
          operands[1] = in_lo;
        }
    }
  
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand2), VOIDmode,
		operand3,
		const0_rtx),
	gen_rtx_SET (operand0,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:113 */
extern rtx_insn *gen_split_259 (rtx_insn *, rtx *);
rtx_insn *
gen_split_259 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_259 (thumb2.md:113)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 124 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"
{
    if (REGNO(operands[0]) == REGNO(operands[1]))
      {
       rtx cc_reg = gen_rtx_REG (CCmode, CC_REGNUM);

       emit_insn (gen_rtx_SET (cc_reg, gen_rtx_COMPARE (CCmode, operands[0],
       							const0_rtx)));
       emit_insn (gen_rtx_COND_EXEC (VOIDmode,
                                    (gen_rtx_LT (SImode,
                                                 cc_reg,
                                                 const0_rtx)),
                                    (gen_rtx_SET (operands[0],
                                                  (gen_rtx_MINUS (SImode,
                                                                  const0_rtx,
                                                                  operands[1]))))));
      }
    else
      {
        emit_insn (gen_rtx_SET (operands[0],
                                gen_rtx_XOR (SImode,
                                             gen_rtx_ASHIFTRT (SImode,
                                                               operands[1],
                                                               GEN_INT (31)),
                                             operands[1])));
        emit_insn (gen_rtx_SET (operands[0],
                                gen_rtx_MINUS (SImode,
                                               operands[0],
                                               gen_rtx_ASHIFTRT (SImode,
                                                                 operands[1],
                                                                 GEN_INT (31)))));
      }
    DONE;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand2), VOIDmode,
		operand3,
		const0_rtx),
	const0_rtx));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md:166 */
extern rtx_insn *gen_split_260 (rtx_insn *, rtx *);
rtx_insn *
gen_split_260 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_260 (thumb2.md:166)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 177 "../../../../../../../work-shared/gcc-13.3.0-r0/gcc-13.3.0/gcc/config/arm/thumb2.md"
{
    if (REGNO(operands[0]) == REGNO(operands[1]))
      {
       rtx cc_reg = gen_rtx_REG (CCmode, CC_REGNUM);

       emit_insn (gen_rtx_SET (cc_reg, gen_rtx_COMPARE (CCmode, operands[0],
							const0_rtx)));
       emit_insn (gen_rtx_COND_EXEC (VOIDmode,
                                    (gen_rtx_GT (SImode,
                                                 cc_reg,
                                                 const0_rtx)),
                                    (gen_rtx_SET (operands[0],
                                                  (gen_rtx_MINUS (SImode,
                                                                  const0_rtx,
                                                                  operands[1]))))));
      }
    else
      {
        emit_insn (gen_rtx_SET (operands[0],
                                gen_rtx_XOR (SImode,
                                             gen_rtx_ASHIFTRT (SImode,
                                                               operands[1],
                                                               GEN_INT (31)),
                                             operands[1])));
        emit_insn (gen_rtx_SET (operands[0],
                                gen_rtx_MINUS (SImode,
                                               gen_rtx_ASHIFTRT (SImode,
                                                                 operands[1],
                                                                 GEN_INT (31)),
                                               operands[0])));
      }
    DONE;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_COND_EXEC (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand2), VOIDmode,
		operand3,
		const0_rtx),
	const0_rtx));
  _val = get_insns ();
  end_sequence ();
  return _val;
}



void
add_clobbers (rtx pattern ATTRIBUTE_UNUSED, int insn_code_number)
{
  switch (insn_code_number)
    {
    case 3035:
    case 3034:
      XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode));
      XVECEXP (pattern, 0, 2) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      XVECEXP (pattern, 0, 3) = gen_hard_reg_clobber (CCmode, 100);
      break;

    case 2939:
    case 2935:
    case 2934:
    case 2933:
    case 2932:
    case 2931:
      XVECEXP (pattern, 0, 2) = gen_hard_reg_clobber (CCmode, 100);
      XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode));
      XVECEXP (pattern, 0, 4) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 2938:
    case 2930:
    case 2929:
    case 2928:
    case 2927:
    case 2926:
      XVECEXP (pattern, 0, 2) = gen_hard_reg_clobber (CCmode, 100);
      XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      XVECEXP (pattern, 0, 4) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 2937:
    case 2925:
    case 2924:
    case 2923:
    case 2922:
    case 2921:
      XVECEXP (pattern, 0, 2) = gen_hard_reg_clobber (CCmode, 100);
      XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode));
      XVECEXP (pattern, 0, 4) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 2936:
    case 2920:
    case 2919:
    case 2918:
    case 2917:
    case 2916:
      XVECEXP (pattern, 0, 2) = gen_hard_reg_clobber (CCmode, 100);
      XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode));
      XVECEXP (pattern, 0, 4) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 2915:
    case 2911:
    case 2910:
    case 2909:
    case 2908:
    case 2907:
      XVECEXP (pattern, 0, 1) = gen_hard_reg_clobber (CCmode, 100);
      XVECEXP (pattern, 0, 2) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode));
      XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 2914:
    case 2906:
    case 2905:
    case 2904:
    case 2903:
    case 2902:
      XVECEXP (pattern, 0, 1) = gen_hard_reg_clobber (CCmode, 100);
      XVECEXP (pattern, 0, 2) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 2913:
    case 2901:
    case 2900:
    case 2899:
    case 2898:
    case 2897:
      XVECEXP (pattern, 0, 1) = gen_hard_reg_clobber (CCmode, 100);
      XVECEXP (pattern, 0, 2) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode));
      XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 2912:
    case 2896:
    case 2895:
    case 2894:
    case 2893:
    case 2892:
      XVECEXP (pattern, 0, 1) = gen_hard_reg_clobber (CCmode, 100);
      XVECEXP (pattern, 0, 2) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode));
      XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 2963:
    case 2962:
    case 2961:
    case 2960:
    case 2959:
    case 2958:
    case 2957:
    case 2956:
    case 2955:
    case 2954:
    case 2953:
    case 2952:
    case 2951:
    case 2950:
    case 2949:
    case 2948:
    case 2947:
    case 2946:
    case 2945:
    case 2944:
    case 2943:
    case 2942:
    case 2941:
    case 2940:
    case 2891:
    case 2890:
    case 2889:
    case 2888:
      XVECEXP (pattern, 0, 2) = gen_hard_reg_clobber (CCmode, 100);
      XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 2887:
    case 2886:
    case 2885:
    case 2884:
    case 2883:
    case 2882:
    case 2881:
    case 2880:
      XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 1068:
      XVECEXP (pattern, 0, 2) = gen_hard_reg_clobber (CCmode, 100);
      break;

    case 975:
    case 974:
      XVECEXP (pattern, 0, 2) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 966:
      XVECEXP (pattern, 0, 4) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      XVECEXP (pattern, 0, 5) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 965:
      XVECEXP (pattern, 0, 5) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      XVECEXP (pattern, 0, 6) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      XVECEXP (pattern, 0, 7) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 409:
      XVECEXP (pattern, 0, 1) = gen_hard_reg_clobber (SImode, 1);
      XVECEXP (pattern, 0, 2) = gen_hard_reg_clobber (SImode, 14);
      XVECEXP (pattern, 0, 3) = gen_hard_reg_clobber (SImode, 100);
      break;

    case 408:
      XVECEXP (pattern, 0, 1) = gen_hard_reg_clobber (SImode, 14);
      XVECEXP (pattern, 0, 2) = gen_hard_reg_clobber (SImode, 12);
      XVECEXP (pattern, 0, 3) = gen_hard_reg_clobber (CCmode, 100);
      break;

    case 407:
      XVECEXP (pattern, 0, 1) = gen_hard_reg_clobber (SImode, 9);
      XVECEXP (pattern, 0, 2) = gen_hard_reg_clobber (SImode, 14);
      XVECEXP (pattern, 0, 3) = gen_hard_reg_clobber (SImode, 12);
      XVECEXP (pattern, 0, 4) = gen_hard_reg_clobber (CCmode, 100);
      break;

    case 310:
      XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      XVECEXP (pattern, 0, 2) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      XVECEXP (pattern, 0, 3) = gen_hard_reg_clobber (CCmode, 100);
      break;

    case 313:
    case 308:
      XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      XVECEXP (pattern, 0, 2) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 1023:
    case 1022:
    case 1021:
    case 1020:
    case 1019:
    case 1018:
    case 991:
    case 990:
    case 989:
    case 988:
    case 987:
    case 986:
    case 985:
    case 984:
    case 295:
    case 294:
    case 293:
    case 292:
    case 291:
    case 290:
      XVECEXP (pattern, 0, 2) = gen_hard_reg_clobber (SImode, 14);
      break;

    case 1056:
    case 1044:
    case 1008:
    case 998:
    case 977:
    case 976:
    case 972:
    case 971:
    case 969:
    case 956:
    case 951:
    case 950:
    case 404:
    case 380:
    case 333:
    case 330:
    case 175:
    case 156:
    case 153:
    case 112:
    case 109:
    case 106:
    case 92:
    case 72:
    case 71:
    case 66:
    case 65:
    case 62:
    case 61:
    case 51:
    case 50:
    case 49:
    case 38:
    case 37:
    case 36:
    case 35:
    case 34:
    case 33:
      XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 1063:
    case 1060:
    case 1059:
    case 1058:
    case 1057:
    case 1054:
    case 1051:
    case 1050:
    case 1049:
    case 1048:
    case 1047:
    case 1046:
    case 1045:
    case 1036:
    case 1032:
    case 1031:
    case 1030:
    case 1029:
    case 1005:
    case 1004:
    case 1003:
    case 1002:
    case 1001:
    case 1000:
    case 948:
    case 936:
    case 934:
    case 383:
    case 382:
    case 378:
    case 376:
    case 374:
    case 372:
    case 370:
    case 368:
    case 366:
    case 364:
    case 362:
    case 360:
    case 358:
    case 356:
    case 354:
    case 352:
    case 351:
    case 350:
    case 349:
    case 348:
    case 346:
    case 344:
    case 339:
    case 338:
    case 336:
    case 172:
    case 171:
    case 126:
    case 125:
    case 124:
    case 123:
    case 122:
    case 121:
    case 119:
    case 97:
    case 96:
    case 95:
    case 94:
    case 25:
      XVECEXP (pattern, 0, 1) = gen_hard_reg_clobber (CCmode, 100);
      break;

    default:
      gcc_unreachable ();
    }
}


int
added_clobbers_hard_reg_p (int insn_code_number)
{
  switch (insn_code_number)
    {
    case 2887:
    case 2886:
    case 2885:
    case 2884:
    case 2883:
    case 2882:
    case 2881:
    case 2880:
    case 975:
    case 974:
    case 966:
    case 965:
    case 313:
    case 308:
    case 1056:
    case 1044:
    case 1008:
    case 998:
    case 977:
    case 976:
    case 972:
    case 971:
    case 969:
    case 956:
    case 951:
    case 950:
    case 404:
    case 380:
    case 333:
    case 330:
    case 175:
    case 156:
    case 153:
    case 112:
    case 109:
    case 106:
    case 92:
    case 72:
    case 71:
    case 66:
    case 65:
    case 62:
    case 61:
    case 51:
    case 50:
    case 49:
    case 38:
    case 37:
    case 36:
    case 35:
    case 34:
    case 33:
      return 0;

    case 3035:
    case 3034:
    case 2939:
    case 2935:
    case 2934:
    case 2933:
    case 2932:
    case 2931:
    case 2938:
    case 2930:
    case 2929:
    case 2928:
    case 2927:
    case 2926:
    case 2937:
    case 2925:
    case 2924:
    case 2923:
    case 2922:
    case 2921:
    case 2936:
    case 2920:
    case 2919:
    case 2918:
    case 2917:
    case 2916:
    case 2915:
    case 2911:
    case 2910:
    case 2909:
    case 2908:
    case 2907:
    case 2914:
    case 2906:
    case 2905:
    case 2904:
    case 2903:
    case 2902:
    case 2913:
    case 2901:
    case 2900:
    case 2899:
    case 2898:
    case 2897:
    case 2912:
    case 2896:
    case 2895:
    case 2894:
    case 2893:
    case 2892:
    case 2963:
    case 2962:
    case 2961:
    case 2960:
    case 2959:
    case 2958:
    case 2957:
    case 2956:
    case 2955:
    case 2954:
    case 2953:
    case 2952:
    case 2951:
    case 2950:
    case 2949:
    case 2948:
    case 2947:
    case 2946:
    case 2945:
    case 2944:
    case 2943:
    case 2942:
    case 2941:
    case 2940:
    case 2891:
    case 2890:
    case 2889:
    case 2888:
    case 1068:
    case 409:
    case 408:
    case 407:
    case 310:
    case 1023:
    case 1022:
    case 1021:
    case 1020:
    case 1019:
    case 1018:
    case 991:
    case 990:
    case 989:
    case 988:
    case 987:
    case 986:
    case 985:
    case 984:
    case 295:
    case 294:
    case 293:
    case 292:
    case 291:
    case 290:
    case 1063:
    case 1060:
    case 1059:
    case 1058:
    case 1057:
    case 1054:
    case 1051:
    case 1050:
    case 1049:
    case 1048:
    case 1047:
    case 1046:
    case 1045:
    case 1036:
    case 1032:
    case 1031:
    case 1030:
    case 1029:
    case 1005:
    case 1004:
    case 1003:
    case 1002:
    case 1001:
    case 1000:
    case 948:
    case 936:
    case 934:
    case 383:
    case 382:
    case 378:
    case 376:
    case 374:
    case 372:
    case 370:
    case 368:
    case 366:
    case 364:
    case 362:
    case 360:
    case 358:
    case 356:
    case 354:
    case 352:
    case 351:
    case 350:
    case 349:
    case 348:
    case 346:
    case 344:
    case 339:
    case 338:
    case 336:
    case 172:
    case 171:
    case 126:
    case 125:
    case 124:
    case 123:
    case 122:
    case 121:
    case 119:
    case 97:
    case 96:
    case 95:
    case 94:
    case 25:
      return 1;

    default:
      gcc_unreachable ();
    }
}

insn_code
maybe_code_for_movmisalign (machine_mode arg0)
{
  if (arg0 == E_V8QImode)
    return CODE_FOR_movmisalignv8qi;
  if (arg0 == E_V16QImode)
    return CODE_FOR_movmisalignv16qi;
  if (arg0 == E_V4HImode)
    return CODE_FOR_movmisalignv4hi;
  if (arg0 == E_V8HImode)
    return CODE_FOR_movmisalignv8hi;
  if (arg0 == E_V2SImode)
    return CODE_FOR_movmisalignv2si;
  if (arg0 == E_V4SImode)
    return CODE_FOR_movmisalignv4si;
  if (arg0 == E_V4HFmode)
    return CODE_FOR_movmisalignv4hf;
  if (arg0 == E_V8HFmode)
    return CODE_FOR_movmisalignv8hf;
  if (arg0 == E_V2SFmode)
    return CODE_FOR_movmisalignv2sf;
  if (arg0 == E_V4SFmode)
    return CODE_FOR_movmisalignv4sf;
  if (arg0 == E_V2DImode)
    return CODE_FOR_movmisalignv2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_movmisalign (machine_mode arg0, rtx x0, rtx x1)
{
  insn_code code = maybe_code_for_movmisalign (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 2);
      return GEN_FCN (code) (x0, x1);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_vec_set_internal (machine_mode arg0)
{
  if (arg0 == E_V8QImode)
    return CODE_FOR_vec_setv8qi_internal;
  if (arg0 == E_V4HImode)
    return CODE_FOR_vec_setv4hi_internal;
  if (arg0 == E_V4HFmode)
    return CODE_FOR_vec_setv4hf_internal;
  if (arg0 == E_V4BFmode)
    return CODE_FOR_vec_setv4bf_internal;
  if (arg0 == E_V2SImode)
    return CODE_FOR_vec_setv2si_internal;
  if (arg0 == E_V2SFmode)
    return CODE_FOR_vec_setv2sf_internal;
  if (arg0 == E_V16QImode)
    return CODE_FOR_vec_setv16qi_internal;
  if (arg0 == E_V8HImode)
    return CODE_FOR_vec_setv8hi_internal;
  if (arg0 == E_V8HFmode)
    return CODE_FOR_vec_setv8hf_internal;
  if (arg0 == E_V4SImode)
    return CODE_FOR_vec_setv4si_internal;
  if (arg0 == E_V4SFmode)
    return CODE_FOR_vec_setv4sf_internal;
  if (arg0 == E_V2DImode)
    return CODE_FOR_vec_setv2di_internal;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_vec_set_internal (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_vec_set_internal (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_neon_vhadd (int arg0, int arg1, machine_mode arg2)
{
  if (arg0 == 194
      && arg1 == 194
      && arg2 == E_V8QImode)
    return CODE_FOR_neon_vrhaddsv8qi;
  if (arg0 == 195
      && arg1 == 195
      && arg2 == E_V8QImode)
    return CODE_FOR_neon_vrhadduv8qi;
  if (arg0 == 192
      && arg1 == 192
      && arg2 == E_V8QImode)
    return CODE_FOR_neon_vhaddsv8qi;
  if (arg0 == 193
      && arg1 == 193
      && arg2 == E_V8QImode)
    return CODE_FOR_neon_vhadduv8qi;
  if (arg0 == 194
      && arg1 == 194
      && arg2 == E_V16QImode)
    return CODE_FOR_neon_vrhaddsv16qi;
  if (arg0 == 195
      && arg1 == 195
      && arg2 == E_V16QImode)
    return CODE_FOR_neon_vrhadduv16qi;
  if (arg0 == 192
      && arg1 == 192
      && arg2 == E_V16QImode)
    return CODE_FOR_neon_vhaddsv16qi;
  if (arg0 == 193
      && arg1 == 193
      && arg2 == E_V16QImode)
    return CODE_FOR_neon_vhadduv16qi;
  if (arg0 == 194
      && arg1 == 194
      && arg2 == E_V4HImode)
    return CODE_FOR_neon_vrhaddsv4hi;
  if (arg0 == 195
      && arg1 == 195
      && arg2 == E_V4HImode)
    return CODE_FOR_neon_vrhadduv4hi;
  if (arg0 == 192
      && arg1 == 192
      && arg2 == E_V4HImode)
    return CODE_FOR_neon_vhaddsv4hi;
  if (arg0 == 193
      && arg1 == 193
      && arg2 == E_V4HImode)
    return CODE_FOR_neon_vhadduv4hi;
  if (arg0 == 194
      && arg1 == 194
      && arg2 == E_V8HImode)
    return CODE_FOR_neon_vrhaddsv8hi;
  if (arg0 == 195
      && arg1 == 195
      && arg2 == E_V8HImode)
    return CODE_FOR_neon_vrhadduv8hi;
  if (arg0 == 192
      && arg1 == 192
      && arg2 == E_V8HImode)
    return CODE_FOR_neon_vhaddsv8hi;
  if (arg0 == 193
      && arg1 == 193
      && arg2 == E_V8HImode)
    return CODE_FOR_neon_vhadduv8hi;
  if (arg0 == 194
      && arg1 == 194
      && arg2 == E_V2SImode)
    return CODE_FOR_neon_vrhaddsv2si;
  if (arg0 == 195
      && arg1 == 195
      && arg2 == E_V2SImode)
    return CODE_FOR_neon_vrhadduv2si;
  if (arg0 == 192
      && arg1 == 192
      && arg2 == E_V2SImode)
    return CODE_FOR_neon_vhaddsv2si;
  if (arg0 == 193
      && arg1 == 193
      && arg2 == E_V2SImode)
    return CODE_FOR_neon_vhadduv2si;
  if (arg0 == 194
      && arg1 == 194
      && arg2 == E_V4SImode)
    return CODE_FOR_neon_vrhaddsv4si;
  if (arg0 == 195
      && arg1 == 195
      && arg2 == E_V4SImode)
    return CODE_FOR_neon_vrhadduv4si;
  if (arg0 == 192
      && arg1 == 192
      && arg2 == E_V4SImode)
    return CODE_FOR_neon_vhaddsv4si;
  if (arg0 == 193
      && arg1 == 193
      && arg2 == E_V4SImode)
    return CODE_FOR_neon_vhadduv4si;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_neon_vhadd (int arg0, int arg1, machine_mode arg2, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_neon_vhadd (arg0, arg1, arg2);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_neon_vc (rtx_code arg0, machine_mode arg1)
{
  if (arg0 == EQ
      && arg1 == E_V8QImode)
    return CODE_FOR_neon_vceqv8qi;
  if (arg0 == GT
      && arg1 == E_V8QImode)
    return CODE_FOR_neon_vcgtv8qi;
  if (arg0 == GE
      && arg1 == E_V8QImode)
    return CODE_FOR_neon_vcgev8qi;
  if (arg0 == LE
      && arg1 == E_V8QImode)
    return CODE_FOR_neon_vclev8qi;
  if (arg0 == LT
      && arg1 == E_V8QImode)
    return CODE_FOR_neon_vcltv8qi;
  if (arg0 == EQ
      && arg1 == E_V16QImode)
    return CODE_FOR_neon_vceqv16qi;
  if (arg0 == GT
      && arg1 == E_V16QImode)
    return CODE_FOR_neon_vcgtv16qi;
  if (arg0 == GE
      && arg1 == E_V16QImode)
    return CODE_FOR_neon_vcgev16qi;
  if (arg0 == LE
      && arg1 == E_V16QImode)
    return CODE_FOR_neon_vclev16qi;
  if (arg0 == LT
      && arg1 == E_V16QImode)
    return CODE_FOR_neon_vcltv16qi;
  if (arg0 == EQ
      && arg1 == E_V4HImode)
    return CODE_FOR_neon_vceqv4hi;
  if (arg0 == GT
      && arg1 == E_V4HImode)
    return CODE_FOR_neon_vcgtv4hi;
  if (arg0 == GE
      && arg1 == E_V4HImode)
    return CODE_FOR_neon_vcgev4hi;
  if (arg0 == LE
      && arg1 == E_V4HImode)
    return CODE_FOR_neon_vclev4hi;
  if (arg0 == LT
      && arg1 == E_V4HImode)
    return CODE_FOR_neon_vcltv4hi;
  if (arg0 == EQ
      && arg1 == E_V8HImode)
    return CODE_FOR_neon_vceqv8hi;
  if (arg0 == GT
      && arg1 == E_V8HImode)
    return CODE_FOR_neon_vcgtv8hi;
  if (arg0 == GE
      && arg1 == E_V8HImode)
    return CODE_FOR_neon_vcgev8hi;
  if (arg0 == LE
      && arg1 == E_V8HImode)
    return CODE_FOR_neon_vclev8hi;
  if (arg0 == LT
      && arg1 == E_V8HImode)
    return CODE_FOR_neon_vcltv8hi;
  if (arg0 == EQ
      && arg1 == E_V2SImode)
    return CODE_FOR_neon_vceqv2si;
  if (arg0 == GT
      && arg1 == E_V2SImode)
    return CODE_FOR_neon_vcgtv2si;
  if (arg0 == GE
      && arg1 == E_V2SImode)
    return CODE_FOR_neon_vcgev2si;
  if (arg0 == LE
      && arg1 == E_V2SImode)
    return CODE_FOR_neon_vclev2si;
  if (arg0 == LT
      && arg1 == E_V2SImode)
    return CODE_FOR_neon_vcltv2si;
  if (arg0 == EQ
      && arg1 == E_V4SImode)
    return CODE_FOR_neon_vceqv4si;
  if (arg0 == GT
      && arg1 == E_V4SImode)
    return CODE_FOR_neon_vcgtv4si;
  if (arg0 == GE
      && arg1 == E_V4SImode)
    return CODE_FOR_neon_vcgev4si;
  if (arg0 == LE
      && arg1 == E_V4SImode)
    return CODE_FOR_neon_vclev4si;
  if (arg0 == LT
      && arg1 == E_V4SImode)
    return CODE_FOR_neon_vcltv4si;
  if (arg0 == EQ
      && arg1 == E_V2SFmode)
    return CODE_FOR_neon_vceqv2sf;
  if (arg0 == GT
      && arg1 == E_V2SFmode)
    return CODE_FOR_neon_vcgtv2sf;
  if (arg0 == GE
      && arg1 == E_V2SFmode)
    return CODE_FOR_neon_vcgev2sf;
  if (arg0 == LE
      && arg1 == E_V2SFmode)
    return CODE_FOR_neon_vclev2sf;
  if (arg0 == LT
      && arg1 == E_V2SFmode)
    return CODE_FOR_neon_vcltv2sf;
  if (arg0 == EQ
      && arg1 == E_V4SFmode)
    return CODE_FOR_neon_vceqv4sf;
  if (arg0 == GT
      && arg1 == E_V4SFmode)
    return CODE_FOR_neon_vcgtv4sf;
  if (arg0 == GE
      && arg1 == E_V4SFmode)
    return CODE_FOR_neon_vcgev4sf;
  if (arg0 == LE
      && arg1 == E_V4SFmode)
    return CODE_FOR_neon_vclev4sf;
  if (arg0 == LT
      && arg1 == E_V4SFmode)
    return CODE_FOR_neon_vcltv4sf;
  if (arg0 == EQ
      && arg1 == E_V8HFmode)
    return CODE_FOR_neon_vceqv8hf;
  if (arg0 == GT
      && arg1 == E_V8HFmode)
    return CODE_FOR_neon_vcgtv8hf;
  if (arg0 == GE
      && arg1 == E_V8HFmode)
    return CODE_FOR_neon_vcgev8hf;
  if (arg0 == LE
      && arg1 == E_V8HFmode)
    return CODE_FOR_neon_vclev8hf;
  if (arg0 == LT
      && arg1 == E_V8HFmode)
    return CODE_FOR_neon_vcltv8hf;
  if (arg0 == EQ
      && arg1 == E_V4HFmode)
    return CODE_FOR_neon_vceqv4hf;
  if (arg0 == GT
      && arg1 == E_V4HFmode)
    return CODE_FOR_neon_vcgtv4hf;
  if (arg0 == GE
      && arg1 == E_V4HFmode)
    return CODE_FOR_neon_vcgev4hf;
  if (arg0 == LE
      && arg1 == E_V4HFmode)
    return CODE_FOR_neon_vclev4hf;
  if (arg0 == LT
      && arg1 == E_V4HFmode)
    return CODE_FOR_neon_vcltv4hf;
  if (arg0 == GTU
      && arg1 == E_V8QImode)
    return CODE_FOR_neon_vcgtuv8qi;
  if (arg0 == GEU
      && arg1 == E_V8QImode)
    return CODE_FOR_neon_vcgeuv8qi;
  if (arg0 == GTU
      && arg1 == E_V16QImode)
    return CODE_FOR_neon_vcgtuv16qi;
  if (arg0 == GEU
      && arg1 == E_V16QImode)
    return CODE_FOR_neon_vcgeuv16qi;
  if (arg0 == GTU
      && arg1 == E_V4HImode)
    return CODE_FOR_neon_vcgtuv4hi;
  if (arg0 == GEU
      && arg1 == E_V4HImode)
    return CODE_FOR_neon_vcgeuv4hi;
  if (arg0 == GTU
      && arg1 == E_V8HImode)
    return CODE_FOR_neon_vcgtuv8hi;
  if (arg0 == GEU
      && arg1 == E_V8HImode)
    return CODE_FOR_neon_vcgeuv8hi;
  if (arg0 == GTU
      && arg1 == E_V2SImode)
    return CODE_FOR_neon_vcgtuv2si;
  if (arg0 == GEU
      && arg1 == E_V2SImode)
    return CODE_FOR_neon_vcgeuv2si;
  if (arg0 == GTU
      && arg1 == E_V4SImode)
    return CODE_FOR_neon_vcgtuv4si;
  if (arg0 == GEU
      && arg1 == E_V4SImode)
    return CODE_FOR_neon_vcgeuv4si;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_neon_vc (rtx_code arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_neon_vc (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_neon_vc_insn (rtx_code arg0, machine_mode arg1)
{
  if (arg0 == EQ
      && arg1 == E_V8QImode)
    return CODE_FOR_neon_vceqv8qi_insn;
  if (arg0 == GT
      && arg1 == E_V8QImode)
    return CODE_FOR_neon_vcgtv8qi_insn;
  if (arg0 == GE
      && arg1 == E_V8QImode)
    return CODE_FOR_neon_vcgev8qi_insn;
  if (arg0 == LE
      && arg1 == E_V8QImode)
    return CODE_FOR_neon_vclev8qi_insn;
  if (arg0 == LT
      && arg1 == E_V8QImode)
    return CODE_FOR_neon_vcltv8qi_insn;
  if (arg0 == EQ
      && arg1 == E_V16QImode)
    return CODE_FOR_neon_vceqv16qi_insn;
  if (arg0 == GT
      && arg1 == E_V16QImode)
    return CODE_FOR_neon_vcgtv16qi_insn;
  if (arg0 == GE
      && arg1 == E_V16QImode)
    return CODE_FOR_neon_vcgev16qi_insn;
  if (arg0 == LE
      && arg1 == E_V16QImode)
    return CODE_FOR_neon_vclev16qi_insn;
  if (arg0 == LT
      && arg1 == E_V16QImode)
    return CODE_FOR_neon_vcltv16qi_insn;
  if (arg0 == EQ
      && arg1 == E_V4HImode)
    return CODE_FOR_neon_vceqv4hi_insn;
  if (arg0 == GT
      && arg1 == E_V4HImode)
    return CODE_FOR_neon_vcgtv4hi_insn;
  if (arg0 == GE
      && arg1 == E_V4HImode)
    return CODE_FOR_neon_vcgev4hi_insn;
  if (arg0 == LE
      && arg1 == E_V4HImode)
    return CODE_FOR_neon_vclev4hi_insn;
  if (arg0 == LT
      && arg1 == E_V4HImode)
    return CODE_FOR_neon_vcltv4hi_insn;
  if (arg0 == EQ
      && arg1 == E_V8HImode)
    return CODE_FOR_neon_vceqv8hi_insn;
  if (arg0 == GT
      && arg1 == E_V8HImode)
    return CODE_FOR_neon_vcgtv8hi_insn;
  if (arg0 == GE
      && arg1 == E_V8HImode)
    return CODE_FOR_neon_vcgev8hi_insn;
  if (arg0 == LE
      && arg1 == E_V8HImode)
    return CODE_FOR_neon_vclev8hi_insn;
  if (arg0 == LT
      && arg1 == E_V8HImode)
    return CODE_FOR_neon_vcltv8hi_insn;
  if (arg0 == EQ
      && arg1 == E_V2SImode)
    return CODE_FOR_neon_vceqv2si_insn;
  if (arg0 == GT
      && arg1 == E_V2SImode)
    return CODE_FOR_neon_vcgtv2si_insn;
  if (arg0 == GE
      && arg1 == E_V2SImode)
    return CODE_FOR_neon_vcgev2si_insn;
  if (arg0 == LE
      && arg1 == E_V2SImode)
    return CODE_FOR_neon_vclev2si_insn;
  if (arg0 == LT
      && arg1 == E_V2SImode)
    return CODE_FOR_neon_vcltv2si_insn;
  if (arg0 == EQ
      && arg1 == E_V4SImode)
    return CODE_FOR_neon_vceqv4si_insn;
  if (arg0 == GT
      && arg1 == E_V4SImode)
    return CODE_FOR_neon_vcgtv4si_insn;
  if (arg0 == GE
      && arg1 == E_V4SImode)
    return CODE_FOR_neon_vcgev4si_insn;
  if (arg0 == LE
      && arg1 == E_V4SImode)
    return CODE_FOR_neon_vclev4si_insn;
  if (arg0 == LT
      && arg1 == E_V4SImode)
    return CODE_FOR_neon_vcltv4si_insn;
  if (arg0 == EQ
      && arg1 == E_V2SFmode)
    return CODE_FOR_neon_vceqv2sf_insn;
  if (arg0 == GT
      && arg1 == E_V2SFmode)
    return CODE_FOR_neon_vcgtv2sf_insn;
  if (arg0 == GE
      && arg1 == E_V2SFmode)
    return CODE_FOR_neon_vcgev2sf_insn;
  if (arg0 == LE
      && arg1 == E_V2SFmode)
    return CODE_FOR_neon_vclev2sf_insn;
  if (arg0 == LT
      && arg1 == E_V2SFmode)
    return CODE_FOR_neon_vcltv2sf_insn;
  if (arg0 == EQ
      && arg1 == E_V4SFmode)
    return CODE_FOR_neon_vceqv4sf_insn;
  if (arg0 == GT
      && arg1 == E_V4SFmode)
    return CODE_FOR_neon_vcgtv4sf_insn;
  if (arg0 == GE
      && arg1 == E_V4SFmode)
    return CODE_FOR_neon_vcgev4sf_insn;
  if (arg0 == LE
      && arg1 == E_V4SFmode)
    return CODE_FOR_neon_vclev4sf_insn;
  if (arg0 == LT
      && arg1 == E_V4SFmode)
    return CODE_FOR_neon_vcltv4sf_insn;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_neon_vc_insn (rtx_code arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_neon_vc_insn (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_neon_vext (machine_mode arg0)
{
  if (arg0 == E_V8QImode)
    return CODE_FOR_neon_vextv8qi;
  if (arg0 == E_V16QImode)
    return CODE_FOR_neon_vextv16qi;
  if (arg0 == E_V4HImode)
    return CODE_FOR_neon_vextv4hi;
  if (arg0 == E_V8HImode)
    return CODE_FOR_neon_vextv8hi;
  if (arg0 == E_V2SImode)
    return CODE_FOR_neon_vextv2si;
  if (arg0 == E_V4SImode)
    return CODE_FOR_neon_vextv4si;
  if (arg0 == E_V4HFmode)
    return CODE_FOR_neon_vextv4hf;
  if (arg0 == E_V8HFmode)
    return CODE_FOR_neon_vextv8hf;
  if (arg0 == E_V4BFmode)
    return CODE_FOR_neon_vextv4bf;
  if (arg0 == E_V8BFmode)
    return CODE_FOR_neon_vextv8bf;
  if (arg0 == E_V2SFmode)
    return CODE_FOR_neon_vextv2sf;
  if (arg0 == E_V4SFmode)
    return CODE_FOR_neon_vextv4sf;
  if (arg0 == E_DImode)
    return CODE_FOR_neon_vextdi;
  if (arg0 == E_V2DImode)
    return CODE_FOR_neon_vextv2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_neon_vext (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_neon_vext (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_neon_vrev64 (machine_mode arg0)
{
  if (arg0 == E_V8QImode)
    return CODE_FOR_neon_vrev64v8qi;
  if (arg0 == E_V16QImode)
    return CODE_FOR_neon_vrev64v16qi;
  if (arg0 == E_V4HImode)
    return CODE_FOR_neon_vrev64v4hi;
  if (arg0 == E_V8HImode)
    return CODE_FOR_neon_vrev64v8hi;
  if (arg0 == E_V2SImode)
    return CODE_FOR_neon_vrev64v2si;
  if (arg0 == E_V4SImode)
    return CODE_FOR_neon_vrev64v4si;
  if (arg0 == E_V4HFmode)
    return CODE_FOR_neon_vrev64v4hf;
  if (arg0 == E_V8HFmode)
    return CODE_FOR_neon_vrev64v8hf;
  if (arg0 == E_V2SFmode)
    return CODE_FOR_neon_vrev64v2sf;
  if (arg0 == E_V4SFmode)
    return CODE_FOR_neon_vrev64v4sf;
  if (arg0 == E_V2DImode)
    return CODE_FOR_neon_vrev64v2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_neon_vrev64 (machine_mode arg0, rtx x0, rtx x1)
{
  insn_code code = maybe_code_for_neon_vrev64 (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 2);
      return GEN_FCN (code) (x0, x1);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_neon_vrev32 (machine_mode arg0)
{
  if (arg0 == E_V8QImode)
    return CODE_FOR_neon_vrev32v8qi;
  if (arg0 == E_V4HImode)
    return CODE_FOR_neon_vrev32v4hi;
  if (arg0 == E_V16QImode)
    return CODE_FOR_neon_vrev32v16qi;
  if (arg0 == E_V8HImode)
    return CODE_FOR_neon_vrev32v8hi;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_neon_vrev32 (machine_mode arg0, rtx x0, rtx x1)
{
  insn_code code = maybe_code_for_neon_vrev32 (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 2);
      return GEN_FCN (code) (x0, x1);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_neon_vrev16 (machine_mode arg0)
{
  if (arg0 == E_V8QImode)
    return CODE_FOR_neon_vrev16v8qi;
  if (arg0 == E_V16QImode)
    return CODE_FOR_neon_vrev16v16qi;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_neon_vrev16 (machine_mode arg0, rtx x0, rtx x1)
{
  insn_code code = maybe_code_for_neon_vrev16 (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 2);
      return GEN_FCN (code) (x0, x1);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_neon_vbsl (machine_mode arg0)
{
  if (arg0 == E_V8QImode)
    return CODE_FOR_neon_vbslv8qi;
  if (arg0 == E_V16QImode)
    return CODE_FOR_neon_vbslv16qi;
  if (arg0 == E_V4HImode)
    return CODE_FOR_neon_vbslv4hi;
  if (arg0 == E_V8HImode)
    return CODE_FOR_neon_vbslv8hi;
  if (arg0 == E_V2SImode)
    return CODE_FOR_neon_vbslv2si;
  if (arg0 == E_V4SImode)
    return CODE_FOR_neon_vbslv4si;
  if (arg0 == E_V4HFmode)
    return CODE_FOR_neon_vbslv4hf;
  if (arg0 == E_V8HFmode)
    return CODE_FOR_neon_vbslv8hf;
  if (arg0 == E_V4BFmode)
    return CODE_FOR_neon_vbslv4bf;
  if (arg0 == E_V8BFmode)
    return CODE_FOR_neon_vbslv8bf;
  if (arg0 == E_V2SFmode)
    return CODE_FOR_neon_vbslv2sf;
  if (arg0 == E_V4SFmode)
    return CODE_FOR_neon_vbslv4sf;
  if (arg0 == E_DImode)
    return CODE_FOR_neon_vbsldi;
  if (arg0 == E_V2DImode)
    return CODE_FOR_neon_vbslv2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_neon_vbsl (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_neon_vbsl (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_neon_vtrn_internal (machine_mode arg0)
{
  if (arg0 == E_V8QImode)
    return CODE_FOR_neon_vtrnv8qi_internal;
  if (arg0 == E_V16QImode)
    return CODE_FOR_neon_vtrnv16qi_internal;
  if (arg0 == E_V4HImode)
    return CODE_FOR_neon_vtrnv4hi_internal;
  if (arg0 == E_V8HImode)
    return CODE_FOR_neon_vtrnv8hi_internal;
  if (arg0 == E_V2SImode)
    return CODE_FOR_neon_vtrnv2si_internal;
  if (arg0 == E_V4SImode)
    return CODE_FOR_neon_vtrnv4si_internal;
  if (arg0 == E_V2SFmode)
    return CODE_FOR_neon_vtrnv2sf_internal;
  if (arg0 == E_V4SFmode)
    return CODE_FOR_neon_vtrnv4sf_internal;
  if (arg0 == E_V8HFmode)
    return CODE_FOR_neon_vtrnv8hf_internal;
  if (arg0 == E_V4HFmode)
    return CODE_FOR_neon_vtrnv4hf_internal;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_neon_vtrn_internal (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_neon_vtrn_internal (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_neon_vzip_internal (machine_mode arg0)
{
  if (arg0 == E_V8QImode)
    return CODE_FOR_neon_vzipv8qi_internal;
  if (arg0 == E_V16QImode)
    return CODE_FOR_neon_vzipv16qi_internal;
  if (arg0 == E_V4HImode)
    return CODE_FOR_neon_vzipv4hi_internal;
  if (arg0 == E_V8HImode)
    return CODE_FOR_neon_vzipv8hi_internal;
  if (arg0 == E_V2SImode)
    return CODE_FOR_neon_vzipv2si_internal;
  if (arg0 == E_V4SImode)
    return CODE_FOR_neon_vzipv4si_internal;
  if (arg0 == E_V2SFmode)
    return CODE_FOR_neon_vzipv2sf_internal;
  if (arg0 == E_V4SFmode)
    return CODE_FOR_neon_vzipv4sf_internal;
  if (arg0 == E_V8HFmode)
    return CODE_FOR_neon_vzipv8hf_internal;
  if (arg0 == E_V4HFmode)
    return CODE_FOR_neon_vzipv4hf_internal;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_neon_vzip_internal (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_neon_vzip_internal (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_neon_vuzp_internal (machine_mode arg0)
{
  if (arg0 == E_V8QImode)
    return CODE_FOR_neon_vuzpv8qi_internal;
  if (arg0 == E_V16QImode)
    return CODE_FOR_neon_vuzpv16qi_internal;
  if (arg0 == E_V4HImode)
    return CODE_FOR_neon_vuzpv4hi_internal;
  if (arg0 == E_V8HImode)
    return CODE_FOR_neon_vuzpv8hi_internal;
  if (arg0 == E_V2SImode)
    return CODE_FOR_neon_vuzpv2si_internal;
  if (arg0 == E_V4SImode)
    return CODE_FOR_neon_vuzpv4si_internal;
  if (arg0 == E_V2SFmode)
    return CODE_FOR_neon_vuzpv2sf_internal;
  if (arg0 == E_V4SFmode)
    return CODE_FOR_neon_vuzpv4sf_internal;
  if (arg0 == E_V8HFmode)
    return CODE_FOR_neon_vuzpv8hf_internal;
  if (arg0 == E_V4HFmode)
    return CODE_FOR_neon_vuzpv4hf_internal;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_neon_vuzp_internal (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_neon_vuzp_internal (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_atomic_compare_and_swap_1 (machine_mode arg0, machine_mode arg1)
{
  if (arg0 == E_CC_Zmode
      && arg1 == E_QImode)
    return CODE_FOR_atomic_compare_and_swap32qi_1;
  if (arg0 == E_CC_Zmode
      && arg1 == E_HImode)
    return CODE_FOR_atomic_compare_and_swap32hi_1;
  if (arg0 == E_SImode
      && arg1 == E_QImode)
    return CODE_FOR_atomic_compare_and_swapt1qi_1;
  if (arg0 == E_SImode
      && arg1 == E_HImode)
    return CODE_FOR_atomic_compare_and_swapt1hi_1;
  if (arg0 == E_CC_Zmode
      && arg1 == E_SImode)
    return CODE_FOR_atomic_compare_and_swap32si_1;
  if (arg0 == E_CC_Zmode
      && arg1 == E_DImode)
    return CODE_FOR_atomic_compare_and_swap32di_1;
  if (arg0 == E_SImode
      && arg1 == E_SImode)
    return CODE_FOR_atomic_compare_and_swapt1si_1;
  if (arg0 == E_SImode
      && arg1 == E_DImode)
    return CODE_FOR_atomic_compare_and_swapt1di_1;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_atomic_compare_and_swap_1 (machine_mode arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4, rtx x5, rtx x6, rtx x7)
{
  insn_code code = maybe_code_for_atomic_compare_and_swap_1 (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 8);
      return GEN_FCN (code) (x0, x1, x2, x3, x4, x5, x6, x7);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_mve_vclzq_s (machine_mode arg0)
{
  if (arg0 == E_V16QImode)
    return CODE_FOR_mve_vclzq_sv16qi;
  if (arg0 == E_V8HImode)
    return CODE_FOR_mve_vclzq_sv8hi;
  if (arg0 == E_V4SImode)
    return CODE_FOR_mve_vclzq_sv4si;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_mve_vclzq_s (machine_mode arg0, rtx x0, rtx x1)
{
  insn_code code = maybe_code_for_mve_vclzq_s (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 2);
      return GEN_FCN (code) (x0, x1);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_mve_vaddvq (int arg0, machine_mode arg1)
{
  if (arg0 == 418
      && arg1 == E_V16QImode)
    return CODE_FOR_mve_vaddvq_uv16qi;
  if (arg0 == 417
      && arg1 == E_V16QImode)
    return CODE_FOR_mve_vaddvq_sv16qi;
  if (arg0 == 418
      && arg1 == E_V8HImode)
    return CODE_FOR_mve_vaddvq_uv8hi;
  if (arg0 == 417
      && arg1 == E_V8HImode)
    return CODE_FOR_mve_vaddvq_sv8hi;
  if (arg0 == 418
      && arg1 == E_V4SImode)
    return CODE_FOR_mve_vaddvq_uv4si;
  if (arg0 == 417
      && arg1 == E_V4SImode)
    return CODE_FOR_mve_vaddvq_sv4si;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_mve_vaddvq (int arg0, machine_mode arg1, rtx x0, rtx x1)
{
  insn_code code = maybe_code_for_mve_vaddvq (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 2);
      return GEN_FCN (code) (x0, x1);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_mve_vcmpq (rtx_code arg0, machine_mode arg1)
{
  if (arg0 == EQ
      && arg1 == E_V16QImode)
    return CODE_FOR_mve_vcmpeqq_v16qi;
  if (arg0 == GE
      && arg1 == E_V16QImode)
    return CODE_FOR_mve_vcmpgeq_v16qi;
  if (arg0 == GEU
      && arg1 == E_V16QImode)
    return CODE_FOR_mve_vcmpcsq_v16qi;
  if (arg0 == GT
      && arg1 == E_V16QImode)
    return CODE_FOR_mve_vcmpgtq_v16qi;
  if (arg0 == GTU
      && arg1 == E_V16QImode)
    return CODE_FOR_mve_vcmphiq_v16qi;
  if (arg0 == LE
      && arg1 == E_V16QImode)
    return CODE_FOR_mve_vcmpleq_v16qi;
  if (arg0 == LT
      && arg1 == E_V16QImode)
    return CODE_FOR_mve_vcmpltq_v16qi;
  if (arg0 == NE
      && arg1 == E_V16QImode)
    return CODE_FOR_mve_vcmpneq_v16qi;
  if (arg0 == EQ
      && arg1 == E_V8HImode)
    return CODE_FOR_mve_vcmpeqq_v8hi;
  if (arg0 == GE
      && arg1 == E_V8HImode)
    return CODE_FOR_mve_vcmpgeq_v8hi;
  if (arg0 == GEU
      && arg1 == E_V8HImode)
    return CODE_FOR_mve_vcmpcsq_v8hi;
  if (arg0 == GT
      && arg1 == E_V8HImode)
    return CODE_FOR_mve_vcmpgtq_v8hi;
  if (arg0 == GTU
      && arg1 == E_V8HImode)
    return CODE_FOR_mve_vcmphiq_v8hi;
  if (arg0 == LE
      && arg1 == E_V8HImode)
    return CODE_FOR_mve_vcmpleq_v8hi;
  if (arg0 == LT
      && arg1 == E_V8HImode)
    return CODE_FOR_mve_vcmpltq_v8hi;
  if (arg0 == NE
      && arg1 == E_V8HImode)
    return CODE_FOR_mve_vcmpneq_v8hi;
  if (arg0 == EQ
      && arg1 == E_V4SImode)
    return CODE_FOR_mve_vcmpeqq_v4si;
  if (arg0 == GE
      && arg1 == E_V4SImode)
    return CODE_FOR_mve_vcmpgeq_v4si;
  if (arg0 == GEU
      && arg1 == E_V4SImode)
    return CODE_FOR_mve_vcmpcsq_v4si;
  if (arg0 == GT
      && arg1 == E_V4SImode)
    return CODE_FOR_mve_vcmpgtq_v4si;
  if (arg0 == GTU
      && arg1 == E_V4SImode)
    return CODE_FOR_mve_vcmphiq_v4si;
  if (arg0 == LE
      && arg1 == E_V4SImode)
    return CODE_FOR_mve_vcmpleq_v4si;
  if (arg0 == LT
      && arg1 == E_V4SImode)
    return CODE_FOR_mve_vcmpltq_v4si;
  if (arg0 == NE
      && arg1 == E_V4SImode)
    return CODE_FOR_mve_vcmpneq_v4si;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_mve_vcmpq (rtx_code arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_mve_vcmpq (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_mve_vhaddq (int arg0, machine_mode arg1)
{
  if (arg0 == 457
      && arg1 == E_V16QImode)
    return CODE_FOR_mve_vhaddq_sv16qi;
  if (arg0 == 494
      && arg1 == E_V16QImode)
    return CODE_FOR_mve_vhaddq_uv16qi;
  if (arg0 == 457
      && arg1 == E_V8HImode)
    return CODE_FOR_mve_vhaddq_sv8hi;
  if (arg0 == 494
      && arg1 == E_V8HImode)
    return CODE_FOR_mve_vhaddq_uv8hi;
  if (arg0 == 457
      && arg1 == E_V4SImode)
    return CODE_FOR_mve_vhaddq_sv4si;
  if (arg0 == 494
      && arg1 == E_V4SImode)
    return CODE_FOR_mve_vhaddq_uv4si;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_mve_vhaddq (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_mve_vhaddq (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_mve_vrhaddq (int arg0, machine_mode arg1)
{
  if (arg0 == 480
      && arg1 == E_V16QImode)
    return CODE_FOR_mve_vrhaddq_sv16qi;
  if (arg0 == 517
      && arg1 == E_V16QImode)
    return CODE_FOR_mve_vrhaddq_uv16qi;
  if (arg0 == 480
      && arg1 == E_V8HImode)
    return CODE_FOR_mve_vrhaddq_sv8hi;
  if (arg0 == 517
      && arg1 == E_V8HImode)
    return CODE_FOR_mve_vrhaddq_uv8hi;
  if (arg0 == 480
      && arg1 == E_V4SImode)
    return CODE_FOR_mve_vrhaddq_sv4si;
  if (arg0 == 517
      && arg1 == E_V4SImode)
    return CODE_FOR_mve_vrhaddq_uv4si;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_mve_vrhaddq (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_mve_vrhaddq (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_mve_vcmpq_f (rtx_code arg0, machine_mode arg1)
{
  if (arg0 == EQ
      && arg1 == E_V8HFmode)
    return CODE_FOR_mve_vcmpeqq_fv8hf;
  if (arg0 == GE
      && arg1 == E_V8HFmode)
    return CODE_FOR_mve_vcmpgeq_fv8hf;
  if (arg0 == GT
      && arg1 == E_V8HFmode)
    return CODE_FOR_mve_vcmpgtq_fv8hf;
  if (arg0 == LE
      && arg1 == E_V8HFmode)
    return CODE_FOR_mve_vcmpleq_fv8hf;
  if (arg0 == LT
      && arg1 == E_V8HFmode)
    return CODE_FOR_mve_vcmpltq_fv8hf;
  if (arg0 == NE
      && arg1 == E_V8HFmode)
    return CODE_FOR_mve_vcmpneq_fv8hf;
  if (arg0 == EQ
      && arg1 == E_V4SFmode)
    return CODE_FOR_mve_vcmpeqq_fv4sf;
  if (arg0 == GE
      && arg1 == E_V4SFmode)
    return CODE_FOR_mve_vcmpgeq_fv4sf;
  if (arg0 == GT
      && arg1 == E_V4SFmode)
    return CODE_FOR_mve_vcmpgtq_fv4sf;
  if (arg0 == LE
      && arg1 == E_V4SFmode)
    return CODE_FOR_mve_vcmpleq_fv4sf;
  if (arg0 == LT
      && arg1 == E_V4SFmode)
    return CODE_FOR_mve_vcmpltq_fv4sf;
  if (arg0 == NE
      && arg1 == E_V4SFmode)
    return CODE_FOR_mve_vcmpneq_fv4sf;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_mve_vcmpq_f (rtx_code arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_mve_vcmpq_f (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_mve_vcmpq_n_f (rtx_code arg0, machine_mode arg1)
{
  if (arg0 == EQ
      && arg1 == E_V8HFmode)
    return CODE_FOR_mve_vcmpeqq_n_fv8hf;
  if (arg0 == GE
      && arg1 == E_V8HFmode)
    return CODE_FOR_mve_vcmpgeq_n_fv8hf;
  if (arg0 == GT
      && arg1 == E_V8HFmode)
    return CODE_FOR_mve_vcmpgtq_n_fv8hf;
  if (arg0 == LE
      && arg1 == E_V8HFmode)
    return CODE_FOR_mve_vcmpleq_n_fv8hf;
  if (arg0 == LT
      && arg1 == E_V8HFmode)
    return CODE_FOR_mve_vcmpltq_n_fv8hf;
  if (arg0 == NE
      && arg1 == E_V8HFmode)
    return CODE_FOR_mve_vcmpneq_n_fv8hf;
  if (arg0 == EQ
      && arg1 == E_V4SFmode)
    return CODE_FOR_mve_vcmpeqq_n_fv4sf;
  if (arg0 == GE
      && arg1 == E_V4SFmode)
    return CODE_FOR_mve_vcmpgeq_n_fv4sf;
  if (arg0 == GT
      && arg1 == E_V4SFmode)
    return CODE_FOR_mve_vcmpgtq_n_fv4sf;
  if (arg0 == LE
      && arg1 == E_V4SFmode)
    return CODE_FOR_mve_vcmpleq_n_fv4sf;
  if (arg0 == LT
      && arg1 == E_V4SFmode)
    return CODE_FOR_mve_vcmpltq_n_fv4sf;
  if (arg0 == NE
      && arg1 == E_V4SFmode)
    return CODE_FOR_mve_vcmpneq_n_fv4sf;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_mve_vcmpq_n_f (rtx_code arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_mve_vcmpq_n_f (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_mve_vpselq (int arg0, machine_mode arg1)
{
  if (arg0 == 668
      && arg1 == E_V16QImode)
    return CODE_FOR_mve_vpselq_sv16qi;
  if (arg0 == 669
      && arg1 == E_V16QImode)
    return CODE_FOR_mve_vpselq_uv16qi;
  if (arg0 == 668
      && arg1 == E_V8HImode)
    return CODE_FOR_mve_vpselq_sv8hi;
  if (arg0 == 669
      && arg1 == E_V8HImode)
    return CODE_FOR_mve_vpselq_uv8hi;
  if (arg0 == 668
      && arg1 == E_V4SImode)
    return CODE_FOR_mve_vpselq_sv4si;
  if (arg0 == 669
      && arg1 == E_V4SImode)
    return CODE_FOR_mve_vpselq_uv4si;
  if (arg0 == 668
      && arg1 == E_V2DImode)
    return CODE_FOR_mve_vpselq_sv2di;
  if (arg0 == 669
      && arg1 == E_V2DImode)
    return CODE_FOR_mve_vpselq_uv2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_mve_vpselq (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_mve_vpselq (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_mve_vpselq_f (machine_mode arg0)
{
  if (arg0 == E_V8HFmode)
    return CODE_FOR_mve_vpselq_fv8hf;
  if (arg0 == E_V4SFmode)
    return CODE_FOR_mve_vpselq_fv4sf;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_mve_vpselq_f (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_mve_vpselq_f (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}
